From 80ada583f3b40ffb201e54cd57c42f9518039c9e Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Fri, 7 Jun 2013 07:55:53 +0000 Subject: Don't cache the instruction and register info from the TargetMachine, because the internals of TargetMachine could change. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183494 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstrInfo.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'lib/Target/PowerPC/PPCInstrInfo.cpp') diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index d94acde101..e2d870de04 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -47,7 +47,7 @@ cl::desc("Disable compare instruction optimization"), cl::Hidden); PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP), - TM(tm), RI(*TM.getSubtargetImpl(), *this) {} + TM(tm), RI(*TM.getSubtargetImpl()) {} /// CreateTargetHazardRecognizer - Return the hazard recognizer to use for /// this target when scheduling the DAG. @@ -77,7 +77,7 @@ ScheduleHazardRecognizer *PPCInstrInfo::CreateTargetPostRAHazardRecognizer( const TargetInstrInfo *TII = TM.getInstrInfo(); assert(TII && "No InstrInfo?"); - return new PPCHazardRecognizer970(*TII); + return new PPCHazardRecognizer970(TM); } return new PPCScoreboardHazardRecognizer(II, DAG); -- cgit v1.2.3