From 0c0a1be9c565bd8908e2cf2ffccd356b3a3d7c2a Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Fri, 26 Apr 2013 15:39:40 +0000 Subject: PowerPC: Fix encoding of stfsu and stfdu instructions When testing the asm parser, I noticed wrong encodings for the above instructions (wrong sub-opcodes). Note that apparently the compiler currently never generates pre-inc instructions for floating point types for some reason ... Tests will be added together with the asm parser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180607 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstrInfo.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'lib/Target/PowerPC/PPCInstrInfo.td') diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 6d8ef6bb6a..8bb5ae3878 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -1165,10 +1165,10 @@ def STHU : DForm_1<45, (outs ptr_rc_nor0:$ea_res), (ins GPRC:$rS, memri:$dst), def STWU : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins GPRC:$rS, memri:$dst), "stwu $rS, $dst", LdStStoreUpd, []>, RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; -def STFSU : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins F4RC:$rS, memri:$dst), +def STFSU : DForm_1<53, (outs ptr_rc_nor0:$ea_res), (ins F4RC:$rS, memri:$dst), "stfsu $rS, $dst", LdStSTFDU, []>, RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; -def STFDU : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins F8RC:$rS, memri:$dst), +def STFDU : DForm_1<55, (outs ptr_rc_nor0:$ea_res), (ins F8RC:$rS, memri:$dst), "stfdu $rS, $dst", LdStSTFDU, []>, RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; } -- cgit v1.2.3