From a04084e777db923faea0d2c93ce667054fdf576f Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Mon, 15 Nov 2010 04:51:55 +0000
Subject: add basic encoding support for immediates and registers, allowing us
 to encode all of these instructions correctly (for example):

        mflr r0                         ; encoding: [0x7c,0x08,0x02,0xa6]
        stw r0, 8(r1)                   ; encoding: [0x90,0x01,0x00,0x08]
        stwu r1, -64(r1)                ; encoding: [0x94,0x21,0xff,0xc0]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119118 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/PowerPC/PPCInstrInfo.td | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

(limited to 'lib/Target/PowerPC/PPCInstrInfo.td')

diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 8d9fa47132..05fdbeb863 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -295,9 +295,7 @@ def calltarget : Operand<iPTR> {
 def aaddr : Operand<iPTR> {
   let PrintMethod = "printAbsAddrOperand";
 }
-def piclabel: Operand<iPTR> {
-  let PrintMethod = "printPICLabel";
-}
+def piclabel: Operand<iPTR> {}
 def symbolHi: Operand<i32> {
   let PrintMethod = "printSymbolHi";
 }
@@ -321,7 +319,6 @@ def memrix : Operand<iPTR> {   // memri where the imm is shifted 2 bits.
   let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg);
 }
 def tocentry : Operand<iPTR> {
-  let PrintMethod = "printTOCEntryLabel";
   let MIOperandInfo = (ops i32imm:$imm);
 }
 
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