From d0c38176690e9602a93a20a43f1bd084564a8116 Mon Sep 17 00:00:00 2001 From: Anton Korobeynikov Date: Thu, 18 Nov 2010 21:19:35 +0000 Subject: Move hasFP() and few related hooks to TargetFrameInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCRegisterInfo.td | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'lib/Target/PowerPC/PPCRegisterInfo.td') diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td index 8604f54de9..2fbd41bd84 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.td +++ b/lib/Target/PowerPC/PPCRegisterInfo.td @@ -300,13 +300,13 @@ def GPRC : RegisterClass<"PPC", [i32], 32, // R31 when the FP is not needed. // When using the 32-bit SVR4 ABI, r13 is reserved for the Small Data Area // pointer. - const PPCSubtarget &Subtarget - = MF.getTarget().getSubtarget(); - + const PPCSubtarget &Subtarget = MF.getTarget().getSubtarget(); + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + if (Subtarget.isPPC64() || Subtarget.isSVR4ABI()) return end()-5; // don't allocate R13, R31, R0, R1, LR - if (needsFP(MF)) + if (TFI->hasFP(MF)) return end()-4; // don't allocate R31, R0, R1, LR else return end()-3; // don't allocate R0, R1, LR @@ -331,7 +331,8 @@ def G8RC : RegisterClass<"PPC", [i64], 64, } G8RCClass::iterator G8RCClass::allocation_order_end(const MachineFunction &MF) const { - if (needsFP(MF)) + const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + if (TFI->hasFP(MF)) return end()-5; else return end()-4; -- cgit v1.2.3