From e7e66cfe9afba62be02ea284d81c4c803f3a13e9 Mon Sep 17 00:00:00 2001 From: Lang Hames Date: Mon, 11 Nov 2013 23:00:41 +0000 Subject: Lower X86::MORESTACK_RET and X86::MORESTACK_RET_RESTORE_R10 in X86AsmPrinter::EmitInstruction, rather than X86MCInstLower::Lower. The aim is to improve the reusability of the X86MCInstLower class by making it more function-like. The X86::MORESTACK_RET_RESTORE_R10 pseudo broke the function model by emitting an extra instruction to the MCStreamer attached to the AsmPrinter. The patch should have no impact on generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194431 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86MCInstLower.cpp | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'lib/Target/X86') diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp index 2cc038c889..c718b1cceb 100644 --- a/lib/Target/X86/X86MCInstLower.cpp +++ b/lib/Target/X86/X86MCInstLower.cpp @@ -593,18 +593,6 @@ ReSimplify: case X86::MOVSX64rr32: SimplifyMOVSX(OutMI); break; - - case X86::MORESTACK_RET: - OutMI.setOpcode(X86::RET); - break; - - case X86::MORESTACK_RET_RESTORE_R10: - OutMI.setOpcode(X86::MOV64rr); - OutMI.addOperand(MCOperand::CreateReg(X86::R10)); - OutMI.addOperand(MCOperand::CreateReg(X86::RAX)); - - AsmPrinter.OutStreamer.EmitInstruction(MCInstBuilder(X86::RET)); - break; } } @@ -940,6 +928,18 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { case TargetOpcode::PATCHPOINT: return LowerPATCHPOINT(OutStreamer, MCInstLowering, SM, *MI); + + case X86::MORESTACK_RET: + OutStreamer.EmitInstruction(MCInstBuilder(X86::RET)); + return; + + case X86::MORESTACK_RET_RESTORE_R10: + // Return, then restore R10. + OutStreamer.EmitInstruction(MCInstBuilder(X86::RET)); + OutStreamer.EmitInstruction(MCInstBuilder(X86::MOV64rr) + .addReg(X86::R10) + .addReg(X86::RAX)); + return; } MCInst TmpInst; -- cgit v1.2.3