From 3b6a5eefe0ab2199bc69094b390b736ae332b905 Mon Sep 17 00:00:00 2001
From: Richard Osborne <richard@xmos.com>
Date: Fri, 25 Jan 2013 20:20:07 +0000
Subject: Add instruction encodings / disassembly support for l5r instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173479 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/XCore/XCoreInstrFormats.td | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

(limited to 'lib/Target/XCore/XCoreInstrFormats.td')

diff --git a/lib/Target/XCore/XCoreInstrFormats.td b/lib/Target/XCore/XCoreInstrFormats.td
index fa360a7775..624036205c 100644
--- a/lib/Target/XCore/XCoreInstrFormats.td
+++ b/lib/Target/XCore/XCoreInstrFormats.td
@@ -222,8 +222,13 @@ class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern>
     : InstXCore<4, outs, ins, asmstr, pattern> {
 }
 
-class _L5R<dag outs, dag ins, string asmstr, list<dag> pattern>
+class _FL5R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
     : InstXCore<4, outs, ins, asmstr, pattern> {
+  let Inst{31-27} = opc{5-1};
+  let Inst{20} = opc{0};
+  let Inst{15-11} = 0b11111;
+
+  let DecoderMethod = "DecodeL5RInstruction";
 }
 
 class _FL6R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
-- 
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