From 3b6a5eefe0ab2199bc69094b390b736ae332b905 Mon Sep 17 00:00:00 2001 From: Richard Osborne Date: Fri, 25 Jan 2013 20:20:07 +0000 Subject: Add instruction encodings / disassembly support for l5r instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173479 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/XCore/XCoreInstrInfo.td | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) (limited to 'lib/Target/XCore/XCoreInstrInfo.td') diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index e6e434c012..1810a13834 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -485,19 +485,18 @@ def CRC8_l4r : _L4R<(outs GRRegs:$dst1, GRRegs:$dst2), // Five operand long -def LADD_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2), - (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3), - "ladd $dst2, $dst1, $src1, $src2, $src3", - []>; - -def LSUB_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2), - (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3), - "lsub $dst2, $dst1, $src1, $src2, $src3", - []>; +def LADD_l5r : _FL5R<0b000001, (outs GRRegs:$dst1, GRRegs:$dst2), + (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3), + "ladd $dst2, $dst1, $src1, $src2, $src3", + []>; -def LDIVU_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2), +def LSUB_l5r : _FL5R<0b000010, (outs GRRegs:$dst1, GRRegs:$dst2), (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3), - "ldivu $dst1, $dst2, $src3, $src1, $src2", []>; + "lsub $dst2, $dst1, $src1, $src2, $src3", []>; + +def LDIVU_l5r : _FL5R<0b000000, (outs GRRegs:$dst1, GRRegs:$dst2), + (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3), + "ldivu $dst1, $dst2, $src3, $src1, $src2", []>; // Six operand long -- cgit v1.2.3