From 4f3fb6d08be511a277f92279e803ae6e95b00126 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Thu, 2 Jun 2011 23:07:24 +0000 Subject: Flag unallocatable register classes instead of giving them empty allocation orders. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132509 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/XCore/XCoreRegisterInfo.td | 21 +++------------------ 1 file changed, 3 insertions(+), 18 deletions(-) (limited to 'lib/Target/XCore/XCoreRegisterInfo.td') diff --git a/lib/Target/XCore/XCoreRegisterInfo.td b/lib/Target/XCore/XCoreRegisterInfo.td index 765f717e20..b1ba964069 100644 --- a/lib/Target/XCore/XCoreRegisterInfo.td +++ b/lib/Target/XCore/XCoreRegisterInfo.td @@ -70,22 +70,7 @@ def GRRegs : RegisterClass<"XCore", [i32], 32, }]; } -def RRegs : RegisterClass<"XCore", [i32], 32, - // Reserved - [CP, DP, SP, LR]> { - let MethodProtos = [{ - iterator allocation_order_begin(const MachineFunction &MF) const; - iterator allocation_order_end(const MachineFunction &MF) const; - }]; - let MethodBodies = [{ - RRegsClass::iterator - RRegsClass::allocation_order_begin(const MachineFunction &MF) const { - return begin(); - } - RRegsClass::iterator - RRegsClass::allocation_order_end(const MachineFunction &MF) const { - // No allocatable registers - return begin(); - } - }]; +// Reserved +def RRegs : RegisterClass<"XCore", [i32], 32, [CP, DP, SP, LR]> { + let isAllocatable = 0; } -- cgit v1.2.3