From 8a4f11e3b69ce3e58b1d147d98a020b1d311f1f1 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Wed, 22 Jan 2014 22:20:54 +0000 Subject: Revert "R600: Add work-around for the CF stack entry HW bug" This reverts commit 35b8331cad6eb512a2506adbc394201181da94ba. The -debug-only flag for llc doesn't appear to be available in all build configurations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199845 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPU.td | 5 ---- lib/Target/R600/AMDGPUSubtarget.cpp | 6 ---- lib/Target/R600/AMDGPUSubtarget.h | 2 -- lib/Target/R600/Processors.td | 14 ++++----- lib/Target/R600/R600ControlFlowFinalizer.cpp | 43 +--------------------------- 5 files changed, 7 insertions(+), 63 deletions(-) (limited to 'lib') diff --git a/lib/Target/R600/AMDGPU.td b/lib/Target/R600/AMDGPU.td index d1e2cf5319..c4e5efc8d6 100644 --- a/lib/Target/R600/AMDGPU.td +++ b/lib/Target/R600/AMDGPU.td @@ -63,11 +63,6 @@ def FeatureCaymanISA : SubtargetFeature<"caymanISA", "true", "Use Cayman ISA">; -def FeatureCFALUBug : SubtargetFeature<"cfalubug", - "CFALUBug", - "true", - "GPU has CF_ALU bug">; - class SubtargetFeatureFetchLimit : SubtargetFeature <"fetch"#Value, "TexVTXClauseSize", diff --git a/lib/Target/R600/AMDGPUSubtarget.cpp b/lib/Target/R600/AMDGPUSubtarget.cpp index e77ab5e6d1..f36aa2071c 100644 --- a/lib/Target/R600/AMDGPUSubtarget.cpp +++ b/lib/Target/R600/AMDGPUSubtarget.cpp @@ -39,7 +39,6 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : EnableIRStructurizer = true; EnableIfCvt = true; WavefrontSize = 0; - CFALUBug = false; ParseSubtargetFeatures(GPU, FS); DevName = GPU; } @@ -98,11 +97,6 @@ AMDGPUSubtarget::getStackEntrySize() const { } } bool -AMDGPUSubtarget::hasCFAluBug() const { - assert(getGeneration() <= NORTHERN_ISLANDS); - return CFALUBug; -} -bool AMDGPUSubtarget::isTargetELF() const { return false; } diff --git a/lib/Target/R600/AMDGPUSubtarget.h b/lib/Target/R600/AMDGPUSubtarget.h index 7e7f4d0c00..68d853218b 100644 --- a/lib/Target/R600/AMDGPUSubtarget.h +++ b/lib/Target/R600/AMDGPUSubtarget.h @@ -52,7 +52,6 @@ private: bool EnableIRStructurizer; bool EnableIfCvt; unsigned WavefrontSize; - bool CFALUBug; InstrItineraryData InstrItins; @@ -72,7 +71,6 @@ public: bool isIfCvtEnabled() const; unsigned getWavefrontSize() const; unsigned getStackEntrySize() const; - bool hasCFAluBug() const; virtual bool enableMachineScheduler() const { return getGeneration() <= NORTHERN_ISLANDS; diff --git a/lib/Target/R600/Processors.td b/lib/Target/R600/Processors.td index fde4481497..e601f35316 100644 --- a/lib/Target/R600/Processors.td +++ b/lib/Target/R600/Processors.td @@ -46,15 +46,13 @@ def : Proc<"rv770", R600_VLIW5_Itin, //===----------------------------------------------------------------------===// def : Proc<"cedar", R600_VLIW5_Itin, - [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize32, - FeatureCFALUBug]>; + [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize32]>; def : Proc<"redwood", R600_VLIW5_Itin, - [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64, - FeatureCFALUBug]>; + [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64]>; def : Proc<"sumo", R600_VLIW5_Itin, - [FeatureEvergreen, FeatureWavefrontSize64, FeatureCFALUBug]>; + [FeatureEvergreen, FeatureWavefrontSize64]>; def : Proc<"juniper", R600_VLIW5_Itin, [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64]>; @@ -68,13 +66,13 @@ def : Proc<"cypress", R600_VLIW5_Itin, //===----------------------------------------------------------------------===// def : Proc<"barts", R600_VLIW5_Itin, - [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>; + [FeatureNorthernIslands, FeatureVertexCache]>; def : Proc<"turks", R600_VLIW5_Itin, - [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>; + [FeatureNorthernIslands, FeatureVertexCache]>; def : Proc<"caicos", R600_VLIW5_Itin, - [FeatureNorthernIslands, FeatureCFALUBug]>; + [FeatureNorthernIslands]>; def : Proc<"cayman", R600_VLIW4_Itin, [FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>; diff --git a/lib/Target/R600/R600ControlFlowFinalizer.cpp b/lib/Target/R600/R600ControlFlowFinalizer.cpp index 470ff2e107..6b42a7a9fa 100644 --- a/lib/Target/R600/R600ControlFlowFinalizer.cpp +++ b/lib/Target/R600/R600ControlFlowFinalizer.cpp @@ -73,44 +73,6 @@ bool CFStack::branchStackContains(CFStack::StackItem Item) { return false; } -bool CFStack::requiresWorkAroundForInst(unsigned Opcode) { - if (Opcode == AMDGPU::CF_ALU_PUSH_BEFORE && ST.hasCaymanISA() && - getLoopDepth() > 1) - return true; - - if (!ST.hasCFAluBug()) - return false; - - switch(Opcode) { - default: return false; - case AMDGPU::CF_ALU_PUSH_BEFORE: - case AMDGPU::CF_ALU_ELSE_AFTER: - case AMDGPU::CF_ALU_BREAK: - case AMDGPU::CF_ALU_CONTINUE: - if (CurrentSubEntries == 0) - return false; - if (ST.getWavefrontSize() == 64) { - // We are being conservative here. We only require this work-around if - // CurrentSubEntries > 3 && - // (CurrentSubEntries % 4 == 3 || CurrentSubEntries % 4 == 0) - // - // We have to be conservative, because we don't know for certain that - // our stack allocation algorithm for Evergreen/NI is correct. Applying this - // work-around when CurrentSubEntries > 3 allows us to over-allocate stack - // resources without any problems. - return CurrentSubEntries > 3; - } else { - assert(ST.getWavefrontSize() == 32); - // We are being conservative here. We only require the work-around if - // CurrentSubEntries > 7 && - // (CurrentSubEntries % 8 == 7 || CurrentSubEntries % 8 == 0) - // See the comment on the wavefront size == 64 case for why we are - // being conservative. - return CurrentSubEntries > 7; - } - } -} - unsigned CFStack::getSubEntrySize(CFStack::StackItem Item) { switch(Item) { default: @@ -510,12 +472,9 @@ public: if (MI->getOpcode() == AMDGPU::CF_ALU) LastAlu.back() = MI; I++; - bool RequiresWorkAround = - CFStack.requiresWorkAroundForInst(MI->getOpcode()); switch (MI->getOpcode()) { case AMDGPU::CF_ALU_PUSH_BEFORE: - if (RequiresWorkAround) { - DEBUG(dbgs() << "Applying bug work-around for ALU_PUSH_BEFORE\n"); + if (ST.hasCaymanISA() && CFStack.getLoopDepth() > 1) { BuildMI(MBB, MI, MBB.findDebugLoc(MI), TII->get(AMDGPU::CF_PUSH_EG)) .addImm(CfCount + 1) .addImm(1); -- cgit v1.2.3