From b1eb9dd018475d45d9a8f705441f8f6c86a8f986 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 10 Dec 2013 06:42:24 +0000 Subject: Merging r196858: ------------------------------------------------------------------------ r196858 | nadav | 2013-12-09 17:13:59 -0800 (Mon, 09 Dec 2013) | 1 line Fix PR18162 - Incorrect assertion assumed that the SDValue resno is zero. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196886 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib') diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 7dab11a7e9..43f72c5ef9 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -9814,7 +9814,7 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) { if (N->getNumOperands() == 2 && N->getOperand(1)->getOpcode() == ISD::UNDEF) { SDValue In = N->getOperand(0); - assert(In->getValueType(0).isVector() && "Must concat vectors"); + assert(In.getValueType().isVector() && "Must concat vectors"); // Transform: concat_vectors(scalar, undef) -> scalar_to_vector(sclr). if (In->getOpcode() == ISD::BITCAST && -- cgit v1.2.3