From ca396e391e13d417605ebed06780d92c88f14a6b Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Tue, 11 Mar 2014 10:48:52 +0000 Subject: IR: add a second ordering operand to cmpxhg for failure The syntax for "cmpxchg" should now look something like: cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic where the second ordering argument gives the required semantics in the case that no exchange takes place. It should be no stronger than the first ordering constraint and cannot be either "release" or "acq_rel" (since no store will have taken place). rdar://problem/15996804 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203559 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/Assembler/atomic.ll | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'test/Assembler') diff --git a/test/Assembler/atomic.ll b/test/Assembler/atomic.ll index b245cdea75..a2ae58e296 100644 --- a/test/Assembler/atomic.ll +++ b/test/Assembler/atomic.ll @@ -10,10 +10,12 @@ define void @f(i32* %x) { store atomic i32 3, i32* %x release, align 4 ; CHECK: store atomic volatile i32 3, i32* %x singlethread monotonic, align 4 store atomic volatile i32 3, i32* %x singlethread monotonic, align 4 - ; CHECK: cmpxchg i32* %x, i32 1, i32 0 singlethread monotonic - cmpxchg i32* %x, i32 1, i32 0 singlethread monotonic - ; CHECK: cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel - cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel + ; CHECK: cmpxchg i32* %x, i32 1, i32 0 singlethread monotonic monotonic + cmpxchg i32* %x, i32 1, i32 0 singlethread monotonic monotonic + ; CHECK: cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel acquire + cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel acquire + ; CHECK: cmpxchg i32* %x, i32 42, i32 0 acq_rel monotonic + cmpxchg i32* %x, i32 42, i32 0 acq_rel monotonic ; CHECK: atomicrmw add i32* %x, i32 10 seq_cst atomicrmw add i32* %x, i32 10 seq_cst ; CHECK: atomicrmw volatile xchg i32* %x, i32 10 monotonic -- cgit v1.2.3