From 29e05fe7a885bd03d8570d2bcf14193013776bcd Mon Sep 17 00:00:00 2001 From: Kristof Beyls Date: Fri, 22 Feb 2013 10:01:33 +0000 Subject: Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. The Printer will now print instructions with the correct alignment specifier syntax, like vld1.8 {d16}, [r0:64] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/vst4.ll | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'test/CodeGen/ARM/vst4.ll') diff --git a/test/CodeGen/ARM/vst4.ll b/test/CodeGen/ARM/vst4.ll index e94acb66bf..7dedb2fafe 100644 --- a/test/CodeGen/ARM/vst4.ll +++ b/test/CodeGen/ARM/vst4.ll @@ -3,7 +3,7 @@ define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst4i8: ;Check the alignment value. Max for this instruction is 256 bits: -;CHECK: vst4.8 {d16, d17, d18, d19}, [r0, :64] +;CHECK: vst4.8 {d16, d17, d18, d19}, [r0:64] %tmp1 = load <8 x i8>* %B call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8) ret void @@ -12,7 +12,7 @@ define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind { ;Check for a post-increment updating store with register increment. define void @vst4i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { ;CHECK: vst4i8_update: -;CHECK: vst4.8 {d16, d17, d18, d19}, [r1, :128], r2 +;CHECK: vst4.8 {d16, d17, d18, d19}, [r1:128], r2 %A = load i8** %ptr %tmp1 = load <8 x i8>* %B call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 16) @@ -24,7 +24,7 @@ define void @vst4i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst4i16: ;Check the alignment value. Max for this instruction is 256 bits: -;CHECK: vst4.16 {d16, d17, d18, d19}, [r0, :128] +;CHECK: vst4.16 {d16, d17, d18, d19}, [r0:128] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B call void @llvm.arm.neon.vst4.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 16) @@ -34,7 +34,7 @@ define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind { define void @vst4i32(i32* %A, <2 x i32>* %B) nounwind { ;CHECK: vst4i32: ;Check the alignment value. Max for this instruction is 256 bits: -;CHECK: vst4.32 {d16, d17, d18, d19}, [r0, :256] +;CHECK: vst4.32 {d16, d17, d18, d19}, [r0:256] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B call void @llvm.arm.neon.vst4.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 32) @@ -53,7 +53,7 @@ define void @vst4f(float* %A, <2 x float>* %B) nounwind { define void @vst4i64(i64* %A, <1 x i64>* %B) nounwind { ;CHECK: vst4i64: ;Check the alignment value. Max for this instruction is 256 bits: -;CHECK: vst1.64 {d16, d17, d18, d19}, [r0, :256] +;CHECK: vst1.64 {d16, d17, d18, d19}, [r0:256] %tmp0 = bitcast i64* %A to i8* %tmp1 = load <1 x i64>* %B call void @llvm.arm.neon.vst4.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 64) @@ -63,8 +63,8 @@ define void @vst4i64(i64* %A, <1 x i64>* %B) nounwind { define void @vst4Qi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vst4Qi8: ;Check the alignment value. Max for this instruction is 256 bits: -;CHECK: vst4.8 {d16, d18, d20, d22}, [r0, :256]! -;CHECK: vst4.8 {d17, d19, d21, d23}, [r0, :256] +;CHECK: vst4.8 {d16, d18, d20, d22}, [r0:256]! +;CHECK: vst4.8 {d17, d19, d21, d23}, [r0:256] %tmp1 = load <16 x i8>* %B call void @llvm.arm.neon.vst4.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 64) ret void -- cgit v1.2.3