From a9a5c537ad0bf5ab68ed79c163500a4fcb3fc3ff Mon Sep 17 00:00:00 2001
From: Jack Carter <jack.carter@imgtec.com>
Date: Tue, 9 Apr 2013 23:19:50 +0000
Subject: Mips specific inline asm operand modifier 'D'

Modifier 'D' is to use the second word of a double integer.

We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.



#include "stdio.h"

int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
    int i;

    // The first word. Notice, no 'D'
    {asm (
    "lw    %0,%1;"
    : "=r" (i)
    : "m" (*(b+4))
    );}

    printf("%d\n",i);

    // The second word
    {asm (
    "lw    %0,%D1;"
    : "=r" (i)
    : "m" (*(b+4))
    );}

    printf("%d\n",i);
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179135 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/Mips/inlineasmmemop.ll | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

(limited to 'test/CodeGen/Mips')

diff --git a/test/CodeGen/Mips/inlineasmmemop.ll b/test/CodeGen/Mips/inlineasmmemop.ll
index 1c7c4437b8..dbd62a165d 100644
--- a/test/CodeGen/Mips/inlineasmmemop.ll
+++ b/test/CodeGen/Mips/inlineasmmemop.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -march=mipsel < %s | FileCheck %s
 
+; Simple memory
 @g1 = external global i32
 
 define i32 @f1(i32 %x) nounwind {
@@ -21,3 +22,19 @@ entry:
   ret i32 %0
 }
 
+; "D": Second word of double word. This works for any memory element.
+; CHECK: #APP
+; CHECK-NEXT: lw ${{[0-9]+}},4(${{[0-9]+}});
+; CHECK-NEXT: #NO_APP
+
+@b = common global [20 x i32] zeroinitializer, align 4
+
+define void @main() #0 {
+entry:
+  tail call void asm sideeffect "    lw    $0,${1:D};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3)) #1
+  ret void
+}
+
+attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { nounwind }
+
-- 
cgit v1.2.3