From db3461662e7945e04fe42e0d606581bba73c29dc Mon Sep 17 00:00:00 2001 From: Nadav Rotem Date: Sat, 21 Apr 2012 20:08:32 +0000 Subject: Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155296 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/2011-04-19-sclr-bb.ll | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 test/CodeGen/X86/2011-04-19-sclr-bb.ll (limited to 'test/CodeGen/X86/2011-04-19-sclr-bb.ll') diff --git a/test/CodeGen/X86/2011-04-19-sclr-bb.ll b/test/CodeGen/X86/2011-04-19-sclr-bb.ll new file mode 100644 index 0000000000..771e4b3a08 --- /dev/null +++ b/test/CodeGen/X86/2011-04-19-sclr-bb.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s + +; Make sure that values of illegal types are not scalarized between basic blocks. +;CHECK: test +;CHECK-NOT: pinsrw +;CHECK-NOT: pextrb +;CHECK: ret +define void @test(i1 %cond) { +ENTRY: + br label %LOOP +LOOP: + %vec1 = phi <4 x i1> [ %vec1_or_2, %LOOP ], [ zeroinitializer, %ENTRY ] + %vec2 = phi <4 x i1> [ %vec2_and_1, %LOOP ], [ zeroinitializer, %ENTRY ] + %vec1_or_2 = or <4 x i1> %vec1, %vec2 + %vec2_and_1 = and <4 x i1> %vec2, %vec1 + br i1 %cond, label %LOOP, label %EXIT + +EXIT: + ret void +} + -- cgit v1.2.3