From 5cd95e1478ddb8f3f1efde56a1cd2db47b312d72 Mon Sep 17 00:00:00 2001
From: Nadav Rotem <nadav.rotem@intel.com>
Date: Wed, 11 Jul 2012 13:27:05 +0000
Subject: When ext-loading and trunc-storing vectors to memory, on x86 32bit
 systems, allow loads/stores of 64bit values from xmm registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160044 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/2012-07-10-extload64.ll | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

(limited to 'test/CodeGen/X86/2012-07-10-extload64.ll')

diff --git a/test/CodeGen/X86/2012-07-10-extload64.ll b/test/CodeGen/X86/2012-07-10-extload64.ll
index 3284f5e7e3..906b748fa4 100644
--- a/test/CodeGen/X86/2012-07-10-extload64.ll
+++ b/test/CodeGen/X86/2012-07-10-extload64.ll
@@ -3,11 +3,30 @@
 ; CHECK: load_store
 define void @load_store(<4 x i16>* %in) {
 entry:
+; CHECK: movsd
   %A27 = load <4 x i16>* %in, align 4
   %A28 = add <4 x i16> %A27, %A27
+; CHECK: movlpd
   store <4 x i16> %A28, <4 x i16>* %in, align 4
   ret void
-; CHECK: movd
-; CHECK: pinsrd
 ; CHECK: ret
 }
+
+; Make sure that we store a 64bit value, even on 32bit systems.
+;CHECK: store_64
+define void @store_64(<2 x i32>* %ptr) {
+BB:
+  store <2 x i32> zeroinitializer, <2 x i32>* %ptr
+  ret void
+;CHECK: movlpd
+;CHECK: ret
+}
+
+;CHECK: load_64
+define <2 x i32> @load_64(<2 x i32>* %ptr) {
+BB:
+  %t = load <2 x i32>* %ptr
+  ret <2 x i32> %t
+;CHECK: movsd
+;CHECK: ret
+}
-- 
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