From 7466678003f38f985d5b2dffd0917643137b11cf Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Sat, 26 Feb 2011 22:48:07 +0000 Subject: Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic. 1. Inform users of ADDEs with two 0 operands that it never sets carry 2. Fold other ADDs or ADDCs into the ADDE if possible It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126557 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/adde-carry.ll | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 test/CodeGen/X86/adde-carry.ll (limited to 'test/CodeGen/X86/adde-carry.ll') diff --git a/test/CodeGen/X86/adde-carry.ll b/test/CodeGen/X86/adde-carry.ll new file mode 100644 index 0000000000..98c4f99343 --- /dev/null +++ b/test/CodeGen/X86/adde-carry.ll @@ -0,0 +1,26 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s -check-prefix=CHECK-64 +; RUN: llc -march=x86 < %s | FileCheck %s -check-prefix=CHECK-32 + +define void @a(i64* nocapture %s, i64* nocapture %t, i64 %a, i64 %b, i64 %c) nounwind { +entry: + %0 = zext i64 %a to i128 + %1 = zext i64 %b to i128 + %2 = add i128 %1, %0 + %3 = zext i64 %c to i128 + %4 = shl i128 %3, 64 + %5 = add i128 %4, %2 + %6 = lshr i128 %5, 64 + %7 = trunc i128 %6 to i64 + store i64 %7, i64* %s, align 8 + %8 = trunc i128 %2 to i64 + store i64 %8, i64* %t, align 8 + ret void + +; CHECK-32: addl +; CHECK-32: adcl +; CHECK-32: adcl $0 +; CHECK-32: adcl $0 + +; CHECK-64: addq +; CHECK-64: adcq $0 +} -- cgit v1.2.3