From 189bce48c7121b0d21f23aa3dec91fcf66e27925 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 8 May 2012 06:58:15 +0000 Subject: Remove 256-bit AVX non-temporal store intrinsics. Similar was previously done for 128-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156375 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/avx-intrinsics-x86.ll | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'test/CodeGen/X86/avx-intrinsics-x86.ll') diff --git a/test/CodeGen/X86/avx-intrinsics-x86.ll b/test/CodeGen/X86/avx-intrinsics-x86.ll index b33493252a..4cca693d38 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -2555,3 +2555,27 @@ define i32 @crc32_32_32(i32 %a, i32 %b) nounwind { ret i32 %tmp } declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind + +; CHECK: movntdq +define void @movnt_dq(i8* %p, <4 x i64> %a1) nounwind { + %a2 = add <4 x i64> %a1, + tail call void @llvm.x86.avx.movnt.dq.256(i8* %p, <4 x i64> %a2) nounwind + ret void +} +declare void @llvm.x86.avx.movnt.dq.256(i8*, <4 x i64>) nounwind + +; CHECK: movntps +define void @movnt_ps(i8* %p, <8 x float> %a) nounwind { + tail call void @llvm.x86.avx.movnt.ps.256(i8* %p, <8 x float> %a) nounwind + ret void +} +declare void @llvm.x86.avx.movnt.ps.256(i8*, <8 x float>) nounwind + +; CHECK: movntpd +define void @movnt_pd(i8* %p, <4 x double> %a1) nounwind { + ; add operation forces the execution domain. + %a2 = fadd <4 x double> %a1, + tail call void @llvm.x86.avx.movnt.pd.256(i8* %p, <4 x double> %a2) nounwind + ret void +} +declare void @llvm.x86.avx.movnt.pd.256(i8*, <4 x double>) nounwind -- cgit v1.2.3