From 1bd15700a0eb3057d3e2d65070c3fc6b99e0d8a2 Mon Sep 17 00:00:00 2001
From: Nick Lewycky <nicholas@mxc.ca>
Date: Mon, 20 Jun 2011 18:33:26 +0000
Subject: Emit movq for 64-bit register to XMM register moves, but continue to
 accept movd when assembling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133452 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/bitcast2.ll | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

(limited to 'test/CodeGen/X86/bitcast2.ll')

diff --git a/test/CodeGen/X86/bitcast2.ll b/test/CodeGen/X86/bitcast2.ll
index 48922b5f5a..71ecedf8f1 100644
--- a/test/CodeGen/X86/bitcast2.ll
+++ b/test/CodeGen/X86/bitcast2.ll
@@ -1,13 +1,31 @@
-; RUN: llc < %s -march=x86-64 | grep movd | count 2
+; RUN: llc < %s -march=x86-64 | FileCheck %s
 ; RUN: llc < %s -march=x86-64 | not grep rsp
 
 define i64 @test1(double %A) {
+; CHECK: test1
+; CHECK: movq
    %B = bitcast double %A to i64
    ret i64 %B
 }
 
 define double @test2(i64 %A) {
+; CHECK: test2
+; CHECK: movq
    %B = bitcast i64 %A to double
    ret double %B
 }
 
+define i32 @test3(float %A) {
+; CHECK: test3
+; CHECK: movd
+   %B = bitcast float %A to i32
+   ret i32 %B
+}
+
+define float @test4(i32 %A) {
+; CHECK: test4
+; CHECK: movd
+   %B = bitcast i32 %A to float
+   ret float %B
+}
+
-- 
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