From ee0d5d4398fb855c6674da94d902ef45e944f375 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sun, 20 May 2012 06:38:37 +0000 Subject: Properly constrain register classes for sub-registers. Not all GR64 registers have sub_8bit sub-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157150 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/fast-isel.ll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'test/CodeGen/X86/fast-isel.ll') diff --git a/test/CodeGen/X86/fast-isel.ll b/test/CodeGen/X86/fast-isel.ll index c88d52968d..9d9a520c6a 100644 --- a/test/CodeGen/X86/fast-isel.ll +++ b/test/CodeGen/X86/fast-isel.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86 -mattr=sse2 -; RUN: llc < %s -fast-isel -fast-isel-abort -mtriple=x86_64-apple-darwin10 +; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2 +; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10 ; This tests very minimal fast-isel functionality. -- cgit v1.2.3