From 5eecb7f164a926540bc1bdffc7df81ab4ddce710 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 26 Nov 2008 02:00:14 +0000 Subject: This adds in some code (currently disabled unless you pass -enable-smarter-addr-folding to llc) that gives CGP a better cost model for when to sink computations into addressing modes. The basic observation is that sinking increases register pressure when part of the addr computation has to be available for other reasons, such as having a use that is a non-memory operation. In cases where it works, it can substantially reduce register pressure. This code is currently an overall win on 403.gcc and 255.vortex (the two things I've been looking at), but there are several things I want to do before enabling it by default: 1. This isn't doing any caching of results, so it is much slower than it could be. It currently slows down release-asserts llc by 1.7% on 176.gcc: 27.12s -> 27.60s. 2. This doesn't think about inline asm memory operands yet. 3. The cost model botches the case when the needed value is live across the computation for other reasons. I'll continue poking at this, and eventually turn it on as llcbeta. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60074 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/isel-sink3.ll | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 test/CodeGen/X86/isel-sink3.ll (limited to 'test/CodeGen/X86/isel-sink3.ll') diff --git a/test/CodeGen/X86/isel-sink3.ll b/test/CodeGen/X86/isel-sink3.ll new file mode 100644 index 0000000000..a0fba3acc5 --- /dev/null +++ b/test/CodeGen/X86/isel-sink3.ll @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -enable-smarter-addr-folding | grep {addl.(%eax), %ecx} +; RUN: llvm-as < %s | llc -enable-smarter-addr-folding | not grep leal +; this should not sink %1 into bb1, that would increase reg pressure. + +; rdar://6399178 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin7" + +define i32 @bar(i32** %P) nounwind { +entry: + %0 = load i32** %P, align 4 ; [#uses=2] + %1 = getelementptr i32* %0, i32 1 ; [#uses=1] + %2 = icmp ugt i32* %1, inttoptr (i64 1233 to i32*) ; [#uses=1] + br i1 %2, label %bb1, label %bb + +bb: ; preds = %entry + store i32* inttoptr (i64 123 to i32*), i32** %P, align 4 + br label %bb1 + +bb1: ; preds = %entry, %bb + %3 = getelementptr i32* %1, i32 1 ; [#uses=1] + %4 = load i32* %3, align 4 ; [#uses=1] + ret i32 %4 +} -- cgit v1.2.3