From b96a393b090a0d9c11fb4b776d2b3c73a1d84a0c Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 9 Oct 2013 02:18:34 +0000 Subject: Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192266 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/mmx-builtins.ll | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'test/CodeGen/X86/mmx-builtins.ll') diff --git a/test/CodeGen/X86/mmx-builtins.ll b/test/CodeGen/X86/mmx-builtins.ll index f5b3f765fe..aabdd53b09 100644 --- a/test/CodeGen/X86/mmx-builtins.ll +++ b/test/CodeGen/X86/mmx-builtins.ll @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx,+ssse3 | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+mmx,+ssse3,-avx | FileCheck %s ; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+mmx,+ssse3,-avx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+avx | FileCheck %s declare x86_mmx @llvm.x86.ssse3.phadd.w(x86_mmx, x86_mmx) nounwind readnone -- cgit v1.2.3