From 5047d7657503dfa8f7d97909c9d5c198646cd0ed Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Fri, 2 Sep 2011 23:52:55 +0000 Subject: Pseudo CMOV instructions don't clobber EFLAGS. The explanation about a 0 argument being materialized as xor is no longer valid. Rematerialization will check if EFLAGS is live before clobbering it. The code produced by X86TargetLowering::EmitLoweredSelect does not clobber EFLAGS. This causes one less testb instruction to be generated in the cmov.ll test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139057 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/or-address.ll | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'test/CodeGen/X86/or-address.ll') diff --git a/test/CodeGen/X86/or-address.ll b/test/CodeGen/X86/or-address.ll index b3fc62736b..f866e419c3 100644 --- a/test/CodeGen/X86/or-address.ll +++ b/test/CodeGen/X86/or-address.ll @@ -47,10 +47,10 @@ return: ; preds = %bb } ; CHECK: test1: -; CHECK: movl %{{.*}}, (%rdi,%rcx,4) -; CHECK: movl %{{.*}}, 8(%rdi,%rcx,4) -; CHECK: movl %{{.*}}, 4(%rdi,%rcx,4) -; CHECK: movl %{{.*}}, 12(%rdi,%rcx,4) +; CHECK: movl %{{.*}}, (%[[RDI:...]],%[[RCX:...]],4) +; CHECK: movl %{{.*}}, 8(%[[RDI]],%[[RCX]],4) +; CHECK: movl %{{.*}}, 4(%[[RDI]],%[[RCX]],4) +; CHECK: movl %{{.*}}, 12(%[[RDI]],%[[RCX]],4) define void @test1(i32* nocapture %array, i32 %r0, i8 signext %k, i8 signext %i0) nounwind { bb.nph: -- cgit v1.2.3