From ed18a3e6b25817136471a0fd1b09ff4edd936055 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Thu, 17 May 2012 23:44:19 +0000 Subject: Remove -join-physregs from the test suite. This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157027 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/phys_subreg_coalesce-3.ll | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'test/CodeGen/X86/phys_subreg_coalesce-3.ll') diff --git a/test/CodeGen/X86/phys_subreg_coalesce-3.ll b/test/CodeGen/X86/phys_subreg_coalesce-3.ll index 4162015ea8..984d7e57e0 100644 --- a/test/CodeGen/X86/phys_subreg_coalesce-3.ll +++ b/test/CodeGen/X86/phys_subreg_coalesce-3.ll @@ -1,10 +1,14 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -join-physregs | FileCheck %s +; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s +; XFAIL: * ; rdar://5571034 ; This requires physreg joining, %vreg13 is live everywhere: ; 304L %CL = COPY %vreg13:sub_8bit; GR32_ABCD:%vreg13 ; 320L %vreg15 = COPY %vreg19; GR32:%vreg15 GR32_NOSP:%vreg19 ; 336L %vreg15 = SAR32rCL %vreg15, %EFLAGS, %CL; GR32:%vreg15 +; +; This test is XFAIL until the register allocator understands trivial physreg +; interference. define void @foo(i32* nocapture %quadrant, i32* nocapture %ptr, i32 %bbSize, i32 %bbStart, i32 %shifts) nounwind ssp { ; CHECK: foo: -- cgit v1.2.3