From a4f4d699ec627e798357929295aecd3d55b8d703 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Fri, 23 Jul 2010 18:03:30 +0000 Subject: DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits are not demanded. This often allows the anyext to be folded away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109242 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/shl-anyext.ll | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 test/CodeGen/X86/shl-anyext.ll (limited to 'test/CodeGen/X86/shl-anyext.ll') diff --git a/test/CodeGen/X86/shl-anyext.ll b/test/CodeGen/X86/shl-anyext.ll new file mode 100644 index 0000000000..6dc95317d1 --- /dev/null +++ b/test/CodeGen/X86/shl-anyext.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s + +; Codegen should be able to use a 32-bit shift instead of a 64-bit shift. +; CHECK: shll $16 + +define fastcc void @test(i32 %level, i64 %a, i64 %b, i64 %c, i64 %d, i32* %p) nounwind { +if.end523: ; preds = %if.end453 + %conv7981749 = zext i32 %level to i64 ; [#uses=1] + %and799 = shl i64 %conv7981749, 16 ; [#uses=1] + %shl800 = and i64 %and799, 16711680 ; [#uses=1] + %or801 = or i64 %shl800, %a ; [#uses=1] + %or806 = or i64 %or801, %b ; [#uses=1] + %or811 = or i64 %or806, %c ; [#uses=1] + %or819 = or i64 %or811, %d ; [#uses=1] + %conv820 = trunc i64 %or819 to i32 ; [#uses=1] + store i32 %conv820, i32* %p + ret void +} -- cgit v1.2.3