From 589f1f5a4321eeee2856baa5c8ab1139d6e0351e Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 28 Oct 2009 03:21:57 +0000 Subject: Teach MachineLICM to unfold loads from constant memory from otherwise unhoistable instructions in order to allow the loads to be hoisted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85364 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/sink-hoist.ll | 64 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) (limited to 'test/CodeGen/X86/sink-hoist.ll') diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll index 7f6366972a..1da30ad26f 100644 --- a/test/CodeGen/X86/sink-hoist.ll +++ b/test/CodeGen/X86/sink-hoist.ll @@ -44,6 +44,7 @@ return: ; Sink instructions with dead EFLAGS defs. +; CHECK: zzz: ; CHECK: je ; CHECK-NEXT: orb @@ -56,3 +57,66 @@ entry: %b_addr.0 = select i1 %tmp2, i8 %tmp4, i8 %tmp3 ; [#uses=1] ret i8 %b_addr.0 } + +; Codegen should hoist and CSE these constants. + +; CHECK: vv: +; CHECK: LCPI4_0(%rip), %xmm0 +; CHECK: LCPI4_1(%rip), %xmm1 +; CHECK: LCPI4_2(%rip), %xmm2 +; CHECK: align +; CHECK-NOT: LCPI +; CHECK: ret + +@_minusZero.6007 = internal constant <4 x float> ; <<4 x float>*> [#uses=0] +@twoTo23.6008 = internal constant <4 x float> ; <<4 x float>*> [#uses=0] + +define void @vv(float* %y, float* %x, i32* %n) nounwind ssp { +entry: + br label %bb60 + +bb: ; preds = %bb60 + %0 = bitcast float* %x_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1] + %1 = load <4 x float>* %0, align 16 ; <<4 x float>> [#uses=4] + %tmp20 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp22 = and <4 x i32> %tmp20, ; <<4 x i32>> [#uses=1] + %tmp23 = bitcast <4 x i32> %tmp22 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp25 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp27 = and <4 x i32> %tmp25, ; <<4 x i32>> [#uses=2] + %tmp30 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %tmp23, <4 x float> , i8 5) ; <<4 x float>> [#uses=1] + %tmp34 = bitcast <4 x float> %tmp30 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp36 = xor <4 x i32> %tmp34, ; <<4 x i32>> [#uses=1] + %tmp37 = and <4 x i32> %tmp36, ; <<4 x i32>> [#uses=1] + %tmp42 = or <4 x i32> %tmp37, %tmp27 ; <<4 x i32>> [#uses=1] + %tmp43 = bitcast <4 x i32> %tmp42 to <4 x float> ; <<4 x float>> [#uses=2] + %tmp45 = fadd <4 x float> %1, %tmp43 ; <<4 x float>> [#uses=1] + %tmp47 = fsub <4 x float> %tmp45, %tmp43 ; <<4 x float>> [#uses=2] + %tmp49 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %1, <4 x float> %tmp47, i8 1) ; <<4 x float>> [#uses=1] + %2 = bitcast <4 x float> %tmp49 to <4 x i32> ; <<4 x i32>> [#uses=1] + %3 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %2) nounwind readnone ; <<4 x float>> [#uses=1] + %tmp53 = fadd <4 x float> %tmp47, %3 ; <<4 x float>> [#uses=1] + %tmp55 = bitcast <4 x float> %tmp53 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp57 = or <4 x i32> %tmp55, %tmp27 ; <<4 x i32>> [#uses=1] + %tmp58 = bitcast <4 x i32> %tmp57 to <4 x float> ; <<4 x float>> [#uses=1] + %4 = bitcast float* %y_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1] + store <4 x float> %tmp58, <4 x float>* %4, align 16 + %5 = getelementptr float* %x_addr.0, i64 4 ; [#uses=1] + %6 = getelementptr float* %y_addr.0, i64 4 ; [#uses=1] + %7 = add i32 %i.0, 4 ; [#uses=1] + br label %bb60 + +bb60: ; preds = %bb, %entry + %i.0 = phi i32 [ 0, %entry ], [ %7, %bb ] ; [#uses=2] + %x_addr.0 = phi float* [ %x, %entry ], [ %5, %bb ] ; [#uses=2] + %y_addr.0 = phi float* [ %y, %entry ], [ %6, %bb ] ; [#uses=2] + %8 = load i32* %n, align 4 ; [#uses=1] + %9 = icmp sgt i32 %8, %i.0 ; [#uses=1] + br i1 %9, label %bb, label %return + +return: ; preds = %bb60 + ret void +} + +declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone + +declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone -- cgit v1.2.3