From 4106f3714e8fc2d3561a3e64244d560b4cc41837 Mon Sep 17 00:00:00 2001
From: Dan Gohman <gohman@apple.com>
Date: Wed, 18 Jul 2007 20:23:34 +0000
Subject: Implement initial memory alignment awareness for SSE instructions.
 Vector loads and stores that have a specified alignment of less than 16 bytes
 now use instructions that support misaligned memory references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40015 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/sse-align-7.ll | 7 +++++++
 1 file changed, 7 insertions(+)
 create mode 100644 test/CodeGen/X86/sse-align-7.ll

(limited to 'test/CodeGen/X86/sse-align-7.ll')

diff --git a/test/CodeGen/X86/sse-align-7.ll b/test/CodeGen/X86/sse-align-7.ll
new file mode 100644
index 0000000000..04b013cea5
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-7.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqa | wc -l | grep 1
+
+define void @bar(<2 x i64>* %p, <2 x i64> %x)
+{
+  store <2 x i64> %x, <2 x i64>* %p
+  ret void
+}
-- 
cgit v1.2.3