From 82767327c59ede1f8663ec9b9a64a668993d501f Mon Sep 17 00:00:00 2001
From: Justin Holewinski <jholewinski@nvidia.com>
Date: Tue, 6 Aug 2013 14:13:27 +0000
Subject: [NVPTX] Start conversion to MC infrastructure

This change converts the NVPTX target to use the MC infrastructure
instead of directly emitting MachineInstr instances. This brings
the target more up-to-date with LLVM TOT, and should fix PR15175
and PR15958 (libNVPTXInstPrinter is empty) as a side-effect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187798 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/NVPTX/fp-literals.ll | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 test/CodeGen/NVPTX/fp-literals.ll

(limited to 'test/CodeGen')

diff --git a/test/CodeGen/NVPTX/fp-literals.ll b/test/CodeGen/NVPTX/fp-literals.ll
new file mode 100644
index 0000000000..0cc2413e00
--- /dev/null
+++ b/test/CodeGen/NVPTX/fp-literals.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
+
+; Make sure we can properly differentiate between single-precision and
+; double-precision FP literals.
+
+; CHECK: myaddf
+; CHECK: add.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, 0f3F800000
+define float @myaddf(float %a) {
+  %ret = fadd float %a, 1.0
+  ret float %ret
+}
+
+; CHECK: myaddd
+; CHECK: add.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, 0d3FF0000000000000
+define double @myaddd(double %a) {
+  %ret = fadd double %a, 1.0
+  ret double %ret
+}
-- 
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