From 97e6b8390b405f9e7dd994f111a5950fca2962d2 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 24 Feb 2010 01:42:31 +0000 Subject: Re-apply 96540 and 96556 with fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97011 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/2010-02-23-DAGCombineBug.ll | 17 +++++++++++++++ test/CodeGen/X86/critical-edge-split.ll | 2 +- test/CodeGen/X86/ins_subreg_coalesce-3.ll | 2 +- test/CodeGen/X86/trunc-to-bool.ll | 21 ++++++++++++------- test/CodeGen/X86/xor-icmp.ll | 31 ++++++++++++++++++++++++++++ 5 files changed, 63 insertions(+), 10 deletions(-) create mode 100644 test/CodeGen/X86/2010-02-23-DAGCombineBug.ll (limited to 'test/CodeGen') diff --git a/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll b/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll new file mode 100644 index 0000000000..ea3621f9f1 --- /dev/null +++ b/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -march=x86 | FileCheck %s + +define i32* @t() nounwind optsize ssp { +entry: +; CHECK: t: +; CHECK: testl %eax, %eax +; CHECK: js + %cmp = icmp slt i32 undef, 0 ; [#uses=1] + %outsearch.0 = select i1 %cmp, i1 false, i1 true ; [#uses=1] + br i1 %outsearch.0, label %if.then27, label %if.else29 + +if.then27: ; preds = %entry + ret i32* undef + +if.else29: ; preds = %entry + unreachable +} diff --git a/test/CodeGen/X86/critical-edge-split.ll b/test/CodeGen/X86/critical-edge-split.ll index 4fe554de75..f29cbf323e 100644 --- a/test/CodeGen/X86/critical-edge-split.ll +++ b/test/CodeGen/X86/critical-edge-split.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -tailcallopt=false -stats -info-output-file - | grep asm-printer | grep 31 +; RUN: llc < %s -mtriple=i386-apple-darwin -stats -info-output-file - | grep asm-printer | grep 29 %CC = type { %Register } %II = type { %"struct.XX::II::$_74" } diff --git a/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/test/CodeGen/X86/ins_subreg_coalesce-3.ll index 627edc51c1..8c1c409766 100644 --- a/test/CodeGen/X86/ins_subreg_coalesce-3.ll +++ b/test/CodeGen/X86/ins_subreg_coalesce-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep mov | count 5 +; RUN: llc < %s -march=x86-64 | grep mov | count 3 %struct.COMPOSITE = type { i8, i16, i16 } %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } diff --git a/test/CodeGen/X86/trunc-to-bool.ll b/test/CodeGen/X86/trunc-to-bool.ll index bfab1aef90..6062084106 100644 --- a/test/CodeGen/X86/trunc-to-bool.ll +++ b/test/CodeGen/X86/trunc-to-bool.ll @@ -3,13 +3,14 @@ ; value and as the operand of a branch. ; RUN: llc < %s -march=x86 | FileCheck %s -define i1 @test1(i32 %X) zeroext { +define i1 @test1(i32 %X) zeroext nounwind { %Y = trunc i32 %X to i1 ret i1 %Y } +; CHECK: test1: ; CHECK: andl $1, %eax -define i1 @test2(i32 %val, i32 %mask) { +define i1 @test2(i32 %val, i32 %mask) nounwind { entry: %shifted = ashr i32 %val, %mask %anded = and i32 %shifted, 1 @@ -20,9 +21,10 @@ ret_true: ret_false: ret i1 false } -; CHECK: testb $1, %al +; CHECK: test2: +; CHECK: btl %eax -define i32 @test3(i8* %ptr) { +define i32 @test3(i8* %ptr) nounwind { %val = load i8* %ptr %tmp = trunc i8 %val to i1 br i1 %tmp, label %cond_true, label %cond_false @@ -31,9 +33,10 @@ cond_true: cond_false: ret i32 42 } -; CHECK: testb $1, %al +; CHECK: test3: +; CHECK: testb $1, (%eax) -define i32 @test4(i8* %ptr) { +define i32 @test4(i8* %ptr) nounwind { %tmp = ptrtoint i8* %ptr to i1 br i1 %tmp, label %cond_true, label %cond_false cond_true: @@ -41,9 +44,10 @@ cond_true: cond_false: ret i32 42 } -; CHECK: testb $1, %al +; CHECK: test4: +; CHECK: testb $1, 4(%esp) -define i32 @test6(double %d) { +define i32 @test5(double %d) nounwind { %tmp = fptosi double %d to i1 br i1 %tmp, label %cond_true, label %cond_false cond_true: @@ -51,4 +55,5 @@ cond_true: cond_false: ret i32 42 } +; CHECK: test5: ; CHECK: testb $1 diff --git a/test/CodeGen/X86/xor-icmp.ll b/test/CodeGen/X86/xor-icmp.ll index a6bdb13ec6..2d75c5d762 100644 --- a/test/CodeGen/X86/xor-icmp.ll +++ b/test/CodeGen/X86/xor-icmp.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32 ; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64 +; rdar://7367229 define i32 @t(i32 %a, i32 %b) nounwind ssp { entry: @@ -34,3 +35,33 @@ bb1: ; preds = %entry declare i32 @foo(...) declare i32 @bar(...) + +define i32 @t2(i32 %x, i32 %y) nounwind ssp { +; X32: t2: +; X32: cmpl +; X32: sete +; X32: cmpl +; X32: sete +; X32-NOT: xor +; X32: je + +; X64: t2: +; X64: testl +; X64: sete +; X64: testl +; X64: sete +; X64-NOT: xor +; X64: je +entry: + %0 = icmp eq i32 %x, 0 ; [#uses=1] + %1 = icmp eq i32 %y, 0 ; [#uses=1] + %2 = xor i1 %1, %0 ; [#uses=1] + br i1 %2, label %bb, label %return + +bb: ; preds = %entry + %3 = tail call i32 (...)* @foo() nounwind ; [#uses=0] + ret i32 undef + +return: ; preds = %entry + ret i32 undef +} -- cgit v1.2.3