From f2938bf8dae4dd7ef762e521c63d34767ffcd61c Mon Sep 17 00:00:00 2001 From: Kostya Serebryany Date: Fri, 23 May 2014 11:52:07 +0000 Subject: [asan] properly instrument memory accesses that have small alignment (smaller than min(8,size)) by making two checks instead of one. This may slowdown some cases, e.g. long long on 32-bit or wide loads produced after loop unrolling. The benefit is higher sencitivity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209508 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/Instrumentation/AddressSanitizer/basic.ll | 16 ++++++++++++++-- .../instrumentation-with-call-threshold.ll | 8 ++++---- test/Instrumentation/AddressSanitizer/test64.ll | 10 +++++++--- 3 files changed, 25 insertions(+), 9 deletions(-) (limited to 'test/Instrumentation') diff --git a/test/Instrumentation/AddressSanitizer/basic.ll b/test/Instrumentation/AddressSanitizer/basic.ll index 7a125a3964..7d1aa0b853 100644 --- a/test/Instrumentation/AddressSanitizer/basic.ll +++ b/test/Instrumentation/AddressSanitizer/basic.ll @@ -34,7 +34,7 @@ define i32 @test_load(i32* %a) sanitize_address { entry: - %tmp1 = load i32* %a + %tmp1 = load i32* %a, align 4 ret i32 %tmp1 } @@ -66,7 +66,7 @@ define void @test_store(i32* %a) sanitize_address { ; entry: - store i32 42, i32* %a + store i32 42, i32* %a, align 4 ret void } @@ -115,6 +115,18 @@ define void @i40test(i40* %a, i40* %b) nounwind uwtable sanitize_address { ; CHECK: __asan_report_store_n{{.*}}, i64 5) ; CHECK: ret void +define void @i64test_align1(i64* %b) nounwind uwtable sanitize_address { + entry: + store i64 0, i64* %b, align 1 + ret void +} + +; CHECK-LABEL: i64test_align1 +; CHECK: __asan_report_store_n{{.*}}, i64 8) +; CHECK: __asan_report_store_n{{.*}}, i64 8) +; CHECK: ret void + + define void @i80test(i80* %a, i80* %b) nounwind uwtable sanitize_address { entry: %t = load i80* %a diff --git a/test/Instrumentation/AddressSanitizer/instrumentation-with-call-threshold.ll b/test/Instrumentation/AddressSanitizer/instrumentation-with-call-threshold.ll index dd82444b17..adb434112c 100644 --- a/test/Instrumentation/AddressSanitizer/instrumentation-with-call-threshold.ll +++ b/test/Instrumentation/AddressSanitizer/instrumentation-with-call-threshold.ll @@ -20,10 +20,10 @@ entry: ; CHECK-CUSTOM-PREFIX: call void @__foo_load8 ; CHECK-CUSTOM-PREFIX: call void @__foo_loadN ; CHECK-INLINE-NOT: call void @__asan_load - %tmp1 = load i32* %a - %tmp2 = load i64* %b - %tmp3 = load i512* %c - %tmp4 = load i80* %d + %tmp1 = load i32* %a, align 4 + %tmp2 = load i64* %b, align 8 + %tmp3 = load i512* %c, align 32 + %tmp4 = load i80* %d, align 8 ret void } diff --git a/test/Instrumentation/AddressSanitizer/test64.ll b/test/Instrumentation/AddressSanitizer/test64.ll index 4f3ed5b478..fd93f4576a 100644 --- a/test/Instrumentation/AddressSanitizer/test64.ll +++ b/test/Instrumentation/AddressSanitizer/test64.ll @@ -6,7 +6,7 @@ entry: %tmp1 = load i32* %a, align 4 ret i32 %tmp1 } -; CHECK: @read_4_bytes +; CHECK-LABEL: @read_4_bytes ; CHECK-NOT: ret ; CHECK: lshr {{.*}} 3 ; Check for ASAN's Offset for 64-bit (7fff8000) @@ -19,8 +19,10 @@ entry: ret void } -; CHECK: @example_atomicrmw +; CHECK-LABEL: @example_atomicrmw ; CHECK: lshr {{.*}} 3 +; CHECK: __asan_report_store8 +; CHECK-NOT: __asan_report ; CHECK: atomicrmw ; CHECK: ret @@ -30,7 +32,9 @@ entry: ret void } -; CHECK: @example_cmpxchg +; CHECK-LABEL: @example_cmpxchg ; CHECK: lshr {{.*}} 3 +; CHECK: __asan_report_store8 +; CHECK-NOT: __asan_report ; CHECK: cmpxchg ; CHECK: ret -- cgit v1.2.3