From 003132d48cbb371c9bf059de4740f6d1e4142868 Mon Sep 17 00:00:00 2001 From: Saleem Abdulrasool Date: Fri, 10 Jan 2014 04:38:35 +0000 Subject: ARM IAS: support GNU extension for ldrd, strd The GNU assembler has an extension that allows for the elision of the paired register (dt2) for the LDRD and STRD mnemonics. Add support for this in the assembly parser. Canonicalise the usage during the instruction parsing from the specified version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198915 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/ARM/arm-memory-instructions.s | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'test/MC/ARM/arm-memory-instructions.s') diff --git a/test/MC/ARM/arm-memory-instructions.s b/test/MC/ARM/arm-memory-instructions.s index ad35dd26a0..f41c779b8f 100644 --- a/test/MC/ARM/arm-memory-instructions.s +++ b/test/MC/ARM/arm-memory-instructions.s @@ -485,3 +485,14 @@ Lbaz: .quad 0 @ CHECK: strht r8, [r1], #-25 @ encoding: [0xb9,0x81,0x61,0xe0] @ CHECK: strht r5, [r3], r4 @ encoding: [0xb4,0x50,0xa3,0xe0] @ CHECK: strht r6, [r8], -r0 @ encoding: [0xb0,0x60,0x28,0xe0] + +@------------------------------------------------------------------------------ +@ GNU Assembler Compatibility +@------------------------------------------------------------------------------ + + ldrd r0, [sp] + strd r0, [sp] + +@ CHECK: ldrd r0, r1, [sp] @ encoding: [0xd0,0x00,0xcd,0xe1] +@ CHECK: strd r0, r1, [sp] @ encoding: [0xf0,0x00,0xcd,0xe1] + -- cgit v1.2.3