From 280dfad48940a0a51726308dd3daa3b1b0d18705 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 21 Oct 2011 18:54:25 +0000 Subject: ARM VLD parsing and encoding. Next step in the ongoing saga of NEON load/store assmebly parsing. Handle VLD1 instructions that take a two-register register list. Adjust the instruction definitions to only have the single encoded register as an operand. The super-register from the pseudo is kept as an implicit def, so passes which come after pseudo-expansion still know that the instruction defines the other subregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/ARM/neon-vld-encoding.s | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'test/MC') diff --git a/test/MC/ARM/neon-vld-encoding.s b/test/MC/ARM/neon-vld-encoding.s index 04367db010..21753c0d3d 100644 --- a/test/MC/ARM/neon-vld-encoding.s +++ b/test/MC/ARM/neon-vld-encoding.s @@ -4,19 +4,19 @@ vld1.16 {d16}, [r0] vld1.32 {d16}, [r0] vld1.64 {d16}, [r0] -@ vld1.8 {d16, d17}, [r0, :64] -@ vld1.16 {d16, d17}, [r0, :128] -@ vld1.32 {d16, d17}, [r0] -@ vld1.64 {d16, d17}, [r0] + vld1.8 {d16, d17}, [r0, :64] + vld1.16 {d16, d17}, [r0, :128] + vld1.32 {d16, d17}, [r0] + vld1.64 {d16, d17}, [r0] @ CHECK: vld1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x60,0xf4] @ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x60,0xf4] @ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x60,0xf4] @ CHECK: vld1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x60,0xf4] -@ FIXME: vld1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x60,0xf4] -@ FIXME: vld1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x60,0xf4] -@ FIXME: vld1.32 {d16, d17}, [r0]@ encoding: [0x8f,0x0a,0x60,0xf4] -@ FIXME: vld1.64 {d16, d17}, [r0]@ encoding: [0xcf,0x0a,0x60,0xf4] +@ CHECK: vld1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x60,0xf4] +@ CHECK: vld1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x60,0xf4] +@ CHECK: vld1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x60,0xf4] +@ CHECK: vld1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x60,0xf4] @ vld2.8 {d16, d17}, [r0, :64] -- cgit v1.2.3