From 6abfcfe1555fb8e95eb7b2c3189785b9e5ed817d Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Wed, 22 Jan 2014 15:08:27 +0000 Subject: [x86] Allow address-size overrides for SCAS{8,16,32,64} (PR9385) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199805 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/X86/index-operations.s | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'test/MC') diff --git a/test/MC/X86/index-operations.s b/test/MC/X86/index-operations.s index ffad9596c8..f1ccfe817c 100644 --- a/test/MC/X86/index-operations.s +++ b/test/MC/X86/index-operations.s @@ -74,3 +74,23 @@ stos %rax, (%edi) // 64: stosq %rax, %es:(%edi) # encoding: [0x48,0x67,0xab] // ERR32: only available in 64-bit mode // ERR16: only available in 64-bit mode + +scas %es:(%edi), %al +// 64: scasb %es:(%edi), %al # encoding: [0x67,0xae] +// 32: scasb %es:(%edi), %al # encoding: [0xae] +// 16: scasb %es:(%edi), %al # encoding: [0x67,0xae] + +scasq %es:(%edi) +// 64: scasq %es:(%edi), %rax # encoding: [0x48,0x67,0xaf] +// ERR32: 64-bit +// ERR16: 64-bit + +scasl %es:(%edi), %al +// ERR64: invalid operand +// ERR32: invalid operand +// ERR16: invalid operand + +scas %es:(%di), %ax +// ERR64: invalid 16-bit base register +// 16: scasw %es:(%di), %ax # encoding: [0xaf] +// 32: scasw %es:(%di), %ax # encoding: [0x66,0x67,0xaf] -- cgit v1.2.3