From 76806b6a434ad5477727d3733d18fe309a1281fe Mon Sep 17 00:00:00 2001
From: Tanya Lattner <tonic@nondot.org>
Date: Sun, 9 Mar 2008 08:16:40 +0000
Subject: Remove llvm-upgrade and update tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48103 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/Transforms/InstCombine/bit-tracking.ll | 30 ++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

(limited to 'test/Transforms/InstCombine/bit-tracking.ll')

diff --git a/test/Transforms/InstCombine/bit-tracking.ll b/test/Transforms/InstCombine/bit-tracking.ll
index 2575ae5520..d090c69d7f 100644
--- a/test/Transforms/InstCombine/bit-tracking.ll
+++ b/test/Transforms/InstCombine/bit-tracking.ll
@@ -1,26 +1,26 @@
 ; This file contains various testcases that require tracking whether bits are
 ; set or cleared by various instructions.
-; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine -instcombine | llvm-dis |\
+; RUN: llvm-as < %s | opt -instcombine -instcombine | llvm-dis |\
 ; RUN:   not grep %ELIM
 
 ; Reduce down to a single XOR
-int %test3(int %B) {
-        %ELIMinc = and int %B, 1
-        %tmp.5 = xor int %ELIMinc, 1
-        %ELIM7 = and int %B, -2
-        %tmp.8 = or int %tmp.5, %ELIM7
-        ret int %tmp.8
+define i32 @test3(i32 %B) {
+        %ELIMinc = and i32 %B, 1                ; <i32> [#uses=1]
+        %tmp.5 = xor i32 %ELIMinc, 1            ; <i32> [#uses=1]
+        %ELIM7 = and i32 %B, -2         ; <i32> [#uses=1]
+        %tmp.8 = or i32 %tmp.5, %ELIM7          ; <i32> [#uses=1]
+        ret i32 %tmp.8
 }
 
 ; Finally, a bigger case where we chain things together.  This corresponds to
 ; incrementing a single-bit bitfield, which should become just an xor.
-int %test4(int %B) {
-        %ELIM3 = shl int %B, ubyte 31
-        %ELIM4 = shr int %ELIM3, ubyte 31
-        %inc = add int %ELIM4, 1
-        %ELIM5 = and int %inc, 1
-        %ELIM7 = and int %B, -2
-        %tmp.8 = or int %ELIM5, %ELIM7
-        ret int %tmp.8
+define i32 @test4(i32 %B) {
+        %ELIM3 = shl i32 %B, 31         ; <i32> [#uses=1]
+        %ELIM4 = ashr i32 %ELIM3, 31            ; <i32> [#uses=1]
+        %inc = add i32 %ELIM4, 1                ; <i32> [#uses=1]
+        %ELIM5 = and i32 %inc, 1                ; <i32> [#uses=1]
+        %ELIM7 = and i32 %B, -2         ; <i32> [#uses=1]
+        %tmp.8 = or i32 %ELIM5, %ELIM7          ; <i32> [#uses=1]
+        ret i32 %tmp.8
 }
 
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