From 1824bd0ef84bd162065f9d1fad4c325a39736248 Mon Sep 17 00:00:00 2001 From: Chad Rosier Date: Tue, 15 Oct 2013 21:18:44 +0000 Subject: [AArch64] Add support for NEON scalar signed saturating absolute value and scalar signed saturating negate instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192733 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/AArch64/neon-scalar-abs.ll | 49 ++++++++++++++++++++++ test/CodeGen/AArch64/neon-scalar-neg.ll | 49 ++++++++++++++++++++++ test/MC/AArch64/neon-scalar-abs.s | 17 ++++++++ test/MC/AArch64/neon-scalar-neg.s | 17 ++++++++ test/MC/Disassembler/AArch64/neon-instructions.txt | 24 +++++++++++ 5 files changed, 156 insertions(+) create mode 100644 test/CodeGen/AArch64/neon-scalar-abs.ll create mode 100644 test/CodeGen/AArch64/neon-scalar-neg.ll create mode 100644 test/MC/AArch64/neon-scalar-abs.s create mode 100644 test/MC/AArch64/neon-scalar-neg.s (limited to 'test') diff --git a/test/CodeGen/AArch64/neon-scalar-abs.ll b/test/CodeGen/AArch64/neon-scalar-abs.ll new file mode 100644 index 0000000000..7a1c73a4e8 --- /dev/null +++ b/test/CodeGen/AArch64/neon-scalar-abs.ll @@ -0,0 +1,49 @@ +; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s + +define i8 @test_vqabsb_s8(i8 %a) { +; CHECK: test_vqabsb_s8 +; CHECK: sqabs {{b[0-9]+}}, {{b[0-9]+}} +entry: + %vqabs.i = insertelement <1 x i8> undef, i8 %a, i32 0 + %vqabs1.i = call <1 x i8> @llvm.arm.neon.vqabs.v1i8(<1 x i8> %vqabs.i) + %0 = extractelement <1 x i8> %vqabs1.i, i32 0 + ret i8 %0 +} + +declare <1 x i8> @llvm.arm.neon.vqabs.v1i8(<1 x i8>) + +define i16 @test_vqabsh_s16(i16 %a) { +; CHECK: test_vqabsh_s16 +; CHECK: sqabs {{h[0-9]+}}, {{h[0-9]+}} +entry: + %vqabs.i = insertelement <1 x i16> undef, i16 %a, i32 0 + %vqabs1.i = call <1 x i16> @llvm.arm.neon.vqabs.v1i16(<1 x i16> %vqabs.i) + %0 = extractelement <1 x i16> %vqabs1.i, i32 0 + ret i16 %0 +} + +declare <1 x i16> @llvm.arm.neon.vqabs.v1i16(<1 x i16>) + +define i32 @test_vqabss_s32(i32 %a) { +; CHECK: test_vqabss_s32 +; CHECK: sqabs {{s[0-9]+}}, {{s[0-9]+}} +entry: + %vqabs.i = insertelement <1 x i32> undef, i32 %a, i32 0 + %vqabs1.i = call <1 x i32> @llvm.arm.neon.vqabs.v1i32(<1 x i32> %vqabs.i) + %0 = extractelement <1 x i32> %vqabs1.i, i32 0 + ret i32 %0 +} + +declare <1 x i32> @llvm.arm.neon.vqabs.v1i32(<1 x i32>) + +define i64 @test_vqabsd_s64(i64 %a) { +; CHECK: test_vqabsd_s64 +; CHECK: sqabs {{d[0-9]+}}, {{d[0-9]+}} +entry: + %vqabs.i = insertelement <1 x i64> undef, i64 %a, i32 0 + %vqabs1.i = call <1 x i64> @llvm.arm.neon.vqabs.v1i64(<1 x i64> %vqabs.i) + %0 = extractelement <1 x i64> %vqabs1.i, i32 0 + ret i64 %0 +} + +declare <1 x i64> @llvm.arm.neon.vqabs.v1i64(<1 x i64>) diff --git a/test/CodeGen/AArch64/neon-scalar-neg.ll b/test/CodeGen/AArch64/neon-scalar-neg.ll new file mode 100644 index 0000000000..41d48322ad --- /dev/null +++ b/test/CodeGen/AArch64/neon-scalar-neg.ll @@ -0,0 +1,49 @@ +; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s + +define i8 @test_vqnegb_s8(i8 %a) { +; CHECK: test_vqnegb_s8 +; CHECK: sqneg {{b[0-9]+}}, {{b[0-9]+}} +entry: + %vqneg.i = insertelement <1 x i8> undef, i8 %a, i32 0 + %vqneg1.i = call <1 x i8> @llvm.arm.neon.vqneg.v1i8(<1 x i8> %vqneg.i) + %0 = extractelement <1 x i8> %vqneg1.i, i32 0 + ret i8 %0 +} + +declare <1 x i8> @llvm.arm.neon.vqneg.v1i8(<1 x i8>) + +define i16 @test_vqnegh_s16(i16 %a) { +; CHECK: test_vqnegh_s16 +; CHECK: sqneg {{h[0-9]+}}, {{h[0-9]+}} +entry: + %vqneg.i = insertelement <1 x i16> undef, i16 %a, i32 0 + %vqneg1.i = call <1 x i16> @llvm.arm.neon.vqneg.v1i16(<1 x i16> %vqneg.i) + %0 = extractelement <1 x i16> %vqneg1.i, i32 0 + ret i16 %0 +} + +declare <1 x i16> @llvm.arm.neon.vqneg.v1i16(<1 x i16>) + +define i32 @test_vqnegs_s32(i32 %a) { +; CHECK: test_vqnegs_s32 +; CHECK: sqneg {{s[0-9]+}}, {{s[0-9]+}} +entry: + %vqneg.i = insertelement <1 x i32> undef, i32 %a, i32 0 + %vqneg1.i = call <1 x i32> @llvm.arm.neon.vqneg.v1i32(<1 x i32> %vqneg.i) + %0 = extractelement <1 x i32> %vqneg1.i, i32 0 + ret i32 %0 +} + +declare <1 x i32> @llvm.arm.neon.vqneg.v1i32(<1 x i32>) + +define i64 @test_vqnegd_s64(i64 %a) { +; CHECK: test_vqnegd_s64 +; CHECK: sqneg {{d[0-9]+}}, {{d[0-9]+}} +entry: + %vqneg.i = insertelement <1 x i64> undef, i64 %a, i32 0 + %vqneg1.i = call <1 x i64> @llvm.arm.neon.vqneg.v1i64(<1 x i64> %vqneg.i) + %0 = extractelement <1 x i64> %vqneg1.i, i32 0 + ret i64 %0 +} + +declare <1 x i64> @llvm.arm.neon.vqneg.v1i64(<1 x i64>) \ No newline at end of file diff --git a/test/MC/AArch64/neon-scalar-abs.s b/test/MC/AArch64/neon-scalar-abs.s new file mode 100644 index 0000000000..5e10752350 --- /dev/null +++ b/test/MC/AArch64/neon-scalar-abs.s @@ -0,0 +1,17 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s + +// Check that the assembler can handle the documented syntax for AArch64 + +//---------------------------------------------------------------------- +// Scalar Absolute Value +//---------------------------------------------------------------------- + + sqabs b19, b14 + sqabs h21, h15 + sqabs s20, s12 + sqabs d18, d12 + +// CHECK: sqabs b19, b14 // encoding: [0xd3,0x79,0x20,0x5e] +// CHECK: sqabs h21, h15 // encoding: [0xf5,0x79,0x60,0x5e] +// CHECK: sqabs s20, s12 // encoding: [0x94,0x79,0xa0,0x5e] +// CHECK: sqabs d18, d12 // encoding: [0x92,0x79,0xe0,0x5e] diff --git a/test/MC/AArch64/neon-scalar-neg.s b/test/MC/AArch64/neon-scalar-neg.s new file mode 100644 index 0000000000..0e637da794 --- /dev/null +++ b/test/MC/AArch64/neon-scalar-neg.s @@ -0,0 +1,17 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s + +// Check that the assembler can handle the documented syntax for AArch64 + +//---------------------------------------------------------------------- +// Scalar Signed Saturating Negate +//---------------------------------------------------------------------- + + sqneg b19, b14 + sqneg h21, h15 + sqneg s20, s12 + sqneg d18, d12 + +// CHECK: sqneg b19, b14 // encoding: [0xd3,0x79,0x20,0x7e] +// CHECK: sqneg h21, h15 // encoding: [0xf5,0x79,0x60,0x7e] +// CHECK: sqneg s20, s12 // encoding: [0x94,0x79,0xa0,0x7e] +// CHECK: sqneg d18, d12 // encoding: [0x92,0x79,0xe0,0x7e] diff --git a/test/MC/Disassembler/AArch64/neon-instructions.txt b/test/MC/Disassembler/AArch64/neon-instructions.txt index e6c45c0ad4..248071be64 100644 --- a/test/MC/Disassembler/AArch64/neon-instructions.txt +++ b/test/MC/Disassembler/AArch64/neon-instructions.txt @@ -1599,3 +1599,27 @@ #---------------------------------------------------------------------- # CHECK: cmtst d20, d21, d22 0xb4,0x8e,0xf6,0x5e + +#---------------------------------------------------------------------- +# Scalar Absolute Value +#---------------------------------------------------------------------- +# CHECK: sqabs b19, b14 +# CHECK: sqabs h21, h15 +# CHECK: sqabs s20, s12 +# CHECK: sqabs d18, d12 +0xd3,0x79,0x20,0x5e +0xf5,0x79,0x60,0x5e +0x94,0x79,0xa0,0x5e +0x92,0x79,0xe0,0x5e + +#---------------------------------------------------------------------- +# Scalar Signed Saturating Negate +#---------------------------------------------------------------------- +# CHECK: sqneg b19, b14 +# CHECK: sqneg h21, h15 +# CHECK: sqneg s20, s12 +# CHECK: sqneg d18, d12 +0xd3,0x79,0x20,0x7e +0xf5,0x79,0x60,0x7e +0x94,0x79,0xa0,0x7e +0x92,0x79,0xe0,0x7e -- cgit v1.2.3