From cdb9bd7eb9620fab864959efa8f3cfcca06b10de Mon Sep 17 00:00:00 2001 From: Yunzhong Gao Date: Wed, 16 Oct 2013 19:04:11 +0000 Subject: Enabling 3DNow! prefetch instruction for a few AMD processors: bobcat, jaguar, bulldozer and piledriver. Support for the instruction itself seems to have already been added in r178040. Differential Revision: http://llvm-reviews.chandlerc.com/D1933 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192828 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/prefetch.ll | 3 +++ 1 file changed, 3 insertions(+) (limited to 'test') diff --git a/test/CodeGen/X86/prefetch.ll b/test/CodeGen/X86/prefetch.ll index 6157c39c81..d6571acbbb 100644 --- a/test/CodeGen/X86/prefetch.ll +++ b/test/CodeGen/X86/prefetch.ll @@ -2,6 +2,8 @@ ; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s ; RUN: llc < %s -march=x86 -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW ; RUN: llc < %s -march=x86 -mcpu=slm | FileCheck %s -check-prefix=SLM +; RUN: llc < %s -march=x86 -mcpu=btver2 | FileCheck %s -check-prefix=PRFCHW +; RUN: llc < %s -march=x86 -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=NOPRFCHW ; rdar://10538297 @@ -12,6 +14,7 @@ entry: ; CHECK: prefetcht0 ; CHECK: prefetchnta ; PRFCHW: prefetchw +; NOPRFCHW-NOT: prefetchw ; SLM: prefetchw tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 ) tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 ) -- cgit v1.2.3