From ef0b3ca3a8935b5390633dc7bb4adcdb99e0c26a Mon Sep 17 00:00:00 2001 From: Duncan Sands Date: Wed, 9 Nov 2011 14:20:48 +0000 Subject: Speculatively revert commit 144124 (djg) in the hope that the 32 bit dragonegg self-host buildbot will recover (it is complaining about object files differing between different build stages). Original commit message: Add a hack to the scheduler to disable pseudo-two-address dependencies in basic blocks containing calls. This works around a problem in which these artificial dependencies can get tied up in calling seqeunce scheduling in a way that makes the graph unschedulable with the current approach of using artificial physical register dependencies for calling sequences. This fixes PR11314. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144188 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/fold-pcmpeqd-0.ll | 8 +++++++- .../X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll | 16 ---------------- 2 files changed, 7 insertions(+), 17 deletions(-) delete mode 100644 test/CodeGen/X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll (limited to 'test') diff --git a/test/CodeGen/X86/fold-pcmpeqd-0.ll b/test/CodeGen/X86/fold-pcmpeqd-0.ll index 6095a9cd20..647bbdb7f0 100644 --- a/test/CodeGen/X86/fold-pcmpeqd-0.ll +++ b/test/CodeGen/X86/fold-pcmpeqd-0.ll @@ -3,9 +3,15 @@ ; This testcase shouldn't need to spill the -1 value, ; so it should just use pcmpeqd to materialize an all-ones vector. +; For i386, cp load of -1 are folded. -; I386: pcmpeqd +; With -regalloc=greedy, the live range is split before spilling, so the first +; pcmpeq doesn't get folded as a constant pool load. + +; I386-NOT: pcmpeqd +; I386: orps LCPI0_2, %xmm ; I386-NOT: pcmpeqd +; I386: orps LCPI0_2, %xmm ; X86-64: pcmpeqd ; X86-64-NOT: pcmpeqd diff --git a/test/CodeGen/X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll b/test/CodeGen/X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll deleted file mode 100644 index b114a57966..0000000000 --- a/test/CodeGen/X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: llc -march=x86 -mcpu=pentium4 -mtriple=i686-none-linux < %s -; PR11314 - -; Make sure the scheduler's hack to insert artificial dependencies to optimize -; two-address instruction scheduling doesn't interfere with the scheduler's -; hack to model call sequences as artificial physical registers. - -define inreg { i64, i64 } @sscanf(i32 inreg %base.1.i) nounwind { -entry: - %conv38.i92.i = sext i32 %base.1.i to i64 - %rem.i93.i = urem i64 10, %conv38.i92.i - %div.i94.i = udiv i64 10, %conv38.i92.i - %a = insertvalue { i64, i64 } undef, i64 %rem.i93.i, 0 - %b = insertvalue { i64, i64 } %a, i64 %div.i94.i, 1 - ret { i64, i64 } %b -} -- cgit v1.2.3