From 44a65fa552ed61cf9dba8f68f59b05e5137e6b01 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 16 May 2006 07:05:30 +0000 Subject: Allow patterns to refer to physical registers that belong to multiple register classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28323 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/CodeGenTarget.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'utils/TableGen/CodeGenTarget.h') diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h index bedf1bb736..5ed266ff81 100644 --- a/utils/TableGen/CodeGenTarget.h +++ b/utils/TableGen/CodeGenTarget.h @@ -110,6 +110,10 @@ public: } return FoundRC; } + + /// getRegisterVTs - Find the union of all possible ValueTypes for the + /// specified physical register. + std::vector getRegisterVTs(Record *R) const; const std::vector &getLegalValueTypes() const { if (LegalValueTypes.empty()) ReadLegalValueTypes(); -- cgit v1.2.3