From cf711aa5b66ed684ebc65e08369abab911d6f799 Mon Sep 17 00:00:00 2001
From: Dan Gohman <gohman@apple.com>
Date: Tue, 19 Aug 2008 20:58:14 +0000
Subject: For now, restrict FastISel to instructions that only involve one
 register class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55008 91177308-0d34-0410-b5e6-96231b3b80d8
---
 utils/TableGen/FastISelEmitter.cpp | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

(limited to 'utils/TableGen/FastISelEmitter.cpp')

diff --git a/utils/TableGen/FastISelEmitter.cpp b/utils/TableGen/FastISelEmitter.cpp
index 31e0d1953c..b434c15d8c 100644
--- a/utils/TableGen/FastISelEmitter.cpp
+++ b/utils/TableGen/FastISelEmitter.cpp
@@ -62,7 +62,8 @@ struct OperandsSignature {
   ///
   bool initialize(TreePatternNode *InstPatNode,
                   const CodeGenTarget &Target,
-                  MVT::SimpleValueType VT) {
+                  MVT::SimpleValueType VT,
+                  const CodeGenRegisterClass *DstRC) {
     for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
       TreePatternNode *Op = InstPatNode->getChild(i);
       if (!Op->isLeaf())
@@ -82,6 +83,9 @@ struct OperandsSignature {
       const CodeGenRegisterClass *RC = &Target.getRegisterClass(OpLeafRec);
       if (!RC)
         return false;
+      // For now, all the operands must have the same register class.
+      if (DstRC != RC)
+        return false;
       // For now, all the operands must have the same type.
       if (Op->getTypeNum(0) != VT)
         return false;
@@ -230,7 +234,7 @@ void FastISelEmitter::run(std::ostream &OS) {
 
     // Check all the operands.
     OperandsSignature Operands;
-    if (!Operands.initialize(InstPatNode, Target, VT))
+    if (!Operands.initialize(InstPatNode, Target, VT, DstRC))
       continue;
 
     // If it's not a known signature, ignore it.
-- 
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