From b5c1c9c8e30d8498cdb2d0ee215f05ca8dc3e4e2 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Wed, 6 Jun 2007 10:14:55 +0000
Subject: Add clobbersPred - instruction that clobbers condition code /
 register which are used to predicate instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37465 91177308-0d34-0410-b5e6-96231b3b80d8
---
 utils/TableGen/InstrInfoEmitter.cpp | 1 +
 1 file changed, 1 insertion(+)

(limited to 'utils/TableGen/InstrInfoEmitter.cpp')

diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 090c35b01b..df25f25013 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -241,6 +241,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   if (Inst.isCommutable) OS << "|M_COMMUTABLE";
   if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
   if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE";
+  if (Inst.clobbersPred) OS << "|M_CLOBBERS_PRED";
   if (Inst.usesCustomDAGSchedInserter)
     OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
   if (Inst.hasVariableNumberOfOperands)
-- 
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