From a606d955de3b0f777131d74162eb6f11b5f95d75 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Fri, 18 Jun 2010 18:13:55 +0000 Subject: Start TargetRegisterClass indices at 0 instead of 1, so that MachineRegisterInfo doesn't have to confusingly allocate an extra entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106296 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/InstrInfoEmitter.cpp | 3 ++- utils/TableGen/RegisterInfoEmitter.cpp | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'utils/TableGen') diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index e66192a221..f28af1589d 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -92,7 +92,8 @@ InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) { else if (OpR->isSubClassOf("PointerLikeRegClass")) Res += utostr(OpR->getValueAsInt("RegClassKind")) + ", "; else - Res += "0, "; + // -1 means the operand does not have a fixed register class. + Res += "-1, "; // Fill in applicable flags. Res += "0"; diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 26957472c0..a3ca0bc552 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -96,7 +96,7 @@ void RegisterInfoEmitter::runHeader(raw_ostream &OS) { for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { if (i) OS << ",\n"; OS << " " << RegisterClasses[i].getName() << "RegClassID"; - OS << " = " << (i+1); + OS << " = " << i; } OS << "\n };\n\n"; -- cgit v1.2.3