From 15de32d706287e1457ab26b74d731f5367083b99 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sun, 3 Aug 2003 21:58:28 +0000
Subject: add new --gen-instr-desc option

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7545 91177308-0d34-0410-b5e6-96231b3b80d8
---
 utils/TableGen/TableGen.cpp | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

(limited to 'utils')

diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index 990e2b3b35..8a22c54e47 100644
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -22,7 +22,7 @@ enum ActionType {
   PrintRecords,
   GenEmitter,
   GenRegisterEnums, GenRegister, GenRegisterHeader,
-  GenInstrEnums,
+  GenInstrEnums, GenInstrs,
   PrintEnums,
   Parse,
 };
@@ -42,6 +42,8 @@ namespace {
                                "Generate a register info description header"),
                     clEnumValN(GenInstrEnums, "gen-instr-enums",
                                "Generate enum values for instructions"),
+                    clEnumValN(GenInstrs, "gen-instr-desc",
+                               "Generate instruction descriptions"),
                     clEnumValN(PrintEnums, "print-enums",
                                "Print enum values for a class"),
                     clEnumValN(Parse, "parse",
@@ -435,6 +437,9 @@ int main(int argc, char **argv) {
     case GenInstrEnums:
       InstrInfoEmitter(Records).runEnums(*Out);
       break;
+    case GenInstrs:
+      InstrInfoEmitter(Records).run(*Out);
+      break;
 
     case PrintEnums:
       std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
-- 
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