From 72422d38ba6fb2fb0bb9c0c75fe450b3e939ea21 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 11 Mar 2011 23:24:15 +0000 Subject: Pseudo-ize the ARM 'B' instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127510 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/ARMDecoderEmitter.cpp | 3 --- 1 file changed, 3 deletions(-) (limited to 'utils') diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp index 3f2c55f424..2ebfb2e477 100644 --- a/utils/TableGen/ARMDecoderEmitter.cpp +++ b/utils/TableGen/ARMDecoderEmitter.cpp @@ -1592,9 +1592,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI, // better off using the generic RSCri and RSCrs instructions. if (Name == "RSCSri" || Name == "RSCSrs") return false; - // Bcc is in a more generic form than B. Ignore B when decoding. - if (Name == "B") return false; - // Ignore the non-Darwin BL instructions and the TPsoft (TLS) instruction. if (Name == "BL" || Name == "BL_pred" || Name == "BLX" || Name == "BLX_pred" || Name == "TPsoft") -- cgit v1.2.3