//===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==// // // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains the PowerPC implementation of the MRegisterInfo class. // //===----------------------------------------------------------------------===// #ifndef POWERPC32_REGISTERINFO_H #define POWERPC32_REGISTERINFO_H #include "PPC.h" #include "PPCGenRegisterInfo.h.inc" #include namespace llvm { class PPCSubtarget; class TargetInstrInfo; class Type; class PPCRegisterInfo : public PPCGenRegisterInfo { std::map ImmToIdxMap; const PPCSubtarget &Subtarget; const TargetInstrInfo &TII; public: PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii); /// getRegisterNumbering - Given the enum value for some register, e.g. /// PPC::F14, return the number that it corresponds to (e.g. 14). static unsigned getRegisterNumbering(unsigned RegEnum); /// Code Generation virtual methods... void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, int FrameIndex, const TargetRegisterClass *RC) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *RC) const; void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, const MachineInstr *Orig) const; /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into /// copy instructions, turning them into load/store instructions. virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FrameIndex) const; const unsigned *getCalleeSavedRegs() const; const TargetRegisterClass* const* getCalleeSavedRegClasses() const; BitVector getReservedRegs(const MachineFunction &MF) const; /// targetHandlesStackFrameRounding - Returns true if the target is /// responsible for rounding up the stack frame (probably at emitPrologue /// time). bool targetHandlesStackFrameRounding() const { return true; } bool hasFP(const MachineFunction &MF) const; void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; /// usesLR - Returns if the link registers (LR) has been used in the function. /// bool usesLR(MachineFunction &MF) const; void lowerDynamicAlloc(MachineBasicBlock::iterator II) const; void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS = NULL) const; /// determineFrameLayout - Determine the size of the frame and maximum call /// frame size. void determineFrameLayout(MachineFunction &MF) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS = NULL) const; void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; // Debug information queries. unsigned getRARegister() const; unsigned getFrameRegister(MachineFunction &MF) const; void getInitialFrameState(std::vector &Moves) const; // Exception handling queries. unsigned getEHExceptionRegister() const; unsigned getEHHandlerRegister() const; }; } // end namespace llvm #endif