//===- XCoreInstrFormats.td - XCore Instruction Formats ----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// // Instruction format superclass //===----------------------------------------------------------------------===// class InstXCore pattern> : Instruction { field bits<32> Inst; let Namespace = "XCore"; dag OutOperandList = outs; dag InOperandList = ins; let AsmString = asmstr; let Pattern = pattern; } // XCore pseudo instructions format class PseudoInstXCore pattern> : InstXCore; //===----------------------------------------------------------------------===// // Instruction formats //===----------------------------------------------------------------------===// class _F3R pattern> : InstXCore { let Inst{31-0} = 0; } class _FL3R pattern> : InstXCore { let Inst{31-0} = 0; } class _F2RUS pattern> : InstXCore { let Inst{31-0} = 0; } class _FL2RUS pattern> : InstXCore { let Inst{31-0} = 0; } class _FRU6 pattern> : InstXCore { let Inst{31-0} = 0; } class _FLRU6 pattern> : InstXCore { let Inst{31-0} = 0; } class _FU6 pattern> : InstXCore { let Inst{31-0} = 0; } class _FLU6 pattern> : InstXCore { let Inst{31-0} = 0; } class _FU10 pattern> : InstXCore { let Inst{31-0} = 0; } class _FLU10 pattern> : InstXCore { let Inst{31-0} = 0; } class _F2R pattern> : InstXCore { let Inst{31-0} = 0; } class _FRUS pattern> : InstXCore { let Inst{31-0} = 0; } class _FL2R pattern> : InstXCore { let Inst{31-0} = 0; } class _F1R pattern> : InstXCore { let Inst{31-0} = 0; } class _F0R pattern> : InstXCore { let Inst{31-0} = 0; } class _L4R pattern> : InstXCore { let Inst{31-0} = 0; } class _L5R pattern> : InstXCore { let Inst{31-0} = 0; } class _L6R pattern> : InstXCore { let Inst{31-0} = 0; }