//===- AsmWriterEmitter.h - Generate an assembly writer ---------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This tablegen backend is responsible for emitting an assembly printer for the // code generator. // //===----------------------------------------------------------------------===// #ifndef ASMWRITER_EMITTER_H #define ASMWRITER_EMITTER_H #include "llvm/TableGen/TableGenBackend.h" #include #include #include namespace llvm { class AsmWriterInst; class CodeGenInstruction; class AsmWriterEmitter : public TableGenBackend { RecordKeeper &Records; std::map CGIAWIMap; std::vector NumberedInstructions; public: AsmWriterEmitter(RecordKeeper &R) : Records(R) {} // run - Output the asmwriter, returning true on failure. void run(raw_ostream &o); private: void EmitPrintInstruction(raw_ostream &o); void EmitGetRegisterName(raw_ostream &o); void EmitGetInstructionName(raw_ostream &o); void EmitRegIsInRegClass(raw_ostream &O); void EmitPrintAliasInstruction(raw_ostream &O); AsmWriterInst *getAsmWriterInstByID(unsigned ID) const { assert(ID < NumberedInstructions.size()); std::map::const_iterator I = CGIAWIMap.find(NumberedInstructions[ID]); assert(I != CGIAWIMap.end() && "Didn't find inst!"); return I->second; } void FindUniqueOperandCommands(std::vector &UOC, std::vector &InstIdxs, std::vector &InstOpsUsed) const; }; } #endif