1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
|
.file "/home/timnor01/a64-trunk/llvm/test/CodeGen/AArch64/logical_shifted_reg.ll"
.text
.globl logical_32bit
.type logical_32bit,@function
logical_32bit: // @logical_32bit
.cfi_startproc
// BB#0:
adrp x0, var1_32
ldr w1, [x0, #:lo12:var1_32]
adrp x0, var2_32
ldr w2, [x0, #:lo12:var2_32]
and w3, w1, w2
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
bic w3, w1, w2
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
orr w3, w1, w2
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
orn w3, w1, w2
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
eor w3, w1, w2
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
eon w3, w2, w1
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
and w3, w1, w2, lsl #31
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
bic w3, w1, w2, lsl #31
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
orr w3, w1, w2, lsl #31
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
orn w3, w1, w2, lsl #31
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
eor w3, w1, w2, lsl #31
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
eon w3, w1, w2, lsl #31
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
bic w3, w1, w2, asr #10
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
eor w3, w1, w2, asr #10
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
orn w3, w1, w2, lsr #1
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
eor w3, w1, w2, lsr #1
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
eon w3, w1, w2, ror #20
adrp x0, var1_32
str w3, [x0, #:lo12:var1_32]
and w1, w1, w2, ror #20
adrp x0, var1_32
str w1, [x0, #:lo12:var1_32]
ret
.Ltmp0:
.size logical_32bit, .Ltmp0-logical_32bit
.cfi_endproc
.globl logical_64bit
.type logical_64bit,@function
logical_64bit: // @logical_64bit
.cfi_startproc
// BB#0:
adrp x0, var1_64
ldr x0, [x0, #:lo12:var1_64]
adrp x1, var2_64
ldr x1, [x1, #:lo12:var2_64]
and x2, x0, x1
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
bic x2, x0, x1
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
orr x2, x0, x1
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
orn x2, x0, x1
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
eor x2, x0, x1
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
eon x2, x1, x0
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
and x2, x0, x1, lsl #63
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
bic x2, x0, x1, lsl #63
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
orr x2, x0, x1, lsl #63
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
orn x2, x0, x1, lsl #63
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
eor x2, x0, x1, lsl #63
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
eon x2, x0, x1, lsl #63
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
bic x2, x0, x1, asr #10
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
eor x2, x0, x1, asr #10
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
orn x2, x0, x1, lsr #1
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
eor x2, x0, x1, lsr #1
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
eon x2, x0, x1, ror #20
adrp x3, var1_64
str x2, [x3, #:lo12:var1_64]
and x0, x0, x1, ror #20
adrp x1, var1_64
str x0, [x1, #:lo12:var1_64]
ret
.Ltmp1:
.size logical_64bit, .Ltmp1-logical_64bit
.cfi_endproc
.globl flag_setting
.type flag_setting,@function
flag_setting: // @flag_setting
.cfi_startproc
// BB#0:
sub sp, sp, #16
adrp x0, var1_64
ldr x0, [x0, #:lo12:var1_64]
adrp x1, var2_64
ldr x1, [x1, #:lo12:var2_64]
tst x0, x1
str x0, [sp, #8] // 8-byte Folded Spill
str x1, [sp] // 8-byte Folded Spill
b.gt .LBB2_4
b .LBB2_1
.LBB2_1: // %test2
ldr x0, [sp, #8] // 8-byte Folded Reload
ldr x1, [sp] // 8-byte Folded Reload
tst x0, x1, lsl #63
b.lt .LBB2_4
b .LBB2_2
.LBB2_2: // %test3
ldr x0, [sp, #8] // 8-byte Folded Reload
ldr x1, [sp] // 8-byte Folded Reload
tst x0, x1, asr #12
b.gt .LBB2_4
b .LBB2_3
.LBB2_3: // %other_exit
adrp x0, var1_64
ldr x1, [sp, #8] // 8-byte Folded Reload
str x1, [x0, #:lo12:var1_64]
add sp, sp, #16
ret
.LBB2_4: // %ret
add sp, sp, #16
ret
.Ltmp2:
.size flag_setting, .Ltmp2-flag_setting
.cfi_endproc
.type var1_32,@object // @var1_32
.bss
.globl var1_32
.align 2
var1_32:
.word 0 // 0x0
.size var1_32, 4
.type var2_32,@object // @var2_32
.globl var2_32
.align 2
var2_32:
.word 0 // 0x0
.size var2_32, 4
.type var1_64,@object // @var1_64
.globl var1_64
.align 3
var1_64:
.xword 0 // 0x0
.size var1_64, 8
.type var2_64,@object // @var2_64
.globl var2_64
.align 3
var2_64:
.xword 0 // 0x0
.size var2_64, 8
|
