summaryrefslogtreecommitdiff
path: root/test/CodeGen/ARM/fast-isel-br-const.ll
blob: aefe200dc7465e0b369b8a1570685bd434e2c409 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB

define i32 @t1(i32 %a, i32 %b) nounwind uwtable ssp {
entry:
; THUMB: t1:
; ARM: t1:
  %x = add i32 %a, %b  
  br i1 1, label %if.then, label %if.else
; THUMB-NOT: b {{\.?}}LBB0_1
; ARM-NOT:  b {{\.?}}LBB0_1

if.then:                                          ; preds = %entry
  call void @foo1()
  br label %if.end7

if.else:                                          ; preds = %entry
  br i1 0, label %if.then2, label %if.else3
; THUMB: b {{\.?}}LBB0_4
; ARM:  b {{\.?}}LBB0_4

if.then2:                                         ; preds = %if.else
  call void @foo2()
  br label %if.end6

if.else3:                                         ; preds = %if.else
  %y = sub i32 %a, %b
  br i1 1, label %if.then5, label %if.end
; THUMB-NOT: b {{\.?}}LBB0_5
; ARM-NOT:  b {{\.?}}LBB0_5

if.then5:                                         ; preds = %if.else3
  call void @foo1()
  br label %if.end

if.end:                                           ; preds = %if.then5, %if.else3
  br label %if.end6

if.end6:                                          ; preds = %if.end, %if.then2
  br label %if.end7

if.end7:                                          ; preds = %if.end6, %if.then
  ret i32 0
}

declare void @foo1()

declare void @foo2()