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authorMatheus Almeida <matheus.almeida@imgtec.com>2014-06-05 14:59:18 +0000
committerMatheus Almeida <matheus.almeida@imgtec.com>2014-06-05 14:59:18 +0000
commit705e8b161676304b8f4dabdf819ae0909d10c69a (patch)
tree8caa3cb79d9c8e2c7d9c2d80e0c17d3ce1b2cf25
parent6c521451b8c46cc73c76fb27582461cf1fab2fb9 (diff)
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[mips] Add macros _MIPS_ISA and __mips_isa_rev (same expansion as defined by GCC).
Summary: The Linux Kernel is one example of a piece of software that relies on them. Reviewers: atanasyan Reviewed By: atanasyan Differential Revision: http://reviews.llvm.org/D3756 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@210270 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Basic/Targets.cpp15
-rw-r--r--test/Preprocessor/init.c14
2 files changed, 28 insertions, 1 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 3a4f3e6633..33b4916ef8 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -5228,6 +5228,7 @@ public:
CPU = Name;
return true;
}
+ const std::string& getCPU() const { return CPU; }
void getDefaultFeatures(llvm::StringMap<bool> &Features) const override {
// The backend enables certain ABI's by default according to the
// architecture.
@@ -5452,6 +5453,13 @@ public:
MipsTargetInfoBase::getTargetDefines(Opts, Builder);
Builder.defineMacro("__mips", "32");
+ Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS32");
+
+ const std::string& CPUStr = getCPU();
+ if (CPUStr == "mips32")
+ Builder.defineMacro("__mips_isa_rev", "1");
+ else if (CPUStr == "mips32r2")
+ Builder.defineMacro("__mips_isa_rev", "2");
if (ABI == "o32") {
Builder.defineMacro("__mips_o32");
@@ -5587,6 +5595,13 @@ public:
Builder.defineMacro("__mips", "64");
Builder.defineMacro("__mips64");
Builder.defineMacro("__mips64__");
+ Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS64");
+
+ const std::string& CPUStr = getCPU();
+ if (CPUStr == "mips64")
+ Builder.defineMacro("__mips_isa_rev", "1");
+ else if (CPUStr == "mips64r2")
+ Builder.defineMacro("__mips_isa_rev", "2");
if (ABI == "n32") {
Builder.defineMacro("__mips_n32");
diff --git a/test/Preprocessor/init.c b/test/Preprocessor/init.c
index 358612fec1..2c5b736544 100644
--- a/test/Preprocessor/init.c
+++ b/test/Preprocessor/init.c
@@ -1880,7 +1880,7 @@
// MIPS64EL:#define _mips 1
// MIPS64EL:#define mips 1
//
-// Check MIPS arch macros
+// Check MIPS arch and isa macros
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \
// RUN: < /dev/null \
@@ -1888,6 +1888,8 @@
//
// MIPS-ARCH-DEF32:#define _MIPS_ARCH "mips32r2"
// MIPS-ARCH-DEF32:#define _MIPS_ARCH_MIPS32R2 1
+// MIPS-ARCH-DEF32:#define _MIPS_ISA _MIPS_ISA_MIPS32
+// MIPS-ARCH-DEF32:#define __mips_isa_rev 2
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-nones \
// RUN: -target-cpu mips32 < /dev/null \
@@ -1895,6 +1897,8 @@
//
// MIPS-ARCH-32:#define _MIPS_ARCH "mips32"
// MIPS-ARCH-32:#define _MIPS_ARCH_MIPS32 1
+// MIPS-ARCH-32:#define _MIPS_ISA _MIPS_ISA_MIPS32
+// MIPS-ARCH-32:#define __mips_isa_rev 1
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \
// RUN: -target-cpu mips32r2 < /dev/null \
@@ -1902,6 +1906,8 @@
//
// MIPS-ARCH-32R2:#define _MIPS_ARCH "mips32r2"
// MIPS-ARCH-32R2:#define _MIPS_ARCH_MIPS32R2 1
+// MIPS-ARCH-32R2:#define _MIPS_ISA _MIPS_ISA_MIPS32
+// MIPS-ARCH-32R2:#define __mips_isa_rev 2
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: < /dev/null \
@@ -1909,6 +1915,8 @@
//
// MIPS-ARCH-DEF64:#define _MIPS_ARCH "mips64r2"
// MIPS-ARCH-DEF64:#define _MIPS_ARCH_MIPS64R2 1
+// MIPS-ARCH-DEF64:#define _MIPS_ISA _MIPS_ISA_MIPS64
+// MIPS-ARCH-DEF64:#define __mips_isa_rev 2
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: -target-cpu mips64 < /dev/null \
@@ -1916,6 +1924,8 @@
//
// MIPS-ARCH-64:#define _MIPS_ARCH "mips64"
// MIPS-ARCH-64:#define _MIPS_ARCH_MIPS64 1
+// MIPS-ARCH-64:#define _MIPS_ISA _MIPS_ISA_MIPS64
+// MIPS-ARCH-64:#define __mips_isa_rev 1
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: -target-cpu mips64r2 < /dev/null \
@@ -1923,6 +1933,8 @@
//
// MIPS-ARCH-64R2:#define _MIPS_ARCH "mips64r2"
// MIPS-ARCH-64R2:#define _MIPS_ARCH_MIPS64R2 1
+// MIPS-ARCH-64R2:#define _MIPS_ISA _MIPS_ISA_MIPS64
+// MIPS-ARCH-64R2:#define __mips_isa_rev 2
//
// Check MIPS float ABI macros
//