New Eclipse demo added - working but not yet completed.

git-svn-id: https://freertos.svn.sourceforge.net/svnroot/freertos/trunk@539 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

130 files changed, 11062 insertions, 0 deletions

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.mylyn/repositories.xml.zip b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.mylyn/repositories.xml.zip
new file mode 100644
index 00000000..13c44b31
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.mylyn/repositories.xml.zip
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml
new file mode 100644
index 00000000..c4b91cfa
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.core/shareddefaults.xml
@@ -0,0 +1 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?><SharedRoot><SharedProperty id="" value=""/></SharedRoot>
\ No newline at end of file
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc
new file mode 100644
index 00000000..89fbf619
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/RTOSDemo.sc
@@ -0,0 +1,118 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>

+<?scdStore version="2"?>

+

+<scannerInfo id="org.eclipse.cdt.make.core.discoveredScannerInfo">

+<instance id="0.1348192838">

+<collector id="org.eclipse.cdt.make.core.PerProjectSICollector">

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Source/include"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\RTOSDemo\include" removed="true"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF5282_Eclipse\RTOSDemo\include" removed="true"/>

+<includePath path="C:\devtools\cygwin\include" removed="true"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/include"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/ColdFire_V2"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\Source\include" removed="true"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\RTOSDemo\MCF5223x\include" removed="true"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\Common\include" removed="true"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\Source\portable\GCC\ColdFire_V2" removed="true"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\RTOSDemo\MCF5223x\MCF5223x" removed="true"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\RTOSDemo\MCF5223x\webserver" removed="true"/>

+<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\Common\ethernet\FreeRTOS-uIP" removed="true"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/ethernet/FreeRTOS-uIP"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5282"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/ethernet/lwIP_130/src/include"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/ethernet/lwIP_130/contrib/port/FreeRTOS/ColdFire_MCF5282"/>

+<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/ethernet/lwIP_130/src/include/ipv4"/>

+<includePath path="C:\devtools\cygwin\lib\gcc\i686-pc-cygwin\3.4.4\include"/>

+<includePath path="C:\devtools\cygwin\usr\include"/>

+<includePath path="C:\devtools\cygwin\usr\include\w32api"/>

+<definedSymbol symbol="__STDC_HOSTED__=1"/>

+<definedSymbol symbol="__GNUC__=3"/>

+<definedSymbol symbol="__GNUC_MINOR__=4"/>

+<definedSymbol symbol="__GNUC_PATCHLEVEL__=4"/>

+<definedSymbol symbol="__SIZE_TYPE__=unsigned int"/>

+<definedSymbol symbol="__PTRDIFF_TYPE__=int"/>

+<definedSymbol symbol="__WCHAR_TYPE__=short unsigned int"/>

+<definedSymbol symbol="__WINT_TYPE__=unsigned int"/>

+<definedSymbol symbol="__GXX_ABI_VERSION=1002"/>

+<definedSymbol symbol="__USING_SJLJ_EXCEPTIONS__=1"/>

+<definedSymbol symbol="__SCHAR_MAX__=127"/>

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+<definedSymbol symbol="__WCHAR_MAX__=65535U"/>

+<definedSymbol symbol="__CHAR_BIT__=8"/>

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+<definedSymbol symbol="__FLT_MIN_EXP__=(-125)"/>

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+<definedSymbol symbol="__FLT_MAX_10_EXP__=38"/>

+<definedSymbol symbol="__FLT_MAX__=3.40282347e+38F"/>

+<definedSymbol symbol="__FLT_MIN__=1.17549435e-38F"/>

+<definedSymbol symbol="__FLT_EPSILON__=1.19209290e-7F"/>

+<definedSymbol symbol="__FLT_DENORM_MIN__=1.40129846e-45F"/>

+<definedSymbol symbol="__FLT_HAS_INFINITY__=1"/>

+<definedSymbol symbol="__FLT_HAS_QUIET_NAN__=1"/>

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+<definedSymbol symbol="__DBL_MAX_10_EXP__=308"/>

+<definedSymbol symbol="__DBL_MAX__=1.7976931348623157e+308"/>

+<definedSymbol symbol="__DBL_MIN__=2.2250738585072014e-308"/>

+<definedSymbol symbol="__DBL_EPSILON__=2.2204460492503131e-16"/>

+<definedSymbol symbol="__DBL_DENORM_MIN__=4.9406564584124654e-324"/>

+<definedSymbol symbol="__DBL_HAS_INFINITY__=1"/>

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+<definedSymbol symbol="__LDBL_HAS_INFINITY__=1"/>

+<definedSymbol symbol="__LDBL_HAS_QUIET_NAN__=1"/>

+<definedSymbol symbol="__REGISTER_PREFIX__"/>

+<definedSymbol symbol="__USER_LABEL_PREFIX__=_"/>

+<definedSymbol symbol="__VERSION__=&quot;3.4.4 (cygming special) (gdc 0.12, using dmd 0.125)&quot;"/>

+<definedSymbol symbol="__NO_INLINE__=1"/>

+<definedSymbol symbol="__FINITE_MATH_ONLY__=0"/>

+<definedSymbol symbol="__i386=1"/>

+<definedSymbol symbol="__i386__=1"/>

+<definedSymbol symbol="i386=1"/>

+<definedSymbol symbol="__tune_i686__=1"/>

+<definedSymbol symbol="__tune_pentiumpro__=1"/>

+<definedSymbol symbol="_X86_=1"/>

+<definedSymbol symbol="__stdcall=__attribute__((__stdcall__))"/>

+<definedSymbol symbol="__fastcall=__attribute__((__fastcall__))"/>

+<definedSymbol symbol="__cdecl=__attribute__((__cdecl__))"/>

+<definedSymbol symbol="__declspec(x)=__attribute__((x))"/>

+<definedSymbol symbol="_stdcall=__attribute__((__stdcall__))"/>

+<definedSymbol symbol="_fastcall=__attribute__((__fastcall__))"/>

+<definedSymbol symbol="_cdecl=__attribute__((__cdecl__))"/>

+<definedSymbol symbol="__CYGWIN32__=1"/>

+<definedSymbol symbol="__CYGWIN__=1"/>

+<definedSymbol symbol="unix=1"/>

+<definedSymbol symbol="__unix__=1"/>

+<definedSymbol symbol="__unix=1"/>

+<definedSymbol symbol="COLDFIRE_V2_GCC=1"/>

+<definedSymbol symbol="PACK_STRUCT_END=__attribute\(\(packed\)\)"/>

+<definedSymbol symbol="ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\)"/>

+</collector>

+</instance>

+</scannerInfo>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c
new file mode 100644
index 00000000..8b137891
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c
@@ -0,0 +1 @@
+
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp
new file mode 100644
index 00000000..8b137891
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp
@@ -0,0 +1 @@
+
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml
new file mode 100644
index 00000000..9e62c4bb
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="org.eclipse.cdt.internal.ui.MakeView">

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
new file mode 100644
index 00000000..0f4312f5
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
@@ -0,0 +1,20 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="completion_proposal_size">

+	</section>

+	<section name="PDOMSearchPage">

+		<item value="227191" key="searchFlags"/>

+		<item value="false" key="caseSensitive"/>

+		<list key="previousPatterns">

+			<item value="CACR"/>

+		</list>

+	</section>

+	<section name="org.eclipse.cdt.ui.text.hover.CMacroExpansion">

+	</section>

+	<section name="org.eclipse.cdt.ui.text.hover.CMacroExpansionExploration">

+		<item value="573" key="org.eclipse.cdt.internal.ui.text.c.hover.CMacroExpansionExplorationControlDIALOG_Y_ORIGIN"/>

+		<item value="71" key="org.eclipse.cdt.internal.ui.text.c.hover.CMacroExpansionExplorationControlDIALOG_HEIGHT"/>

+		<item value="367" key="org.eclipse.cdt.internal.ui.text.c.hover.CMacroExpansionExplorationControlDIALOG_WIDTH"/>

+		<item value="62" key="org.eclipse.cdt.internal.ui.text.c.hover.CMacroExpansionExplorationControlDIALOG_X_ORIGIN"/>

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/18/5b/e7/a1/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/18/5b/e7/a1/properties.index
new file mode 100644
index 00000000..19104cbb
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/18/5b/e7/a1/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/history.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/history.index
new file mode 100644
index 00000000..09386181
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/history.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/properties.index
new file mode 100644
index 00000000..dd5b59b8
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/69/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/b3/history.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/b3/history.index
new file mode 100644
index 00000000..a0d6237b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/b3/history.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/b3/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/b3/properties.index
new file mode 100644
index 00000000..2c03dd8d
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/b3/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c/properties.index
new file mode 100644
index 00000000..590bd1ed
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/c/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/41/history.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/41/history.index
new file mode 100644
index 00000000..f57d7bbc
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/41/history.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/41/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/41/properties.index
new file mode 100644
index 00000000..b4849d2e
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/41/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/5c/3e/5c/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/5c/3e/5c/properties.index
new file mode 100644
index 00000000..965dfd57
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/29/5c/3e/5c/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/7f/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/7f/properties.index
new file mode 100644
index 00000000..58cbd80a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/f7/7f/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index
new file mode 100644
index 00000000..e5c1972c
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/history.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index
new file mode 100644
index 00000000..4b4472ed
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.indexes/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.markers b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.markers
new file mode 100644
index 00000000..e30c7d62
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.projects/RTOSDemo/.markers
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version
new file mode 100644
index 00000000..25cb955b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version
@@ -0,0 +1 @@
+
\ No newline at end of file
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index
new file mode 100644
index 00000000..02e74a4e
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version
new file mode 100644
index 00000000..6b2aaa76
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version
@@ -0,0 +1 @@
+

\ No newline at end of file
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/42.tree b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/42.tree
new file mode 100644
index 00000000..aff2c89b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.root/42.tree
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources
new file mode 100644
index 00000000..de8ea91a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prefs
new file mode 100644
index 00000000..80fe6e4b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prefs
@@ -0,0 +1,10 @@
+#Sun Nov 16 10:20:21 GMT 2008

+indexer/indexerId=org.eclipse.cdt.core.fastIndexer

+environment/workspace=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<environment append\="true" appendContributed\="true"/>\r\n

+indexer/updatePolicy=0

+indexer/filesToParseUpFront=stdarg.h, stddef.h, sys/types.h

+indexer/skipTypeReferences=false

+indexer/skipReferences=false

+indexer/indexAllFiles=false

+indexer/skipMacroReferences=false

+eclipse.preferences.version=1

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs
new file mode 100644
index 00000000..60f85b64
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-RTOSDemo.prefs
@@ -0,0 +1,3 @@
+#Tue Aug 05 11:49:38 BST 2008

+eclipse.preferences.version=1

+indexer/preferenceScope=0

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs
new file mode 100644
index 00000000..48eda060
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs
@@ -0,0 +1,3 @@
+#Tue Aug 05 11:54:06 BST 2008

+org.eclipse.cdt.debug.core.cDebug.common_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<sourceLookupDirector>\r\n<sourceContainers duplicates\="false"/>\r\n</sourceLookupDirector>\r\n

+eclipse.preferences.version=1

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs
new file mode 100644
index 00000000..5ddd9a15
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.ui.prefs
@@ -0,0 +1,10 @@
+#Fri Aug 08 13:44:18 BST 2008

+org.eclipse.debug.ui.DebugView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true

+columnOrderKeyEXE=0,1,2,3,4,5

+visibleColumnsKeySF=1,1,0,0,0,0

+org.eclipse.debug.ui.BreakpointView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true

+visibleColumnsKeyEXE=1,1,1,0,0,0

+columnSortDirectionKeyEXE=128

+eclipse.preferences.version=1

+columnOrderKeySF=0,1,2,3,4,5

+columnSortDirectionKeySF=128

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
new file mode 100644
index 00000000..1f104132
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
@@ -0,0 +1,3 @@
+#Sun Nov 16 10:19:47 GMT 2008

+eclipse.preferences.version=1

+properties/RTOSDemo.null.38326818/0.1348192838=\#\r\n\#Sun Nov 16 10\:19\:47 GMT 2008\r\norg.eclipse.cdt.build.core.settings.holder.1053974197\=\\\#\\r\\n\\\#Sun Nov 16 10\\\:19\\\:47 GMT 2008\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.804763436\=\\\#\\r\\n\\\#Sun Nov 16 10\\\:19\\\:47 GMT 2008\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.libs.1997217404\=\\\#\\r\\n\\\#Sun Nov 16 10\\\:19\\\:47 GMT 2008\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.99587291\=\\\#\\r\\n\\\#Sun Nov 16 10\\\:19\\\:47 GMT 2008\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.prefbase.toolchain.1423010524\=\\\#\\r\\n\\\#Sun Nov 16 10\\\:19\\\:47 GMT 2008\\r\\nrebuildState\\\=false\\r\\n\r\n0.1348192838\=\\\#\\r\\n\\\#Sun Nov 16 10\\\:19\\\:47 GMT 2008\\r\\nrcState\\\=0\\r\\nrebuildState\\\=false\\r\\n\r\n

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs
new file mode 100644
index 00000000..9a9fd0ca
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs
@@ -0,0 +1,3 @@
+#Tue Aug 05 17:26:23 BST 2008

+org.eclipse.mylyn.ui.first.run.0_4_9=false

+eclipse.preferences.version=1

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs
new file mode 100644
index 00000000..b213b291
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs
@@ -0,0 +1,16 @@
+#Sat Nov 15 17:29:59 GMT 2008

+useQuickDiffPrefPage=true

+closeBrackets=false

+useAnnotationsPrefPage=true

+spelling_locale=en_GB

+sourceHoverBackgroundColor=255,255,225

+org.eclipse.cdt.ui.text.custom_code_templates=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?><templates/>

+closeAngularBrackets=false

+spelling_locale_initialized=true

+eclipse.preferences.version=1

+org.eclipse.cdt.ui.text.templates.custom=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?><templates/>

+hoverModifierMasks=org.eclipse.cdt.ui.BestMatchHover;0;org.eclipse.cdt.debug.internal.ui.editors.DebugTextHover;0;org.eclipse.cdt.ui.ProblemHover;0;org.eclipse.cdt.ui.CDocHover;0;org.eclipse.cdt.ui.CMacroExpansionHover;0;org.eclipse.cdt.ui.CSourceHover;131072;org.eclipse.cdt.ui.AnnotationHover;0;

+hoverModifiers=org.eclipse.cdt.ui.BestMatchHover;0;org.eclipse.cdt.debug.internal.ui.editors.DebugTextHover;\!0;org.eclipse.cdt.ui.ProblemHover;\!0;org.eclipse.cdt.ui.CDocHover;\!0;org.eclipse.cdt.ui.CMacroExpansionHover;\!0;org.eclipse.cdt.ui.CSourceHover;Shift;org.eclipse.cdt.ui.AnnotationHover;\!0;

+content_assist_disabled_computers=org.eclipse.cdt.ui.cdtNoTypeProposalCategory\u0000org.eclipse.cdt.ui.cdtTypeProposalCategory\u0000org.eclipse.cdt.ui.textProposalCategory\u0000org.eclipse.cdt.ui.templateProposalCategory\u0000

+closeBraces=false

+closeStrings=false

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs
new file mode 100644
index 00000000..dcbdbb86
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs
@@ -0,0 +1,5 @@
+#Wed Aug 06 16:58:53 BST 2008

+version=1

+eclipse.preferences.version=1

+pathvariable.FREERTOS_ROOT=C\:/E/Dev/FreeRTOS/WorkingCopy2

+description.autobuilding=false

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs
new file mode 100644
index 00000000..0e57cf7f
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs
@@ -0,0 +1,3 @@
+#Sat Nov 15 23:08:01 GMT 2008

+prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<watchExpressions/>\r\n

+eclipse.preferences.version=1

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs
new file mode 100644
index 00000000..418cdd3f
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs
@@ -0,0 +1,11 @@
+#Sat Nov 15 23:08:01 GMT 2008

+org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<launchPerspectives/>\r\n

+pref_state_memento.org.eclipse.debug.ui.VariableView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684">\r\n<PRESENTATION_CONTEXT_PROPERTIES IMemento.internal.id\="org.eclipse.debug.ui.VariableView"/>\r\n</VariablesViewMemento>

+pref_state_memento.org.eclipse.debug.ui.RegisterView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="188" org.eclipse.debug.ui.SASH_VIEW_PART\="811">\r\n<COLUMN_SIZES IMemento.internal.id\="org.eclipse.debug.ui.VARIALBE_COLUMN_PRESENTATION.COL_VAR_NAME" SIZE\="130"/>\r\n<COLUMN_SIZES IMemento.internal.id\="org.eclipse.debug.ui.VARIALBE_COLUMN_PRESENTATION.COL_VAR_VALUE" SIZE\="414"/>\r\n<PRESENTATION_CONTEXT_PROPERTIES IMemento.internal.id\="org.eclipse.debug.ui.RegisterView"/>\r\n</VariablesViewMemento>

+org.eclipse.debug.ui.memory.columnSize\:org.eclipse.cdt.debug.core=4

+pref_state_memento.org.eclipse.debug.ui.ExpressionView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684"/>

+preferredDetailPanes=DefaultDetailPane\:DefaultDetailPane|

+org.eclipse.debug.ui.switch_perspective_on_suspend=always

+eclipse.preferences.version=1

+org.eclipse.debug.ui.memory.rowSize\:org.eclipse.cdt.debug.core=16

+org.eclipse.debug.ui.user_view_bindings=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<viewBindings>\r\n<view id\="org.eclipse.debug.ui.MemoryView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\r\n</view>\r\n<view id\="org.eclipse.debug.ui.RegisterView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="closed"/>\r\n</view>\r\n<view id\="org.eclipse.debug.ui.DebugView">\r\n<perspective id\="org.eclipse.cdt.ui.CPerspective" userAction\="closed"/>\r\n</view>\r\n<view id\="org.eclipse.debug.ui.ExpressionView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\r\n<perspective id\="org.eclipse.cdt.ui.CPerspective" userAction\="closed"/>\r\n</view>\r\n<view id\="org.eclipse.ui.console.ConsoleView">\r\n<perspective id\="org.eclipse.cdt.ui.CPerspective" userAction\="opened"/>\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\r\n</view>\r\n</viewBindings>\r\n

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.equinox.p2.ui.sdk.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.equinox.p2.ui.sdk.prefs
new file mode 100644
index 00000000..bd32f34f
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.equinox.p2.ui.sdk.prefs
@@ -0,0 +1,3 @@
+#Tue Aug 05 11:47:31 BST 2008

+eclipse.preferences.version=1

+autoUpdateInit=true

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.core.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.core.prefs
new file mode 100644
index 00000000..0af70e2a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.core.prefs
@@ -0,0 +1,3 @@
+#Tue Aug 05 11:54:43 BST 2008

+eclipse.preferences.version=1

+org.eclipse.jdt.core.builder.resourceCopyExclusionFilter=*.launch

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.debug.ui.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.debug.ui.prefs
new file mode 100644
index 00000000..279c3aba
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.debug.ui.prefs
@@ -0,0 +1,4 @@
+#Mon Aug 11 13:09:15 BST 2008

+org.eclipse.debug.ui.VariableView.org.eclipse.jdt.debug.ui.show_null_entries=true

+eclipse.preferences.version=1

+org.eclipse.debug.ui.ExpressionView.org.eclipse.jdt.debug.ui.show_null_entries=true

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.ui.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.ui.prefs
new file mode 100644
index 00000000..4fa004a2
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.jdt.ui.prefs
@@ -0,0 +1,18 @@
+#Sat Nov 15 17:29:59 GMT 2008

+useQuickDiffPrefPage=true

+proposalOrderMigrated=true

+tabWidthPropagated=true

+content_assist_proposals_background=255,255,255

+org.eclipse.jdt.ui.javadoclocations.migrated=true

+useAnnotationsPrefPage=true

+spelling_locale=en_GB

+org.eclipse.jdt.ui.editor.tab.width=

+org.eclipse.jdt.internal.ui.navigator.layout=2

+org.eclipse.jface.textfont=1|Courier New|10.0|0|WINDOWS|1|0|0|0|0|0|0|0|0|1|0|0|0|0|Courier New;

+org.eclipse.jdt.ui.formatterprofiles.version=11

+content_assist_number_of_computers=9

+spelling_locale_initialized=true

+eclipse.preferences.version=1

+content_assist_proposals_foreground=0,0,0

+fontPropagated=true

+spelling_user_dictionary_encoding=

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs
new file mode 100644
index 00000000..e9db6deb
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs
@@ -0,0 +1,3 @@
+#Tue Aug 05 11:47:26 BST 2008

+eclipse.preferences.version=1

+mylyn.attention.migrated=true

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs
new file mode 100644
index 00000000..e251dc91
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.search.prefs
@@ -0,0 +1,3 @@
+#Mon Aug 11 07:30:25 BST 2008

+org.eclipse.search.defaultPerspective=org.eclipse.search.defaultPerspective.none

+eclipse.preferences.version=1

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs
new file mode 100644
index 00000000..910eb5f6
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs
@@ -0,0 +1,3 @@
+#Fri Aug 08 13:44:18 BST 2008

+eclipse.preferences.version=1

+org.eclipse.team.ui.first_time=false

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.browser.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.browser.prefs
new file mode 100644
index 00000000..bb037cd0
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.browser.prefs
@@ -0,0 +1,3 @@
+#Thu Aug 14 11:07:33 BST 2008

+eclipse.preferences.version=1

+internalWebBrowserHistory=http\://www.eclipse.org/|*|http\://www.eclipse.org|*|C\:\\E\\Dev\\FreeRTOS\\DOC\\CurrentWebSite\\banners\\ColdFire-RTOS-Port-Using-Eclipse.html|*|file\:/C\:/E/Dev/FreeRTOS/DOC/CurrentWebSite/banners/ColdFire-RTOS-Port-Using-Eclipse.html|*|

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs
new file mode 100644
index 00000000..b1d49a88
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs
@@ -0,0 +1,4 @@
+#Sat Nov 15 17:29:59 GMT 2008

+eclipse.preferences.version=1

+spellingEngine=org.eclipse.jdt.internal.ui.text.spelling.DefaultSpellingEngine

+overviewRuler_migration=migrated_3.1

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs
new file mode 100644
index 00000000..befc178b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs
@@ -0,0 +1,6 @@
+#Mon Nov 03 14:55:37 GMT 2008

+eclipse.preferences.version=1

+TASKS_FILTERS_MIGRATE=true

+tipsAndTricks=true

+platformState=1222096011143

+PROBLEMS_FILTERS_MIGRATE=true

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs
new file mode 100644
index 00000000..85ba15af
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs
@@ -0,0 +1,4 @@
+#Tue Aug 12 16:13:20 BST 2008

+eclipse.preferences.version=1

+showIntro=false

+KEY_CONFIGURATION_ID=org.eclipse.cdt.ui.visualstudio

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs
new file mode 100644
index 00000000..6bd3cf3d
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs
@@ -0,0 +1,5 @@
+#Sat Nov 15 17:29:59 GMT 2008

+resourcetypes=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<editors version\="3.1">\r\n<info extension\="html" name\="*">\r\n<editor id\="org.eclipse.ui.browser.editorSupport"/>\r\n</info>\r\n<info extension\="htm" name\="*">\r\n<editor id\="org.eclipse.ui.browser.editorSupport"/>\r\n</info>\r\n<info extension\="jardesc" name\="*">\r\n<editor id\="org.eclipse.jdt.ui.JARDescEditor"/>\r\n<defaultEditor id\="org.eclipse.jdt.ui.JARDescEditor"/>\r\n</info>\r\n<info extension\="properties" name\="sample">\r\n<editor id\="org.eclipse.pde.ui.sampleEditor"/>\r\n<defaultEditor id\="org.eclipse.pde.ui.sampleEditor"/>\r\n</info>\r\n<info extension\="jpage" name\="*">\r\n<editor id\="org.eclipse.jdt.debug.ui.SnippetEditor"/>\r\n</info>\r\n<info extension\="shtml" name\="*">\r\n<editor id\="org.eclipse.ui.browser.editorSupport"/>\r\n</info>\r\n</editors>

+eclipse.preferences.version=1

+editors=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<editors>\r\n<descriptor id\="org.eclipse.ui.browser.editorSupport" image\="$nl$/icons/obj16/internal_browser.gif" internal\="false" label\="Web Browser" launcher\="org.eclipse.ui.internal.browser.BrowserLauncher" openMode\="4" open_in_place\="false" plugin\="org.eclipse.ui.browser"/>\r\n<descriptor class\="org.eclipse.ui.editors.text.TextEditor" id\="org.eclipse.jdt.ui.JARDescEditor" image\="$nl$/icons/full/obj16/jar_desc_obj.gif" internal\="true" label\="JAR Description Editor" openMode\="1" open_in_place\="false" plugin\="org.eclipse.jdt.ui"/>\r\n<descriptor class\="org.eclipse.pde.internal.ui.samples.SampleEditor" id\="org.eclipse.pde.ui.sampleEditor" image\="$nl$/icons/obj16/build_exec.gif" internal\="true" label\="Code Sample Editor" openMode\="1" open_in_place\="false" plugin\="org.eclipse.pde.ui"/>\r\n<descriptor class\="org.eclipse.jdt.internal.debug.ui.snippeteditor.JavaSnippetEditor" id\="org.eclipse.jdt.debug.ui.SnippetEditor" image\="$nl$/icons/full/obj16/jsbook_obj.gif" internal\="true" label\="Scrapbook" openMode\="1" open_in_place\="false" plugin\="org.eclipse.jdt.debug.ui"/>\r\n</editors>

+org.eclipse.ui.commands=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<org.eclipse.ui.commands>\r\n<activeKeyConfiguration keyConfigurationId\="org.eclipse.cdt.ui.visualstudio"/>\r\n<keyBinding commandId\="org.eclipse.ui.edit.undo" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="ALT+BS"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.dialogAndWindow" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+Z"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.dialogAndWindow" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+Z"/>\r\n<keyBinding commandId\="org.eclipse.ui.edit.findNext" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.ui.textEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+K"/>\r\n<keyBinding contextId\="org.eclipse.ui.textEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+K"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+B"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+B"/>\r\n<keyBinding commandId\="org.eclipse.ui.project.buildAll" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F7"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+F11"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+F11"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.RunLast" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.StepInto" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F11"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F6"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F6"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.StepOver" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F10"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+SHIFT+B"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+SHIFT+B"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.ToggleBreakpoint" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F9"/>\r\n<keyBinding contextId\="org.eclipse.cdt.make.ui.makefileEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.make.ui.makefileEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cViewScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cViewScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.macroExpansionHoverScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.macroExpansionHoverScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n</org.eclipse.ui.commands>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch
new file mode 100644
index 00000000..f5730106
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.core/.launches/RTOSDemo.launch
@@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>

+<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">

+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.imageFileName" value="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\RTOSDemo\bin\RTOSDemo.elf"/>

+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.initCommands" value="target remote | m68k-elf-sprite pe: m52235evb"/>

+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.ipAddress" value="localhost"/>

+<booleanAttribute key="org.eclipse.cdt.debug.gdbremote.core.loadImage" value="false"/>

+<intAttribute key="org.eclipse.cdt.debug.gdbremote.core.portNumber" value="10000"/>

+<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.runCommands" value="b main&#13;&#10;jump __cs3_reset_m52235evb&#13;&#10;&#13;&#10;&#13;&#10;&#13;&#10;&#13;&#10;&#13;&#10;&#13;&#10;"/>

+<booleanAttribute key="org.eclipse.cdt.debug.gdbremote.core.useRemoteTarget" value="false"/>

+<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="m68k-elf-gdb"/>

+<stringAttribute key="org.eclipse.cdt.debug.mi.core.GDB_INIT" value=""/>

+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/>

+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>

+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>

+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;registerGroups&gt;&#13;&#10;&lt;group memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;registerGroup enabled=&amp;quot;true&amp;quot; name=&amp;quot;Main&amp;quot;&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d0&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d1&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d2&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d3&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d4&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d5&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d6&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d7&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a0&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a1&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a2&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a3&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a4&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a5&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;fp&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;sp&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;ps&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;pc&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;/registerGroup&amp;gt;&amp;#13;&amp;#10;&quot;/&gt;&#13;&#10;&lt;group memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;registerGroup enabled=&amp;quot;true&amp;quot; name=&amp;quot;New Group&amp;quot;&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d0&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d1&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d2&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d3&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d4&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d5&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d6&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;d7&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a0&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a1&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a2&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a3&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a4&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;a5&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;fp&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;sp&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;ps&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;register name=&amp;quot;pc&amp;quot; originalGroupName=&amp;quot;Main&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;/registerGroup&amp;gt;&amp;#13;&amp;#10;&quot;/&gt;&#13;&#10;&lt;/registerGroups&gt;&#13;&#10;"/>

+<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;contentList&gt;&lt;content id=&quot;us-main-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;d0-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;d1-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;d4-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;d7-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;ps-(format)&quot; val=&quot;4&quot;/&gt;&lt;/contentList&gt;"/>

+<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>

+<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList&gt;&#13;&#10;&lt;memoryBlockExpressionItem&gt;&#13;&#10;&lt;expression text=&quot;536890128&quot;/&gt;&#13;&#10;&lt;/memoryBlockExpressionItem&gt;&#13;&#10;&lt;memoryBlockExpressionItem&gt;&#13;&#10;&lt;expression text=&quot;536891648&quot;/&gt;&#13;&#10;&lt;/memoryBlockExpressionItem&gt;&#13;&#10;&lt;/memoryBlockExpressionList&gt;&#13;&#10;"/>

+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="bin/RTOSDemo.elf"/>

+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RTOSDemo"/>

+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.1348192838"/>

+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">

+<listEntry value="/RTOSDemo"/>

+</listAttribute>

+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">

+<listEntry value="4"/>

+</listAttribute>

+</launchConfiguration>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml
new file mode 100644
index 00000000..a032a0f7
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/dialog_settings.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="org.eclipse.debug.ui.LAUNCH_CONFIGURATIONS_DIALOG_SECTION">

+		<item value="952" key="DIALOG_WIDTH"/>

+		<item value="140" key="DIALOG_Y_ORIGIN"/>

+		<item value=", org.eclipse.cdt.debug.gdbjtag.launchConfigurationType, " key="org.eclipse.debug.ui.EXPANDED_NODES"/>

+		<item value="199" key="DIALOG_X_ORIGIN"/>

+		<item value="640" key="DIALOG_HEIGHT"/>

+		<item value="237" key="org.eclipse.debug.ui.DIALOG_SASH_WEIGHTS_1"/>

+		<item value="762" key="org.eclipse.debug.ui.DIALOG_SASH_WEIGHTS_2"/>

+		<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml
new file mode 100644
index 00000000..31ce4935
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>

+<launchHistory>

+<launchGroup id="org.eclipse.ui.externaltools.launchGroup">

+<mruHistory/>

+<favorites/>

+</launchGroup>

+<launchGroup id="org.eclipse.debug.ui.launchGroup.profile">

+<mruHistory/>

+<favorites/>

+</launchGroup>

+<launchGroup id="org.eclipse.debug.ui.launchGroup.debug">

+<mruHistory>

+<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;RTOSDemo.launch&quot;/&gt;&#13;&#10;"/>

+</mruHistory>

+<favorites/>

+</launchGroup>

+<launchGroup id="org.eclipse.debug.ui.launchGroup.run">

+<mruHistory/>

+<favorites/>

+</launchGroup>

+</launchHistory>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.core/variablesAndContainers.dat b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.core/variablesAndContainers.dat
new file mode 100644
index 00000000..46ba64d9
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.core/variablesAndContainers.dat
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/OpenTypeHistory.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/OpenTypeHistory.xml
new file mode 100644
index 00000000..6cd95629
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/OpenTypeHistory.xml
@@ -0,0 +1,2 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>

+<typeInfoHistroy/>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/QualifiedTypeNameHistory.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/QualifiedTypeNameHistory.xml
new file mode 100644
index 00000000..8c365b72
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/QualifiedTypeNameHistory.xml
@@ -0,0 +1,2 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>

+<qualifiedTypeNameHistroy/>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/dialog_settings.xml
new file mode 100644
index 00000000..e615779c
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.jdt.ui/dialog_settings.xml
@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="org.eclipse.jdt.internal.ui.packageview.PackageExplorerPart">

+		<item value="true" key="group_libraries"/>

+		<item value="false" key="linkWithEditor"/>

+		<item value="2" key="layout"/>

+		<item value="1" key="rootMode"/>

+		<item value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;&#x0D;&#x0A;&lt;packageExplorer group_libraries=&quot;1&quot; isWindowWorkingSet=&quot;true&quot; layout=&quot;2&quot; linkWithEditor=&quot;0&quot; rootMode=&quot;1&quot; workingSetName=&quot;&quot;&gt;&#x0D;&#x0A;&lt;customFilters userDefinedPatternsEnabled=&quot;false&quot;&gt;&#x0D;&#x0A;&lt;xmlDefinedFilters&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.LibraryFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.LocalTypesFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.StaticsFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.pde.ui.ExternalPluginLibrariesFilter1&quot; isEnabled=&quot;true&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.ClosedProjectsFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.NonSharedProjectsFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.NonJavaElementFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.ContainedLibraryFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.CuAndClassFileFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.NonJavaProjectsFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.internal.ui.PackageExplorer.EmptyInnerPackageFilter&quot; isEnabled=&quot;true&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.PackageDeclarationFilter&quot; isEnabled=&quot;true&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.internal.ui.PackageExplorer.EmptyPackageFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.ImportDeclarationFilter&quot; isEnabled=&quot;true&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.FieldsFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.internal.ui.PackageExplorer.HideInnerClassFilesFilter&quot; isEnabled=&quot;true&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.NonPublicFilter&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer_patternFilterId_.*&quot; isEnabled=&quot;true&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.EmptyLibraryContainerFilter&quot; isEnabled=&quot;true&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.pde.ui.BinaryProjectFilter1&quot; isEnabled=&quot;false&quot;/&gt;&#x0D;&#x0A;&lt;child filterId=&quot;org.eclipse.jdt.ui.PackageExplorer.SyntheticMembersFilter&quot; isEnabled=&quot;true&quot;/&gt;&#x0D;&#x0A;&lt;/xmlDefinedFilters&gt;&#x0D;&#x0A;&lt;/customFilters&gt;&#x0D;&#x0A;&lt;/packageExplorer&gt;" key="memento"/>

+	</section>

+	<section name="JavaElementSearchActions">

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2008/11/46/refactorings.history b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2008/11/46/refactorings.history
new file mode 100644
index 00000000..b23536c1
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2008/11/46/refactorings.history
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<session version="1.0">

+<refactoring comment="Delete resource &apos;RTOSDemo/webserver/MCF5223x_Ethernet.c&apos;" deleteContents="false" description="Delete resource &apos;RTOSDemo/webserver/MCF5223x_Ethernet.c&apos;" element1="/RTOSDemo/webserver/MCF5223x_Ethernet.c" flags="7" id="org.eclipse.ltk.core.refactoring.delete.resources" resources="1" stamp="1226771144015"/>

+</session>
\ No newline at end of file
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2008/11/46/refactorings.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2008/11/46/refactorings.index
new file mode 100644
index 00000000..b57216d1
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/.workspace/2008/11/46/refactorings.index
@@ -0,0 +1 @@
+1226771144015	Delete resource 'RTOSDemo/webserver/MCF5223x_Ethernet.c'
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/RTOSDemo/2008/11/46/refactorings.history b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/RTOSDemo/2008/11/46/refactorings.history
new file mode 100644
index 00000000..67c6caab
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/RTOSDemo/2008/11/46/refactorings.history
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<session version="1.0">

+<refactoring comment="Rename resource &apos;RTOSDemo/webserver/fec.h&apos; to &apos;FEC.h&apos;" description="Rename resource &apos;fec.h&apos;" flags="7" id="org.eclipse.ltk.core.refactoring.rename.resource" input="webserver/fec.h" name="FEC.h" stamp="1226827901062" updateReferences="true"/>

+</session>
\ No newline at end of file
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/RTOSDemo/2008/11/46/refactorings.index b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/RTOSDemo/2008/11/46/refactorings.index
new file mode 100644
index 00000000..f6e9f8b4
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.core.refactoring/.refactorings/RTOSDemo/2008/11/46/refactorings.index
@@ -0,0 +1 @@
+1226827901062	Rename resource 'fec.h'
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml
new file mode 100644
index 00000000..ed857b0e
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ltk.ui.refactoring/dialog_settings.xml
@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="RefactoringWizard.preview">

+		<item value="400" key="height"/>

+		<item value="600" key="width"/>

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.pde.core/.cache/clean-cache.properties b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.pde.core/.cache/clean-cache.properties
new file mode 100644
index 00000000..a04050bb
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.pde.core/.cache/clean-cache.properties
@@ -0,0 +1,2 @@
+#Cached timestamps

+#Sun Nov 16 10:20:21 GMT 2008

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml
new file mode 100644
index 00000000..54c4e765
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.search/dialog_settings.xml
@@ -0,0 +1,31 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="DialogBounds_SearchDialog">

+		<item value="519" key="DIALOG_WIDTH"/>

+		<item value="259" key="DIALOG_Y_ORIGIN"/>

+		<item value="385" key="DIALOG_HEIGHT"/>

+		<item value="445" key="DIALOG_X_ORIGIN"/>

+		<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>

+	</section>

+	<section name="Search">

+		<list key="Search.processedPageIds">

+			<item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>

+			<item value="org.eclipse.mylyn.tasks.ui.search.page"/>

+			<item value="org.eclipse.cdt.ui.pdomSearchPage"/>

+			<item value="org.eclipse.jdt.ui.JavaSearchPage"/>

+			<item value="org.eclipse.pde.internal.ui.search.SearchPage"/>

+		</list>

+		<list key="Search.enabledPageIds">

+			<item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>

+			<item value="org.eclipse.mylyn.tasks.ui.search.page"/>

+			<item value="org.eclipse.cdt.ui.pdomSearchPage"/>

+			<item value="org.eclipse.jdt.ui.JavaSearchPage"/>

+			<item value="org.eclipse.pde.internal.ui.search.SearchPage"/>

+		</list>

+	</section>

+	<section name="org.eclipse.cdt.ui.pdomSearchViewPage">

+	</section>

+	<section name="SearchDialog.ScopePart">

+		<item value="0" key="scope"/>

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml
new file mode 100644
index 00000000..90b759b0
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.ide/dialog_settings.xml
@@ -0,0 +1,33 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="ChooseWorkspaceDialogSettings">

+		<item value="353" key="DIALOG_Y_ORIGIN"/>

+		<item value="547" key="DIALOG_X_ORIGIN"/>

+	</section>

+	<section name="WORKBENCH_SETTINGS">

+		<list key="ENABLED_TRANSFERS">

+		</list>

+	</section>

+	<section name="SaveAsDialogSettings">

+		<item value="438" key="DIALOG_WIDTH"/>

+		<item value="147" key="DIALOG_Y_ORIGIN"/>

+		<item value="625" key="DIALOG_X_ORIGIN"/>

+		<item value="553" key="DIALOG_HEIGHT"/>

+		<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>

+	</section>

+	<section name="NewWizardAction">

+		<item value="org.eclipse.cdt.ui.wizards.NewCWizard2" key="NewWizardSelectionPage.STORE_SELECTED_ID"/>

+		<list key="NewWizardSelectionPage.STORE_EXPANDED_CATEGORIES_ID">

+			<item value="org.eclipse.cdt.ui.newCWizards"/>

+		</list>

+	</section>

+	<section name="CleanDialogSettings">

+		<item value="411" key="DIALOG_WIDTH"/>

+		<item value="false" key="BUILD_NOW"/>

+		<item value="275" key="DIALOG_Y_ORIGIN"/>

+		<item value="true" key="BUILD_ALL"/>

+		<item value="635" key="DIALOG_X_ORIGIN"/>

+		<item value="417" key="DIALOG_HEIGHT"/>

+		<item value="false" key="TOGGLE_SELECTED"/>

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml
new file mode 100644
index 00000000..d3014f5c
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.intro/dialog_settings.xml
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<item value="1024" key="introLaunchBar.location"/>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml
new file mode 100644
index 00000000..b97f2fc2
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench.texteditor/dialog_settings.xml
@@ -0,0 +1,38 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="org.eclipse.ui.texteditor.FindReplaceDialog_dialogBounds">

+		<item value="237" key="DIALOG_WIDTH"/>

+		<item value="212" key="DIALOG_Y_ORIGIN"/>

+		<item value="1167" key="DIALOG_X_ORIGIN"/>

+		<item value="356" key="DIALOG_HEIGHT"/>

+		<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>

+	</section>

+	<section name="org.eclipse.ui.texteditor.FindReplaceDialog">

+		<item value="true" key="wrap"/>

+		<item value="false" key="casesensitive"/>

+		<item value="false" key="isRegEx"/>

+		<item value="false" key="incremental"/>

+		<item value="false" key="wholeword"/>

+		<item value="ICR" key="selection"/>

+		<list key="findhistory">

+			<item value="ICR"/>

+			<item value="prvEnableFECInterrupts"/>

+			<item value="MCF_FEC_EIMR"/>

+			<item value="RXF"/>

+			<item value="MCF_FEC_EIR_TXF"/>

+			<item value="MCF_FEC_EIR_RXB"/>

+			<item value="xFECSemaphore"/>

+			<item value="uxIndexToBufferOwner"/>

+		</list>

+		<list key="replacehistory">

+			<item value="0x20007fdc"/>

+			<item value="0x200075ec"/>

+			<item value="0x01"/>

+			<item value="mainERROR_PERIOD"/>

+			<item value="french_cheese"/>

+			<item value="taskEXIT_CRITICAL"/>

+			<item value="taskENTER_CRITICAL"/>

+			<item value="COMMON_DEMO_CODE_DIR"/>

+		</list>

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml
new file mode 100644
index 00000000..ba5f22d9
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml
@@ -0,0 +1,36 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<section name="Workbench">

+	<section name="FileSystemImportWizard">

+		<item value="false" key="WizardFileSystemResourceImportPage1.STORE_OVERWRITE_EXISTING_RESOURCES_ID"/>

+		<item value="false" key="WizardFileSystemResourceImportPage1.STORE_CREATE_CONTAINER_STRUCTURE_ID"/>

+		<list key="WizardFileSystemResourceImportPage1.STORE_SOURCE_NAMES_ID">

+			<item value="C:\Temp\RTOSDemo"/>

+		</list>

+	</section>

+	<section name="WorkbenchPreferenceDialogSettings">

+		<item value="157" key="DIALOG_Y_ORIGIN"/>

+		<item value="258" key="DIALOG_X_ORIGIN"/>

+	</section>

+	<section name="ShowViewDialog">

+		<item value="280" key="DIALOG_WIDTH"/>

+		<item value="rtos.openrtos.viewer.views.TaskTable" key="ShowViewDialog.STORE_SELECTED_VIEW_ID"/>

+		<item value="239" key="DIALOG_Y_ORIGIN"/>

+		<item value="415" key="DIALOG_HEIGHT"/>

+		<item value="704" key="DIALOG_X_ORIGIN"/>

+		<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>

+		<list key="ShowViewDialog.STORE_EXPANDED_CATEGORIES_ID">

+			<item value="rtos.openrtos.viewer"/>

+		</list>

+	</section>

+	<section name="org.eclipse.ui.preferences.keysPreferencePage">

+		<item value="true" key="uncategorizedFilter"/>

+		<item value="true" key="internalFilter"/>

+		<item value="true" key="actionSetFilter"/>

+	</section>

+	<section name="ImportExportAction">

+		<item value="org.eclipse.ui.wizards.import.FileSystem" key="ImportExportPage.STORE_SELECTED_IMPORT_WIZARD_ID"/>

+		<list key="ImportExportPage.STORE_EXPANDED_IMPORT_CATEGORIES">

+			<item value="org.eclipse.ui.Basic"/>

+		</list>

+	</section>

+</section>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml
new file mode 100644
index 00000000..615be41e
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workbench.xml
@@ -0,0 +1,627 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<workbench progressCount="17" version="2.0">

+<workbenchAdvisor/>

+<window height="768" maximized="true" width="1024" x="220" y="230">

+<fastViewData fastViewLocation="1024"/>

+<perspectiveBar>

+<itemSize x="160"/>

+</perspectiveBar>

+<coolbarLayout locked="0">

+<coolItem id="group.file" itemType="typeGroupMarker"/>

+<coolItem id="org.eclipse.ui.workbench.file" itemType="typeToolBarContribution" x="130" y="22"/>

+<coolItem id="additions" itemType="typeGroupMarker"/>

+<coolItem id="org.eclipse.cdt.ui.CElementCreationActionSet" itemType="typeToolBarContribution" x="161" y="22"/>

+<coolItem id="org.eclipse.cdt.ui.buildConfigActionSet" itemType="typeToolBarContribution" x="85" y="22"/>

+<coolItem id="org.eclipse.debug.ui.launchActionSet" itemType="typeToolBarContribution" x="124" y="22"/>

+<coolItem id="org.eclipse.jdt.ui.JavaElementCreationActionSet" itemType="typeToolBarContribution" x="98" y="22"/>

+<coolItem id="org.eclipse.search.searchActionSet" itemType="typeToolBarContribution" x="98" y="22"/>

+<coolItem id="org.eclipse.ui.edit.text.actionSet.presentation" itemType="typeToolBarContribution" x="37" y="22"/>

+<coolItem id="group.nav" itemType="typeGroupMarker"/>

+<coolItem id="org.eclipse.ui.workbench.navigate" itemType="typeToolBarContribution" x="185" y="22"/>

+<coolItem id="group.editor" itemType="typeGroupMarker"/>

+<coolItem id="org.eclipse.ui.browser.editor" itemType="typePlaceholder" x="-1" y="-1"/>

+<coolItem id="org.eclipse.cdt.ui.editor.asm.AsmEditor" itemType="typePlaceholder" x="-1" y="-1"/>

+<coolItem id="org.eclipse.ui.DefaultTextEditor" itemType="typePlaceholder" x="-1" y="-1"/>

+<coolItem id="org.eclipse.cdt.ui.editor.CEditor" itemType="typeToolBarContribution" x="-1" y="-1"/>

+<coolItem id="org.eclipse.cdt.make.editor" itemType="typePlaceholder" x="-1" y="-1"/>

+<coolItem id="group.help" itemType="typeGroupMarker"/>

+<coolItem id="org.eclipse.ui.workbench.help" itemType="typeToolBarContribution" x="-1" y="-1"/>

+</coolbarLayout>

+<page aggregateWorkingSetId="Aggregate for window 1217933244875" focus="true" label="Workspace - Debug">

+<editors>

+<editorArea activeWorkbook="DefaultEditorWorkbook">

+<info part="DefaultEditorWorkbook">

+<folder appearance="1" expanded="2">

+<presentation id="org.eclipse.ui.presentations.WorkbenchPresentationFactory">

+<part id="0"/>

+<part id="1"/>

+<part id="2"/>

+<part id="3"/>

+<part id="4"/>

+<part id="5"/>

+<part id="6"/>

+</presentation>

+</folder>

+</info>

+</editorArea>

+<editor focus="true" id="org.eclipse.cdt.ui.editor.CEditor" name="FEC.c" partName="FEC.c" path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/FEC.c" title="FEC.c" tooltip="RTOSDemo/webserver/FEC.c" workbook="DefaultEditorWorkbook">

+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/webserver/FEC.c"/>

+<editorState selectionLength="0" selectionOffset="18375"/>

+</editor>

+<editor id="org.eclipse.cdt.ui.editor.CEditor" name="FEC.h" partName="FEC.h" path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/FEC.h" title="FEC.h" tooltip="RTOSDemo/webserver/FEC.h" workbook="DefaultEditorWorkbook">

+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/webserver/FEC.h"/>

+<editorState selectionLength="14" selectionOffset="2671"/>

+</editor>

+<editor id="org.eclipse.cdt.ui.editor.CEditor" name="main.c" partName="main.c" path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/main.c" title="main.c" tooltip="RTOSDemo/main.c" workbook="DefaultEditorWorkbook">

+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/main.c"/>

+<editorState selectionLength="0" selectionOffset="5711"/>

+</editor>

+<editor id="org.eclipse.cdt.ui.editor.CEditor" name="uIP_Task.c" partName="uIP_Task.c" path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/uIP_Task.c" title="uIP_Task.c" tooltip="RTOSDemo/webserver/uIP_Task.c" workbook="DefaultEditorWorkbook">

+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/webserver/uIP_Task.c"/>

+<editorState selectionLength="13" selectionOffset="2607"/>

+</editor>

+<editor id="org.eclipse.cdt.ui.editor.CEditor" name="FreeRTOS_Tick_Setup.c" partName="FreeRTOS_Tick_Setup.c" path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c" title="FreeRTOS_Tick_Setup.c" tooltip="RTOSDemo/FreeRTOS_Tick_Setup.c" workbook="DefaultEditorWorkbook">

+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/FreeRTOS_Tick_Setup.c"/>

+<editorState selectionLength="0" selectionOffset="0"/>

+</editor>

+<editor id="org.eclipse.cdt.ui.editor.CEditor" name="FreeRTOSConfig.h" partName="FreeRTOSConfig.h" path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOSConfig.h" title="FreeRTOSConfig.h" tooltip="RTOSDemo/FreeRTOSConfig.h" workbook="DefaultEditorWorkbook">

+<input factoryID="org.eclipse.ui.part.FileEditorInputFactory" path="/RTOSDemo/FreeRTOSConfig.h"/>

+<editorState selectionLength="28" selectionOffset="5120"/>

+</editor>

+<editor id="org.eclipse.cdt.ui.editor.CEditor" name="MCF5282_INTC.h" partName="MCF5282_INTC.h" title="MCF5282_INTC.h" tooltip="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282_INTC.h" workbook="DefaultEditorWorkbook">

+<input factoryID="org.eclipse.cdt.ui.ExternalEditorInputFactory" path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF5282_Eclipse\RTOSDemo\MCF5282\MCF5282_INTC.h" project="RTOSDemo"/>

+<editorState selectionLength="15" selectionOffset="31680"/>

+</editor>

+</editors>

+<views>

+<view id="org.eclipse.debug.ui.ExpressionView" partName="Expressions">

+<viewState/>

+</view>

+<view id="org.eclipse.cdt.ui.CView" partName="C/C++ Projects">

+<viewState horizontalPosition="0" verticalPosition="0" workingSet="RTOSDemo">

+<expanded>

+<element path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\RTOSDemo"/>

+<element path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF52233_Eclipse\RTOSDemo\webserver"/>

+</expanded>

+<selection>

+<element path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOSConfig.h"/>

+</selection>

+<customFilters userDefinedPatternsEnabled="false">

+<xmlDefinedFilters>

+<child filterId="org.eclipse.cdt.internal.ui.CView.ExecutableFilter" isEnabled="false"/>

+<child filterId="org.eclipse.cdt.internal.ui.CView.SharedFilter" isEnabled="false"/>

+<child filterId="org.eclipse.cdt.internal.ui.CView.ClosedProjectFilter" isEnabled="false"/>

+<child filterId="org.eclipse.cdt.internal.ui.CView.NonCProjectsFilter" isEnabled="false"/>

+<child filterId="org.eclipse.cdt.internal.ui.CView.NonCElementFilter" isEnabled="false"/>

+<child filterId="org.eclipse.cdt.ui.CView_patternFilterId_.*" isEnabled="true"/>

+<child filterId="org.eclipse.cdt.internal.ui.CView.ObjectFilter" isEnabled="false"/>

+<child filterId="org.eclipse.cdt.internal.ui.CView.ArchiveFilter" isEnabled="false"/>

+</xmlDefinedFilters>

+</customFilters>

+</viewState>

+</view>

+<view id="org.eclipse.debug.ui.MemoryView" partName="Memory">

+<viewState/>

+</view>

+<view id="org.eclipse.debug.ui.DebugView" partName="Debug">

+<viewState/>

+</view>

+<view id="org.eclipse.ui.console.ConsoleView:Console View #1" partName="Console">

+<viewState/>

+</view>

+<view id="org.eclipse.ui.views.ProblemView" partName="Problems">

+<viewState PRIMARY_SORT_FIELD="org.eclipse.ui.ide.locationField" categoryGroup="none" markerContentGenerator="org.eclipse.ui.ide.problemsGenerator" partName="Problems">

+<columnWidths org.eclipse.ui.ide.locationField="58" org.eclipse.ui.ide.markerType="83" org.eclipse.ui.ide.pathField="108" org.eclipse.ui.ide.resourceField="83" org.eclipse.ui.ide.severityAndDescriptionField="800"/>

+<visible IMemento.internal.id="org.eclipse.ui.ide.severityAndDescriptionField"/>

+<visible IMemento.internal.id="org.eclipse.ui.ide.resourceField"/>

+<visible IMemento.internal.id="org.eclipse.ui.ide.pathField"/>

+<visible IMemento.internal.id="org.eclipse.ui.ide.locationField"/>

+<visible IMemento.internal.id="org.eclipse.ui.ide.markerType"/>

+</viewState>

+</view>

+<view id="org.eclipse.ui.console.ConsoleView" partName="Console">

+<viewState/>

+</view>

+<view id="org.eclipse.cdt.debug.ui.executablesView" partName="Executables">

+<viewState/>

+</view>

+<view id="org.eclipse.debug.ui.BreakpointView" partName="Breakpoints">

+<viewState>

+<isTrackingSelection value="false"/>

+</viewState>

+</view>

+<view id="org.eclipse.debug.ui.VariableView" partName="Variables">

+<viewState/>

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+</item>

+</navigationHistory>

+<input factoryID="org.eclipse.ui.internal.model.ResourceFactory" path="/" type="8"/>

+</page>

+<workbenchWindowAdvisor/>

+<actionBarAdvisor/>

+<trimLayout>

+<trimArea IMemento.internal.id="128">

+<trimItem IMemento.internal.id="org.eclipse.ui.internal.WorkbenchWindow.topBar"/>

+</trimArea>

+<trimArea IMemento.internal.id="1024">

+<trimItem IMemento.internal.id="org.eclise.ui.internal.FastViewBar"/>

+<trimItem IMemento.internal.id="org.eclipse.jface.action.StatusLineManager"/>

+<trimItem IMemento.internal.id="org.eclipse.ui.internal.progress.ProgressRegion"/>

+</trimArea>

+</trimLayout>

+</window>

+<mruList>

+<file factoryID="org.eclipse.cdt.ui.ExternalEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="MCF5282_INTC.h" tooltip="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282_INTC.h">

+<persistable path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF5282_Eclipse\RTOSDemo\MCF5282\MCF5282_INTC.h" project="RTOSDemo"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="FreeRTOSConfig.h" tooltip="RTOSDemo/FreeRTOSConfig.h">

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+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="FreeRTOS_Tick_Setup.c" tooltip="RTOSDemo/FreeRTOS_Tick_Setup.c">

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+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="uIP_Task.c" tooltip="RTOSDemo/webserver/uIP_Task.c">

+<persistable path="/RTOSDemo/webserver/uIP_Task.c"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="main.c" tooltip="RTOSDemo/main.c">

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+</file>

+<file factoryID="org.eclipse.cdt.ui.ExternalEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="MCF5282_FEC.h" tooltip="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282_FEC.h">

+<persistable path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF5282_Eclipse\RTOSDemo\MCF5282\MCF5282_FEC.h" project="RTOSDemo"/>

+</file>

+<file factoryID="org.eclipse.cdt.ui.ExternalEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="endian.h" tooltip="C:/Devtools/cygwin/usr/include/endian.h">

+<persistable path="C:\Devtools\cygwin\usr\include\endian.h" project="RTOSDemo"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="uip.c" tooltip="RTOSDemo/Demo_Source/ethernet/FreeRTOS-uIP/uip.c">

+<persistable path="/RTOSDemo/Demo_Source/ethernet/FreeRTOS-uIP/uip.c"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="uip-conf.h" tooltip="RTOSDemo/webserver/uip-conf.h">

+<persistable path="/RTOSDemo/webserver/uip-conf.h"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="uipopt.h" tooltip="RTOSDemo/Demo_Source/ethernet/FreeRTOS-uIP/uipopt.h">

+<persistable path="/RTOSDemo/Demo_Source/ethernet/FreeRTOS-uIP/uipopt.h"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="uip.h" tooltip="RTOSDemo/Demo_Source/ethernet/FreeRTOS-uIP/uip.h">

+<persistable path="/RTOSDemo/Demo_Source/ethernet/FreeRTOS-uIP/uip.h"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="uip_arp.h" tooltip="RTOSDemo/Demo_Source/ethernet/FreeRTOS-uIP/uip_arp.h">

+<persistable path="/RTOSDemo/Demo_Source/ethernet/FreeRTOS-uIP/uip_arp.h"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="FEC.c" tooltip="RTOSDemo/webserver/FEC.c">

+<persistable path="/RTOSDemo/webserver/FEC.c"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="httpd-cgi.c" tooltip="RTOSDemo/webserver/httpd-cgi.c">

+<persistable path="/RTOSDemo/webserver/httpd-cgi.c"/>

+</file>

+<file factoryID="org.eclipse.ui.part.FileEditorInputFactory" id="org.eclipse.cdt.ui.editor.CEditor" name="lc-switch.h" tooltip="RTOSDemo/Demo_Source/ethernet/uIP/uip-1.0/uip/lc-switch.h">

+<persistable path="/RTOSDemo/Demo_Source/ethernet/uIP/uip-1.0/uip/lc-switch.h"/>

+</file>

+</mruList>

+</workbench>
\ No newline at end of file
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml
new file mode 100644
index 00000000..8119bf0c
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml
@@ -0,0 +1,72 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<workingSetManager>

+<workingSet editPageId="org.eclipse.cdt.ui.CElementWorkingSetPage" factoryID="org.eclipse.ui.internal.WorkingSetFactory" label="RTOSDemo" name="RTOSDemo">

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOSConfig.h" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS_Source/croutine.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS_Source/include" type="2"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS_Source/list.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS_Source/portable/GCC/ColdFire_V2" type="2"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS_Source/queue.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS_Source/tasks.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS_Tick_Setup.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/IntQueueTimer.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/IntQueueTimer.h" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/ParTest" type="2"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/main.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/serial" type="2"/>

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+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/Minimal/AltPollQ.c" type="1"/>

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+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/Minimal/death.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/Minimal/dynamic.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/Minimal/flash.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/Minimal/flop.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/Minimal/integer.c" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/Minimal/recmutex.c" type="1"/>

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+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/include/AltBlckQ.h" type="1"/>

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+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/include/PollQ.h" type="1"/>

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+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/include/comtest.h" type="1"/>

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+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/include/flash.h" type="1"/>

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+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/include/semtest.h" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/Demo_Source/include/serial.h" type="1"/>

+<item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/RTOSDemo/FreeRTOS_uIP" type="2"/>

+<item factoryID="org.eclipse.ui.internal.model.ResourceFactory" path="/RTOSDemo/Makefile" type="1"/>

+<item factoryID="org.eclipse.ui.internal.model.ResourceFactory" path="/RTOSDemo/m52235evb-rom-hosted.ld" type="1"/>

+</workingSet>

+<workingSet aggregate="true" factoryID="org.eclipse.ui.internal.WorkingSetFactory" label="Window Working Set" name="Aggregate for window 1217933244875"/>

+<mruList name="RTOSDemo"/>

+</workingSetManager>
\ No newline at end of file
diff --git a/Demo/ColdFire_MCF52233_Eclipse/.metadata/version.ini b/Demo/ColdFire_MCF52233_Eclipse/.metadata/version.ini
new file mode 100644
index 00000000..c51ff745
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/.metadata/version.ini
@@ -0,0 +1 @@
+org.eclipse.core.runtime=1
\ No newline at end of file
diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/.cproject b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/.cproject
new file mode 100644
index 00000000..cc1740fd
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/.cproject
@@ -0,0 +1,218 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>

+<?fileVersion 4.0.0?>

+

+<cproject>

+<storageModule moduleId="org.eclipse.cdt.core.settings">

+<cconfiguration id="0.1348192838">

+<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1348192838" moduleId="org.eclipse.cdt.core.settings" name="Default">

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+<extensions>

+<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>

+<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>

+<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>

+<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>

+<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>

+<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>

+</extensions>

+</storageModule>

+<storageModule moduleId="cdtBuildSystem" version="4.0.0">

+<configuration artifactName="RTOSDemo" buildProperties="" description="" id="0.1348192838" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">

+<folderInfo id="0.1348192838." name="/" resourcePath="">

+<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1423010524" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">

+<targetPlatform binaryParser="org.eclipse.cdt.core.ELF" id="org.eclipse.cdt.build.core.prefbase.toolchain.1423010524.128743260" name=""/>

+<builder command="cs-make" id="org.eclipse.cdt.build.core.settings.default.builder.1429594669" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>

+<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1997217404" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>

+<tool id="org.eclipse.cdt.build.core.settings.holder.1053974197" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">

+<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1483927189" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>

+</tool>

+<tool id="org.eclipse.cdt.build.core.settings.holder.99587291" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">

+<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.789637384" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>

+</tool>

+<tool id="org.eclipse.cdt.build.core.settings.holder.804763436" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">

+<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1604293208" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>

+</tool>

+</toolChain>

+</folderInfo>

+<sourceEntries>

+<entry excluding="FreeRTOS_uIP|Demo_Source" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>

+<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Demo_Source"/>

+<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="FreeRTOS_uIP"/>

+</sourceEntries>

+</configuration>

+</storageModule>

+

+<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>

+<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>

+<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>

+<storageModule moduleId="scannerConfiguration">

+<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>

+<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="specsFile">

+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>

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+</scannerInfoProvider>

+</profile>

+<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="makefileGenerator">

+<runAction arguments="-f ${project_name}_scd.mk" command="make" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

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+<scannerConfigBuildInfo instanceId="0.1348192838">

+<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>

+<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="specsFile">

+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

+</profile>

+<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="makefileGenerator">

+<runAction arguments="-f ${project_name}_scd.mk" command="make" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

+</profile>

+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="specsFile">

+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

+</profile>

+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="specsFile">

+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

+</profile>

+<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="specsFile">

+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

+</profile>

+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="specsFile">

+<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

+</profile>

+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="specsFile">

+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

+</profile>

+<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">

+<buildOutputProvider>

+<openAction enabled="true" filePath=""/>

+<parser enabled="true"/>

+</buildOutputProvider>

+<scannerInfoProvider id="specsFile">

+<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>

+<parser enabled="true"/>

+</scannerInfoProvider>

+</profile>

+</scannerConfigBuildInfo>

+</storageModule>

+</cconfiguration>

+</storageModule>

+<storageModule moduleId="cdtBuildSystem" version="4.0.0">

+<project id="RTOSDemo.null.38326818" name="RTOSDemo"/>

+</storageModule>

+</cproject>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/.project b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/.project
new file mode 100644
index 00000000..3ded772a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/.project
@@ -0,0 +1,94 @@
+<?xml version="1.0" encoding="UTF-8"?>

+<projectDescription>

+	<name>RTOSDemo</name>

+	<comment></comment>

+	<projects>

+	</projects>

+	<buildSpec>

+		<buildCommand>

+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>

+			<triggers>clean,full,incremental,</triggers>

+			<arguments>

+				<dictionary>

+					<key>?name?</key>

+					<value></value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.append_environment</key>

+					<value>true</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.autoBuildTarget</key>

+					<value>all</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.buildArguments</key>

+					<value></value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.buildCommand</key>

+					<value>cs-make</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>

+					<value>clean</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.contents</key>

+					<value>org.eclipse.cdt.make.core.activeConfigSettings</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.enableAutoBuild</key>

+					<value>false</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.enableCleanBuild</key>

+					<value>true</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.enableFullBuild</key>

+					<value>true</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.fullBuildTarget</key>

+					<value>all</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.stopOnError</key>

+					<value>true</value>

+				</dictionary>

+				<dictionary>

+					<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>

+					<value>false</value>

+				</dictionary>

+			</arguments>

+		</buildCommand>

+		<buildCommand>

+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>

+			<arguments>

+			</arguments>

+		</buildCommand>

+	</buildSpec>

+	<natures>

+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>

+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>

+		<nature>org.eclipse.cdt.core.cnature</nature>

+	</natures>

+	<linkedResources>

+		<link>

+			<name>Demo_Source</name>

+			<type>2</type>

+			<locationURI>FREERTOS_ROOT/Demo/Common</locationURI>

+		</link>

+		<link>

+			<name>FreeRTOS_Source</name>

+			<type>2</type>

+			<locationURI>FREERTOS_ROOT/Source</locationURI>

+		</link>

+		<link>

+			<name>FreeRTOS_uIP</name>

+			<type>2</type>

+			<locationURI>FREERTOS_ROOT/Demo/Common/ethernet/FreeRTOS-uIP</locationURI>

+		</link>

+	</linkedResources>

+</projectDescription>

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOSConfig.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOSConfig.h
new file mode 100644
index 00000000..b79d6a8d
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOSConfig.h
@@ -0,0 +1,144 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+    ***************************************************************************

+    ***************************************************************************

+    *                                                                         *

+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *

+    * and even write all or part of your application on your behalf.          *

+    * See http://www.OpenRTOS.com for details of the services we provide to   *

+    * expedite your project.                                                  *

+    *                                                                         *

+    ***************************************************************************

+    ***************************************************************************

+

+	Please ensure to read the configuration and relevant port sections of the

+	online documentation.

+

+	http://www.FreeRTOS.org - Documentation, latest information, license and

+	contact details.

+

+	http://www.SafeRTOS.com - A version that is certified for use in safety

+	critical systems.

+

+	http://www.OpenRTOS.com - Commercial support, development, porting,

+	licensing and training services.

+*/

+

+#ifndef FREERTOS_CONFIG_H

+#define FREERTOS_CONFIG_H

+

+#include "MCF52235.h"

+

+/*-----------------------------------------------------------

+ * Application specific definitions.

+ *

+ * These definitions should be adjusted for your particular hardware and

+ * application requirements.

+ *

+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE

+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.

+ *

+ * See http://www.freertos.org/a00110.html.

+ *----------------------------------------------------------*/

+

+#define configUSE_PREEMPTION			1

+#define configUSE_IDLE_HOOK				0

+#define configUSE_TICK_HOOK				0

+#define configCPU_CLOCK_HZ				( ( unsigned portLONG ) 60000000 )

+#define configTICK_RATE_HZ				( ( portTickType ) 100 )

+#define configMINIMAL_STACK_SIZE		( ( unsigned portSHORT ) 90 )

+#define configTOTAL_HEAP_SIZE			( ( size_t ) ( 15000 ) )

+#define configMAX_TASK_NAME_LEN			( 12 )

+#define configUSE_TRACE_FACILITY		1

+#define configUSE_16_BIT_TICKS			0

+#define configIDLE_SHOULD_YIELD			0

+#define configUSE_CO_ROUTINES 			0

+#define configUSE_MUTEXES				1

+#define configCHECK_FOR_STACK_OVERFLOW	1

+#define configUSE_RECURSIVE_MUTEXES		1

+#define configQUEUE_REGISTRY_SIZE		10

+#define configUSE_COUNTING_SEMAPHORES	0

+

+#define configMAX_PRIORITIES		( ( unsigned portBASE_TYPE ) 6 )

+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )

+

+/* Set the following definitions to 1 to include the API function, or zero

+to exclude the API function. */

+

+#define INCLUDE_vTaskPrioritySet			1

+#define INCLUDE_uxTaskPriorityGet			1

+#define INCLUDE_vTaskDelete					1

+#define INCLUDE_vTaskCleanUpResources		0

+#define INCLUDE_vTaskSuspend				1

+#define INCLUDE_vTaskDelayUntil				1

+#define INCLUDE_vTaskDelay					1

+#define INCLUDE_uxTaskGetStackHighWaterMark	1

+

+#define configYIELD_INTERRUPT_VECTOR			16UL

+#define configKERNEL_INTERRUPT_PRIORITY 		1

+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	4

+

+void vApplicationSetupInterrupts( void );

+

+

+/* Ethernet configuration. */

+#define configMAC_0	0x00

+#define configMAC_1	0x04

+#define configMAC_2	0x9F

+#define configMAC_3	0x00

+#define configMAC_4	0xAB

+#define configMAC_5	0x2B

+

+#define configIP_ADDR0	192

+#define configIP_ADDR1	168

+#define configIP_ADDR2	0

+#define configIP_ADDR3	11

+

+#define configGW_ADDR0	172

+#define configGW_ADDR1	25

+#define configGW_ADDR2	218

+#define configGW_ADDR3	3

+

+#define configNET_MASK0	255

+#define configNET_MASK1	255

+#define configNET_MASK2	255

+#define configNET_MASK3	0

+

+#define configNUM_FEC_TX_BUFFERS	1

+#define configNUM_FEC_RX_BUFFERS	3

+#define configFEC_BUFFER_SIZE		1520

+#define configUSE_PROMISCUOUS_MODE	0

+#define configETHERNET_INPUT_TASK_STACK_SIZE ( 320 )

+#define configFEC_INTERRUPT_PRIORITY configMAX_SYSCALL_INTERRUPT_PRIORITY

+

+#define configPHY_ADDRESS	0

+

+#if ( configFEC_BUFFER_SIZE & 0x0F ) != 0

+	#error configFEC_BUFFER_SIZE must be a multiple of 16.

+#endif

+

+

+#endif /* FREERTOS_CONFIG_H */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c
new file mode 100644
index 00000000..ede697c7
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c
@@ -0,0 +1,135 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+    ***************************************************************************

+    ***************************************************************************

+    *                                                                         *

+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *

+    * and even write all or part of your application on your behalf.          *

+    * See http://www.OpenRTOS.com for details of the services we provide to   *

+    * expedite your project.                                                  *

+    *                                                                         *

+    ***************************************************************************

+    ***************************************************************************

+

+	Please ensure to read the configuration and relevant port sections of the

+	online documentation.

+

+	http://www.FreeRTOS.org - Documentation, latest information, license and

+	contact details.

+

+	http://www.SafeRTOS.com - A version that is certified for use in safety

+	critical systems.

+

+	http://www.OpenRTOS.com - Commercial support, development, porting,

+	licensing and training services.

+*/

+

+#include "FreeRTOS.h"

+#include "task.h"

+

+/* Constants used to configure the interrupts. */

+#define portPRESCALE_VALUE			64

+#define portPRESCALE_REG_SETTING	( 5 << 8 )

+#define portPIT_INTERRUPT_ENABLED	( 0x08 )

+#define configPIT0_INTERRUPT_VECTOR	( 55 )

+

+/*

+ * FreeRTOS.org requires two interrupts - a tick interrupt generated from a

+ * timer source, and a spare interrupt vector used for context switching.

+ * The configuration below uses PIT0 for the former, and vector 16 for the

+ * latter.  **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO

+ * NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided

+ * here for using alternative interrupt sources.

+ *

+ * To change the tick interrupt source:

+ *

+ *	1) Modify vApplicationSetupInterrupts() below to be correct for whichever

+ *	peripheral is to be used to generate the tick interrupt.

+ *

+ *	2) Change the name of the function __cs3_isr_interrupt_119() defined within

+ *	this file to be correct for the interrupt vector used by the timer peripheral.

+ *	The name of the function should contain the vector number, so by default vector

+ *	number 119 is being used.

+ *

+ *	3) Make sure the tick interrupt is cleared within the interrupt handler function.

+ *  Currently __cs3_isr_interrupt_119() clears the PIT0 interrupt.

+ *

+ * To change the spare interrupt source:

+ *

+ *  1) Modify vApplicationSetupInterrupts() below to be correct for whichever

+ *  interrupt vector is to be used.  Make sure you use a spare interrupt on interrupt

+ *  controller 0, otherwise the register used to request context switches will also

+ *  require modification.  By default vector 16 is used which is free on most MCF52xxx

+ *  devices.

+ *

+ *  2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h

+ *  to be correct for your chosen interrupt vector.

+ *

+ *  3) Change the name of the function __cs3_isr_interrupt_80() within portasm.S

+ *  to be correct for whichever vector number is being used.  By default interrupt

+ *  controller 0 vector number 16 is used, which corresponds to vector number 80.

+ */

+void vApplicationSetupInterrupts( void )

+{

+const unsigned portSHORT usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );

+

+    /* Configure interrupt priority and level and unmask interrupt for PIT0. */

+    MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );

+    MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );

+

+    /* Do the same for vector 16 (interrupt controller 0).  I don't think the

+    write to MCF_INTC0_IMRH is actually required here but is included for

+    completeness. */

+    MCF_INTC0_ICR16 = ( 0 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );

+    MCF_INTC0_IMRH &= ~( MCF_INTC_IPRL_INT16 );

+

+    /* Configure PIT0 to generate the RTOS tick. */

+    MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;

+    MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );

+	MCF_PIT0_PMR = usCompareMatchValue;

+}

+/*-----------------------------------------------------------*/

+

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_119( void )

+{

+unsigned portLONG ulSavedInterruptMask;

+

+	/* Clear the PIT0 interrupt. */

+	MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;

+

+	/* Increment the RTOS tick. */

+	ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();

+		vTaskIncrementTick();

+	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );

+

+	/* If we are using the pre-emptive scheduler then also request a

+	context switch as incrementing the tick could have unblocked a task. */

+	#if configUSE_PREEMPTION == 1

+	{

+		taskYIELD();

+	}

+	#endif

+}

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/IntQueueTimer.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/IntQueueTimer.c
new file mode 100644
index 00000000..f8719642
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/IntQueueTimer.c
@@ -0,0 +1,91 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+    ***************************************************************************

+    ***************************************************************************

+    *                                                                         *

+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *

+    * and even write all or part of your application on your behalf.          *

+    * See http://www.OpenRTOS.com for details of the services we provide to   *

+    * expedite your project.                                                  *

+    *                                                                         *

+    ***************************************************************************

+    ***************************************************************************

+

+	Please ensure to read the configuration and relevant port sections of the

+	online documentation.

+

+	http://www.FreeRTOS.org - Documentation, latest information, license and

+	contact details.

+

+	http://www.SafeRTOS.com - A version that is certified for use in safety

+	critical systems.

+

+	http://www.OpenRTOS.com - Commercial support, development, porting,

+	licensing and training services.

+*/

+

+#include "FreeRTOS.h"

+#include "IntQueueTimer.h"

+#include "IntQueue.h"

+

+#define timerINTERRUPT1_FREQUENCY	( 2000UL )

+#define timerINTERRUPT2_FREQUENCY	( 2001UL )

+#define timerPRESCALE_VALUE			( 2 )

+

+void vInitialiseTimerForIntQueueTest( void )

+{

+const unsigned portSHORT usCompareMatchValue1 = ( unsigned portSHORT ) ( ( configCPU_CLOCK_HZ / timerPRESCALE_VALUE ) / timerINTERRUPT1_FREQUENCY );

+const unsigned portSHORT usCompareMatchValue2 = ( unsigned portSHORT ) ( ( configCPU_CLOCK_HZ / timerPRESCALE_VALUE ) / timerINTERRUPT2_FREQUENCY );

+

+	/* Configure interrupt priority and level and unmask interrupt. */

+	MCF_INTC0_ICR56 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 1 ) << 3 );

+	MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK56 );

+

+	MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF;

+	MCF_PIT1_PCSR = ( MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );

+	MCF_PIT1_PMR = usCompareMatchValue1;

+

+	MCF_INTC0_ICR57 = ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 3 );

+	MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK57 );

+

+//	MCF_PIT2_PCSR |= MCF_PIT_PCSR_PIF;

+//	MCF_PIT2_PCSR = ( MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );

+//	MCF_PIT2_PMR = usCompareMatchValue2;

+}

+/*-----------------------------------------------------------*/

+

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_120( void )

+{

+	MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF;

+	portEND_SWITCHING_ISR( xFirstTimerHandler() );

+}

+/*-----------------------------------------------------------*/

+

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_121( void )

+{

+//_RB_	MCF_PIT2_PCSR |= MCF_PIT_PCSR_PIF;

+	portEND_SWITCHING_ISR( xSecondTimerHandler() );

+}

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/IntQueueTimer.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/IntQueueTimer.h
new file mode 100644
index 00000000..720f0cdc
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/IntQueueTimer.h
@@ -0,0 +1,58 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+    ***************************************************************************

+    ***************************************************************************

+    *                                                                         *

+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *

+    * and even write all or part of your application on your behalf.          *

+    * See http://www.OpenRTOS.com for details of the services we provide to   *

+    * expedite your project.                                                  *

+    *                                                                         *

+    ***************************************************************************

+    ***************************************************************************

+

+	Please ensure to read the configuration and relevant port sections of the

+	online documentation.

+

+	http://www.FreeRTOS.org - Documentation, latest information, license and 

+	contact details.

+

+	http://www.SafeRTOS.com - A version that is certified for use in safety 

+	critical systems.

+

+	http://www.OpenRTOS.com - Commercial support, development, porting, 

+	licensing and training services.

+*/

+

+#ifndef INT_QUEUE_TIMER_H

+#define INT_QUEUE_TIMER_H

+

+void vInitialiseTimerForIntQueueTest( void );

+portBASE_TYPE xTimer0Handler( void );

+portBASE_TYPE xTimer1Handler( void );

+

+#endif

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52233_Ethernet.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52233_Ethernet.c
new file mode 100644
index 00000000..d9569037
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52233_Ethernet.c
@@ -0,0 +1,888 @@
+/*

+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without modification,

+ * are permitted provided that the following conditions are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright notice,

+ *    this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright notice,

+ *    this list of conditions and the following disclaimer in the documentation

+ *    and/or other materials provided with the distribution.

+ * 3. The name of the author may not be used to endorse or promote products

+ *    derived from this software without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED

+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF

+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT

+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,

+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT

+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN

+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING

+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY

+ * OF SUCH DAMAGE.

+ *

+ * This file is part of the lwIP TCP/IP stack.

+ *

+ * Author: Adam Dunkels <adam@sics.se>

+ *

+ */

+

+/* Standard library includes. */

+#include <stdio.h>

+#include <string.h>

+

+/* FreeRTOS includes. */

+#include "FreeRTOS.h"

+#include "task.h"

+

+xTaskHandle xEthIntTask;

+

+/* lwIP includes. */

+#include "lwip/def.h"

+#include "lwip/mem.h"

+#include "lwip/pbuf.h"

+#include "lwip/sys.h"

+#include "lwip/stats.h"

+#include "lwip/snmp.h"

+#include "netif/etharp.h"

+

+/* Hardware includes. */

+#include "fec.h"

+

+/* Delay to wait for a DMA buffer to become available if one is not already

+available. */

+#define netifBUFFER_WAIT_ATTEMPTS					10

+#define netifBUFFER_WAIT_DELAY						(10 / portTICK_RATE_MS)

+

+/* Delay between polling the PHY to see if a link has been established. */

+#define netifLINK_DELAY								( 500 / portTICK_RATE_MS )

+

+/* Delay between looking for incoming packets.  In ideal world this would be

+infinite. */

+#define netifBLOCK_TIME_WAITING_FOR_INPUT			netifLINK_DELAY

+

+/* Name for the netif. */

+#define IFNAME0 'e'

+#define IFNAME1 'n'

+

+/* Hardware specific. */

+#define netifFIRST_FEC_VECTOR						23

+

+/*-----------------------------------------------------------*/

+

+/* The DMA descriptors.  This is a char array to allow us to align it correctly. */

+static unsigned portCHAR xFECTxDescriptors_unaligned[ ( configNUM_FEC_TX_BUFFERS * sizeof( FECBD ) ) + 16 ];

+static unsigned portCHAR xFECRxDescriptors_unaligned[ ( configNUM_FEC_RX_BUFFERS * sizeof( FECBD ) ) + 16 ];

+static FECBD *xFECTxDescriptors;

+static FECBD *xFECRxDescriptors;

+

+/* The DMA buffers.  These are char arrays to allow them to be alligned correctly. */

+static unsigned portCHAR ucFECTxBuffers[ ( configNUM_FEC_TX_BUFFERS * configFEC_BUFFER_SIZE ) + 16 ];

+static unsigned portCHAR ucFECRxBuffers[ ( configNUM_FEC_RX_BUFFERS * configFEC_BUFFER_SIZE ) + 16 ];

+static unsigned portBASE_TYPE uxNextRxBuffer = 0, uxNextTxBuffer = 0;

+

+/* Semaphore used by the FEC interrupt handler to wake the handler task. */

+static xSemaphoreHandle xFecSemaphore;

+

+#pragma options align= packed

+struct ethernetif

+{

+  struct eth_addr *ethaddr;

+  /* Add whatever per-interface state that is needed here. */

+};

+

+/*-----------------------------------------------------------*/

+

+/* Standard lwIP netif handlers. */

+static void prvInitialiseFECBuffers( void );

+static void low_level_init( struct netif *netif );

+static err_t low_level_output(struct netif *netif, struct pbuf *p);

+static struct pbuf *low_level_input(struct netif *netif);

+static void ethernetif_input( void *pParams );

+

+/* Functions adapted from Freescale provided code. */

+static int fec_mii_write( int phy_addr, int reg_addr, int data );

+static int fec_mii_read( int phy_addr, int reg_addr, uint16* data );

+static uint8 fec_hash_address( const uint8* addr );

+static void fec_set_address( const uint8 *pa );

+static void fec_irq_enable( void );

+

+/*-----------------------------------------------------------*/

+

+/********************************************************************/

+/*

+ * Write a value to a PHY's MII register.

+ *

+ * Parameters:

+ *  ch          FEC channel

+ *  phy_addr    Address of the PHY.

+ *  reg_addr    Address of the register in the PHY.

+ *  data        Data to be written to the PHY register.

+ *

+ * Return Values:

+ *  0 on failure

+ *  1 on success.

+ *

+ * Please refer to your PHY manual for registers and their meanings.

+ * mii_write() polls for the FEC's MII interrupt event and clears it. 

+ * If after a suitable amount of time the event isn't triggered, a 

+ * value of 0 is returned.

+ */

+static int fec_mii_write( int phy_addr, int reg_addr, int data )

+{

+int timeout;

+uint32 eimr;

+

+	/* Clear the MII interrupt bit */

+	MCF_FEC_EIR = MCF_FEC_EIR_MII;

+

+	/* Mask the MII interrupt */

+	eimr = MCF_FEC_EIMR;

+	MCF_FEC_EIMR &= ~MCF_FEC_EIMR_MII;

+

+	/* Write to the MII Management Frame Register to kick-off the MII write */

+	MCF_FEC_MMFR = MCF_FEC_MMFR_ST_01 | MCF_FEC_MMFR_OP_WRITE | MCF_FEC_MMFR_PA(phy_addr) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10 | MCF_FEC_MMFR_DATA( data );

+

+	/* Poll for the MII interrupt (interrupt should be masked) */

+	for (timeout = 0; timeout < MII_TIMEOUT; timeout++)

+	{

+		if (MCF_FEC_EIR & MCF_FEC_EIR_MII)

+		{

+			break;

+		}

+	}

+

+	if( timeout == MII_TIMEOUT )

+	{

+		return 0;

+	}

+

+	/* Clear the MII interrupt bit */

+	MCF_FEC_EIR = MCF_FEC_EIR_MII;

+

+	/* Restore the EIMR */

+	MCF_FEC_EIMR = eimr;

+

+	return 1;

+}

+

+/********************************************************************/

+/*

+ * Read a value from a PHY's MII register.

+ *

+ * Parameters:

+ *  ch          FEC channel

+ *  phy_addr    Address of the PHY.

+ *  reg_addr    Address of the register in the PHY.

+ *  data        Pointer to storage for the Data to be read

+ *              from the PHY register (passed by reference)

+ *

+ * Return Values:

+ *  0 on failure

+ *  1 on success.

+ *

+ * Please refer to your PHY manual for registers and their meanings.

+ * mii_read() polls for the FEC's MII interrupt event and clears it. 

+ * If after a suitable amount of time the event isn't triggered, a 

+ * value of 0 is returned.

+ */

+static int fec_mii_read( int phy_addr, int reg_addr, uint16* data )

+{

+int timeout;

+uint32 eimr;

+

+	/* Clear the MII interrupt bit */

+	MCF_FEC_EIR = MCF_FEC_EIR_MII;

+

+	/* Mask the MII interrupt */

+	eimr = MCF_FEC_EIMR;

+	MCF_FEC_EIMR &= ~MCF_FEC_EIMR_MII;

+

+	/* Write to the MII Management Frame Register to kick-off the MII read */

+	MCF_FEC_MMFR = MCF_FEC_MMFR_ST_01 | MCF_FEC_MMFR_OP_READ | MCF_FEC_MMFR_PA(phy_addr) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10;

+

+	/* Poll for the MII interrupt (interrupt should be masked) */

+	for (timeout = 0; timeout < MII_TIMEOUT; timeout++)

+	{

+		if (MCF_FEC_EIR & MCF_FEC_EIR_MII)

+		{

+			break;

+		}

+	}

+

+	if(timeout == MII_TIMEOUT)

+	{

+		return 0;

+	}

+

+	/* Clear the MII interrupt bit */

+	MCF_FEC_EIR = MCF_FEC_EIR_MII;

+

+	/* Restore the EIMR */

+	MCF_FEC_EIMR = eimr;

+

+	*data = (uint16)(MCF_FEC_MMFR & 0x0000FFFF);

+

+	return 1;

+}

+

+

+/********************************************************************/

+/*

+ * Generate the hash table settings for the given address

+ *

+ * Parameters:

+ *  addr    48-bit (6 byte) Address to generate the hash for

+ *

+ * Return Value:

+ *  The 6 most significant bits of the 32-bit CRC result

+ */

+static uint8 fec_hash_address( const uint8* addr )

+{

+uint32 crc;

+uint8 byte;

+int i, j;

+

+	crc = 0xFFFFFFFF;

+	for(i=0; i<6; ++i)

+	{

+		byte = addr[i];

+		for(j=0; j<8; ++j)

+		{

+			if((byte & 0x01)^(crc & 0x01))

+			{

+				crc >>= 1;

+				crc = crc ^ 0xEDB88320;

+			}

+			else

+			{

+				crc >>= 1;

+			}

+

+			byte >>= 1;

+		}

+	}

+

+	return (uint8)(crc >> 26);

+}

+

+/********************************************************************/

+/*

+ * Set the Physical (Hardware) Address and the Individual Address

+ * Hash in the selected FEC

+ *

+ * Parameters:

+ *  ch  FEC channel

+ *  pa  Physical (Hardware) Address for the selected FEC

+ */

+static void fec_set_address( const uint8 *pa )

+{

+	uint8 crc;

+

+	/*

+	* Set the Physical Address

+	*/

+	MCF_FEC_PALR = (uint32)((pa[0]<<24) | (pa[1]<<16) | (pa[2]<<8) | pa[3]);

+	MCF_FEC_PAUR = (uint32)((pa[4]<<24) | (pa[5]<<16));

+

+	/*

+	* Calculate and set the hash for given Physical Address

+	* in the  Individual Address Hash registers

+	*/

+	crc = fec_hash_address(pa);

+	if(crc >= 32)

+	{

+		MCF_FEC_IAUR |= (uint32)(1 << (crc - 32));

+	}

+	else

+	{

+		MCF_FEC_IALR |= (uint32)(1 << crc);

+	}

+}

+

+

+/********************************************************************/

+/*

+ * Enable interrupts on the selected FEC

+ *

+ */

+static void fec_irq_enable( void )

+{

+int fec_vbase;

+

+#if INTC_LVL_FEC > configMAX_SYSCALL_INTERRUPT_PRIORITY

+	#error INTC_LVL_FEC must be less than or equal to configMAX_SYSCALL_INTERRUPT_PRIORITY

+#endif

+

+	fec_vbase = 64 + netifFIRST_FEC_VECTOR;

+    

+	/* Enable FEC interrupts to the ColdFire core 

+	 * Setup each ICR with a unique interrupt level combination */

+	fec_vbase -= 64;

+

+	/* FEC Rx Frame */

+	MCF_INTC0_ICR(fec_vbase+4)  = MCF_INTC_ICR_IL(INTC_LVL_FEC);

+

+	/* FEC Rx Buffer */                              

+	MCF_INTC0_ICR(fec_vbase+5)  = MCF_INTC_ICR_IL(INTC_LVL_FEC);

+

+	/* FEC FIFO Underrun */                              

+	MCF_INTC0_ICR(fec_vbase+2)  = MCF_INTC_ICR_IL(INTC_LVL_FEC+1);

+

+	/* FEC Collision Retry Limit */                              

+	MCF_INTC0_ICR(fec_vbase+3)  = MCF_INTC_ICR_IL(INTC_LVL_FEC+1);

+

+	/* FEC Late Collision */                                 

+	MCF_INTC0_ICR(fec_vbase+7)  = MCF_INTC_ICR_IL(INTC_LVL_FEC+1);

+

+	/* FEC Heartbeat Error */                                

+	MCF_INTC0_ICR(fec_vbase+8)  = MCF_INTC_ICR_IL(INTC_LVL_FEC+1);

+

+	/* FEC Bus Error */                              

+	MCF_INTC0_ICR(fec_vbase+10) = MCF_INTC_ICR_IL(INTC_LVL_FEC+1);

+

+	/* FEC Babbling Transmit */                              

+	MCF_INTC0_ICR(fec_vbase+11) = MCF_INTC_ICR_IL(INTC_LVL_FEC+1);

+

+	/* FEC Babbling Receive */                               

+	MCF_INTC0_ICR(fec_vbase+12) = MCF_INTC_ICR_IL(INTC_LVL_FEC+1);

+                                 

+	/* Enable the FEC interrupts in the mask register */    

+	MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK33 | MCF_INTC_IMRH_INT_MASK34 | MCF_INTC_IMRH_INT_MASK35 );

+	MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK25 | MCF_INTC_IMRL_INT_MASK26 | MCF_INTC_IMRL_INT_MASK27 | MCF_INTC_IMRL_INT_MASK28 | MCF_INTC_IMRL_INT_MASK29 | MCF_INTC_IMRL_INT_MASK30 | MCF_INTC_IMRL_INT_MASK31 | MCF_INTC_IMRL_MASKALL );

+

+    /* Clear any pending FEC interrupt events */

+    MCF_FEC_EIR = MCF_FEC_EIR_CLEAR_ALL;

+

+    /* Unmask all FEC interrupts */

+    MCF_FEC_EIMR = MCF_FEC_EIMR_UNMASK_ALL;

+}

+

+/**

+ * In this function, the hardware should be initialized.

+ * Called from ethernetif_init().

+ *

+ * @param netif the already initialized lwip network interface structure

+ *        for this ethernetif

+ */

+static void low_level_init( struct netif *netif )

+{

+unsigned portSHORT usData;

+const unsigned portCHAR ucMACAddress[6] = 

+{

+	configMAC_0, configMAC_1,configMAC_2,configMAC_3,configMAC_4,configMAC_5

+};

+

+	prvInitialiseFECBuffers();

+	vSemaphoreCreateBinary( xFecSemaphore );

+	

+	for( usData = 0; usData < 6; usData++ )

+	{

+		netif->hwaddr[ usData ] = ucMACAddress[ usData ];

+	}

+

+	/* Set the Reset bit and clear the Enable bit */

+	MCF_FEC_ECR = MCF_FEC_ECR_RESET;

+

+	/* Wait at least 8 clock cycles */

+	for( usData = 0; usData < 10; usData++ )

+	{

+		asm( "NOP" );

+	}

+

+	/* Set MII speed to 2.5MHz. */

+	MCF_FEC_MSCR = MCF_FEC_MSCR_MII_SPEED( ( ( configCPU_CLOCK_HZ / 1000000 ) / 5 ) + 1 );

+

+	/*

+	 * Make sure the external interface signals are enabled

+	 */

+	MCF_GPIO_PNQPAR = MCF_GPIO_PNQPAR_IRQ3_FEC_MDIO	| MCF_GPIO_PNQPAR_IRQ5_FEC_MDC;

+

+

+    MCF_GPIO_PTIPAR = MCF_GPIO_PTIPAR_FEC_COL_FEC_COL			

+					| MCF_GPIO_PTIPAR_FEC_CRS_FEC_CRS			

+					| MCF_GPIO_PTIPAR_FEC_RXCLK_FEC_RXCLK		

+					| MCF_GPIO_PTIPAR_FEC_RXD0_FEC_RXD0			

+					| MCF_GPIO_PTIPAR_FEC_RXD1_FEC_RXD1			

+					| MCF_GPIO_PTIPAR_FEC_RXD2_FEC_RXD2			

+					| MCF_GPIO_PTIPAR_FEC_RXD3_FEC_RXD3			

+					| MCF_GPIO_PTIPAR_FEC_RXDV_FEC_RXDV;		

+

+	MCF_GPIO_PTJPAR = MCF_GPIO_PTJPAR_FEC_RXER_FEC_RXER			

+					| MCF_GPIO_PTJPAR_FEC_TXCLK_FEC_TXCLK		

+					| MCF_GPIO_PTJPAR_FEC_TXD0_FEC_TXD0			

+					| MCF_GPIO_PTJPAR_FEC_TXD1_FEC_TXD1			

+					| MCF_GPIO_PTJPAR_FEC_TXD2_FEC_TXD2			

+					| MCF_GPIO_PTJPAR_FEC_TXD3_FEC_TXD3			

+					| MCF_GPIO_PTJPAR_FEC_TXEN_FEC_TXEN			

+					| MCF_GPIO_PTJPAR_FEC_TXER_FEC_TXER;		

+

+

+	/* Can we talk to the PHY? */

+	do

+	{

+		vTaskDelay( netifLINK_DELAY );

+		usData = 0;

+		fec_mii_read( configPHY_ADDRESS, PHY_PHYIDR1, &usData );

+

+	} while( ( usData == 0xffff ) || ( usData == 0 ) );

+

+	/* Start auto negotiate. */

+	fec_mii_write( configPHY_ADDRESS, PHY_BMCR, ( PHY_BMCR_AN_RESTART | PHY_BMCR_AN_ENABLE ) );

+

+	/* Wait for auto negotiate to complete. */

+	do

+	{

+		vTaskDelay( netifLINK_DELAY );

+		fec_mii_read( configPHY_ADDRESS, PHY_BMSR, &usData );

+

+	} while( !( usData & PHY_BMSR_AN_COMPLETE ) );

+

+	/* When we get here we have a link - find out what has been negotiated. */

+	fec_mii_read( configPHY_ADDRESS, PHY_ANLPAR, &usData );

+	

+	if( ( usData & PHY_ANLPAR_100BTX_FDX ) || ( usData & PHY_ANLPAR_100BTX ) )

+	{

+		/* Speed is 100. */

+	}

+	else

+	{

+		/* Speed is 10. */

+	}

+

+	if( ( usData & PHY_ANLPAR_100BTX_FDX ) || ( usData & PHY_ANLPAR_10BTX_FDX ) )

+	{

+		/* Full duplex. */

+		MCF_FEC_RCR &= (uint32)~MCF_FEC_RCR_DRT;

+		MCF_FEC_TCR |= MCF_FEC_TCR_FDEN;

+	}

+	else

+	{

+		MCF_FEC_RCR |= MCF_FEC_RCR_DRT;

+		MCF_FEC_TCR &= (uint32)~MCF_FEC_TCR_FDEN;

+	}

+	

+	/* Clear the Individual and Group Address Hash registers */

+	MCF_FEC_IALR = 0;

+	MCF_FEC_IAUR = 0;

+	MCF_FEC_GALR = 0;

+	MCF_FEC_GAUR = 0;

+

+	/* Set the Physical Address for the selected FEC */

+	fec_set_address( ucMACAddress );

+

+	/* Set Rx Buffer Size */

+	MCF_FEC_EMRBR = (uint16)configFEC_BUFFER_SIZE;

+

+	/* Point to the start of the circular Rx buffer descriptor queue */

+	MCF_FEC_ERDSR = ( volatile unsigned portLONG ) &( xFECRxDescriptors[ 0 ] );

+

+	/* Point to the start of the circular Tx buffer descriptor queue */

+	MCF_FEC_ETSDR = ( volatile unsigned portLONG ) &( xFECTxDescriptors[ 0 ] );

+

+	/* Mask all FEC interrupts */

+	MCF_FEC_EIMR = MCF_FEC_EIMR_MASK_ALL;

+

+	/* Clear all FEC interrupt events */

+	MCF_FEC_EIR = MCF_FEC_EIR_CLEAR_ALL;

+

+	/* Initialize the Receive Control Register */

+	MCF_FEC_RCR = MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM) | MCF_FEC_RCR_FCE;

+

+	MCF_FEC_RCR |= MCF_FEC_RCR_MII_MODE;

+

+	#if( configUSE_PROMISCUOUS_MODE == 1 )

+	{

+		MCF_FEC_RCR |= MCF_FEC_RCR_PROM;

+	}

+	#endif

+

+	/* Create the task that handles the EMAC. */

+	xTaskCreate( ethernetif_input, ( signed portCHAR * ) "ETH_INT", configETHERNET_INPUT_TASK_STACK_SIZE, (void *)netif, configETHERNET_INPUT_TASK_PRIORITY, &xEthIntTask );

+	

+	fec_irq_enable();

+	MCF_FEC_ECR = MCF_FEC_ECR_ETHER_EN;

+	MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;	

+}

+

+/**

+ * This function should do the actual transmission of the packet. The packet is

+ * contained in the pbuf that is passed to the function. This pbuf

+ * might be chained.

+ *

+ * @param netif the lwip network interface structure for this ethernetif

+ * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)

+ * @return ERR_OK if the packet could be sent

+ *         an err_t value if the packet couldn't be sent

+ *

+ * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to

+ *       strange results. You might consider waiting for space in the DMA queue

+ *       to become availale since the stack doesn't retry to send a packet

+ *       dropped because of memory failure (except for the TCP timers).

+ */

+static err_t low_level_output(struct netif *netif, struct pbuf *p)

+{

+struct pbuf *q;

+u32_t l = 0;

+unsigned portCHAR *pcTxData = NULL;

+portBASE_TYPE i;

+

+	( void ) netif;

+

+	#if ETH_PAD_SIZE

+	  pbuf_header(p, -ETH_PAD_SIZE);			/* drop the padding word */

+	#endif

+

+	/* Get a DMA buffer into which we can write the data to send. */

+	for( i = 0; i < netifBUFFER_WAIT_ATTEMPTS; i++ )

+	{

+		if( xFECTxDescriptors[ uxNextTxBuffer ].status & TX_BD_R )

+		{

+			/* Wait for the buffer to become available. */

+			vTaskDelay( netifBUFFER_WAIT_DELAY );

+		}

+		else

+		{

+			pcTxData = xFECTxDescriptors[ uxNextTxBuffer ].data;

+			break;

+		}

+	}

+

+	if( pcTxData == NULL ) 

+	{

+		/* For break point only. */

+		portNOP();

+

+		return ERR_BUF;

+	}

+	else 

+	{

+		for( q = p; q != NULL; q = q->next ) 

+		{

+			/* Send the data from the pbuf to the interface, one pbuf at a

+			time. The size of the data in each pbuf is kept in the ->len

+			variable. */

+			memcpy( &pcTxData[l], (u8_t*)q->payload, q->len );

+			l += q->len;

+		}

+	}

+

+	/* Setup the buffer descriptor for transmission */

+	xFECTxDescriptors[ uxNextTxBuffer ].length = l;//nbuf->length + ETH_HDR_LEN;

+	xFECTxDescriptors[ uxNextTxBuffer ].status |= (TX_BD_R | TX_BD_L);

+

+	/* Continue the Tx DMA task (in case it was waiting for a new TxBD) */

+	MCF_FEC_TDAR = MCF_FEC_TDAR_X_DES_ACTIVE;

+

+	uxNextTxBuffer++;

+	if( uxNextTxBuffer >= configNUM_FEC_TX_BUFFERS )

+	{

+		uxNextTxBuffer = 0;

+	}

+

+	#if ETH_PAD_SIZE

+		pbuf_header(p, ETH_PAD_SIZE);			/* reclaim the padding word */

+	#endif

+

+	LINK_STATS_INC(link.xmit);

+

+	return ERR_OK;

+}

+

+/**

+ * Should allocate a pbuf and transfer the bytes of the incoming

+ * packet from the interface into the pbuf.

+ *

+ * @param netif the lwip network interface structure for this ethernetif

+ * @return a pbuf filled with the received packet (including MAC header)

+ *         NULL on memory error

+ */

+static struct pbuf *low_level_input(struct netif *netif)

+{

+struct pbuf *p, *q;

+u16_t len, l;

+

+	( void ) netif;

+

+	l = 0;

+	p = NULL;

+

+	/* Obtain the size of the packet and put it into the "len" variable. */

+	len = xFECRxDescriptors[ uxNextRxBuffer ].length;

+

+	if( ( len != 0 ) && ( ( xFECRxDescriptors[ uxNextRxBuffer ].status & RX_BD_E ) == 0 ) )

+	{

+		#if ETH_PAD_SIZE

+			len += ETH_PAD_SIZE;						/* allow room for Ethernet padding */

+		#endif

+

+		/* We allocate a pbuf chain of pbufs from the pool. */

+		p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);

+

+		if (p != NULL) 

+		{

+

+			#if ETH_PAD_SIZE

+					pbuf_header(p, -ETH_PAD_SIZE);			/* drop the padding word */

+			#endif

+

+			/* We iterate over the pbuf chain until we have read the entire

+			 * packet into the pbuf. */

+			for(q = p; q != NULL; q = q->next) 

+			{

+				/* Read enough bytes to fill this pbuf in the chain. The

+				 * available data in the pbuf is given by the q->len

+				 * variable. */

+				memcpy((u8_t*)q->payload, &(xFECRxDescriptors[ uxNextRxBuffer ].data[l]), q->len);

+				l = l + q->len;

+			}

+

+

+			#if ETH_PAD_SIZE

+				pbuf_header(p, ETH_PAD_SIZE);			/* reclaim the padding word */

+			#endif

+

+			LINK_STATS_INC(link.recv);

+

+		} 

+		else 

+		{

+

+			LINK_STATS_INC(link.memerr);

+			LINK_STATS_INC(link.drop);

+

+		} /* End else */

+		

+		

+		/* Free the descriptor. */

+		xFECRxDescriptors[ uxNextRxBuffer ].status |= RX_BD_E;

+		MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;

+		

+		uxNextRxBuffer++;

+		if( uxNextRxBuffer >= configNUM_FEC_RX_BUFFERS )

+		{

+			uxNextRxBuffer = 0;

+		}		

+		

+	} /* End if */

+

+	return p;

+}

+

+/**

+ * This function should be called when a packet is ready to be read

+ * from the interface. It uses the function low_level_input() that

+ * should handle the actual reception of bytes from the network

+ * interface.Then the type of the received packet is determined and

+ * the appropriate input function is called.

+ *

+ * @param netif the lwip network interface structure for this ethernetif

+ */

+

+static void ethernetif_input( void *pParams )

+{

+struct netif *netif;

+struct ethernetif *ethernetif;

+struct eth_hdr *ethhdr;

+struct pbuf *p;

+

+	netif = (struct netif*) pParams;

+	ethernetif = netif->state;

+

+	for( ;; )

+	{

+		do

+		{

+

+			/* move received packet into a new pbuf */

+			p = low_level_input( netif );

+

+			if( p == NULL )

+			{

+				/* No packet could be read.  Wait a for an interrupt to tell us

+				there is more data available. */

+				xSemaphoreTake( xFecSemaphore, netifBLOCK_TIME_WAITING_FOR_INPUT );

+			}

+

+		} while( p == NULL );

+

+		/* points to packet payload, which starts with an Ethernet header */

+		ethhdr = p->payload;

+

+		switch (htons(ethhdr->type)) {

+			/* IP or ARP packet? */

+

+		case ETHTYPE_IP:

+

+			pbuf_header( p, (s16_t)-sizeof(struct eth_hdr) );

+

+			/* full packet send to tcpip_thread to process */

+			if (netif->input(p, netif) != ERR_OK)

+			{

+				LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input error\n"));

+				pbuf_free(p);

+				p = NULL;

+			}

+			break;

+

+		case ETHTYPE_ARP:

+

+			#if ETHARP_TRUST_IP_MAC

+				etharp_ip_input(netif, p);

+			#endif

+

+			etharp_arp_input(netif, ethernetif->ethaddr, p);

+			break;

+

+		default:

+			pbuf_free(p);

+			p = NULL;

+			break;

+		}

+	}

+}

+

+/**

+ * Should be called at the beginning of the program to set up the

+ * network interface. It calls the function low_level_init() to do the

+ * actual setup of the hardware.

+ *

+ * This function should be passed as a parameter to netif_add().

+ *

+ * @param netif the lwip network interface structure for this ethernetif

+ * @return ERR_OK if the loopif is initialized

+ *         ERR_MEM if private data couldn't be allocated

+ *         any other err_t on error

+ */

+err_t ethernetif_init(struct netif *netif)

+{

+	struct ethernetif *ethernetif;

+

+	LWIP_ASSERT("netif != NULL", (netif != NULL));

+

+	ethernetif = mem_malloc(sizeof(struct ethernetif));

+

+	if (ethernetif == NULL)

+	{

+		LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\n"));

+		return ERR_MEM;

+	}

+

+	#if LWIP_NETIF_HOSTNAME

+	/* Initialize interface hostname */

+	netif->hostname = "lwip";

+	#endif /* LWIP_NETIF_HOSTNAME */

+

+	/*

+	* Initialize the snmp variables and counters inside the struct netif.

+	* The last argument should be replaced with your link speed, in units

+	* of bits per second.

+	*/

+	NETIF_INIT_SNMP(netif, snmp_ifType_ethernet_csmacd, 100);

+

+	netif->state = ethernetif;

+	netif->name[0] = IFNAME0;

+	netif->name[1] = IFNAME1;

+

+	/* We directly use etharp_output() here to save a function call.

+	* You can instead declare your own function an call etharp_output()

+	* from it if you have to do some checks before sending (e.g. if link

+	* is available...)

+	*/

+	netif->output = etharp_output;

+	netif->linkoutput = low_level_output;

+

+	ethernetif->ethaddr = (struct eth_addr *)&(netif->hwaddr[0]);

+

+	low_level_init(netif);

+

+	return ERR_OK;

+}

+/*-----------------------------------------------------------*/

+

+static void prvInitialiseFECBuffers( void )

+{

+unsigned portBASE_TYPE ux;

+unsigned portCHAR *pcBufPointer;

+

+	pcBufPointer = &( xFECTxDescriptors_unaligned[ 0 ] );

+	while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )

+	{

+		pcBufPointer++;

+	}

+	

+	xFECTxDescriptors = ( FECBD * ) pcBufPointer;

+	

+	pcBufPointer = &( xFECRxDescriptors_unaligned[ 0 ] );

+	while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )

+	{

+		pcBufPointer++;

+	}

+	

+	xFECRxDescriptors = ( FECBD * ) pcBufPointer;

+

+

+	/* Setup the buffers and descriptors. */

+	pcBufPointer = &( ucFECTxBuffers[ 0 ] );

+	while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )

+	{

+		pcBufPointer++;

+	}

+

+	for( ux = 0; ux < configNUM_FEC_TX_BUFFERS; ux++ )

+	{

+		xFECTxDescriptors[ ux ].status = TX_BD_TC;

+		xFECTxDescriptors[ ux ].data = pcBufPointer;

+		pcBufPointer += configFEC_BUFFER_SIZE;

+		xFECTxDescriptors[ ux ].length = 0;

+	}

+

+	pcBufPointer = &( ucFECRxBuffers[ 0 ] );

+	while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )

+	{

+		pcBufPointer++;

+	}

+	

+	for( ux = 0; ux < configNUM_FEC_RX_BUFFERS; ux++ )

+	{

+	    xFECRxDescriptors[ ux ].status = RX_BD_E;

+	    xFECRxDescriptors[ ux ].length = configFEC_BUFFER_SIZE;

+	    xFECRxDescriptors[ ux ].data = pcBufPointer;

+	    pcBufPointer += configFEC_BUFFER_SIZE;

+	}

+

+	/* Set the wrap bit in the last descriptors to form a ring. */

+	xFECTxDescriptors[ configNUM_FEC_TX_BUFFERS - 1 ].status |= TX_BD_W;

+	xFECRxDescriptors[ configNUM_FEC_RX_BUFFERS - 1 ].status |= RX_BD_W;

+

+	uxNextRxBuffer = 0;

+	uxNextTxBuffer = 0;

+}

+/*-----------------------------------------------------------*/

+

+__declspec(interrupt:0) void vFECISRHandler( void )

+{

+unsigned portLONG ulEvent;

+portBASE_TYPE xHighPriorityTaskWoken = pdFALSE;

+   

+	ulEvent = MCF_FEC_EIR & MCF_FEC_EIMR;

+	MCF_FEC_EIR = ulEvent;

+

+	if( ( ulEvent & MCF_FEC_EIR_RXB ) || ( ulEvent & MCF_FEC_EIR_RXF ) )

+	{

+		/* A packet has been received.  Wake the handler task. */

+		xSemaphoreGiveFromISR( xFecSemaphore, &xHighPriorityTaskWoken );

+	}

+

+	if (ulEvent & ( MCF_FEC_EIR_UN | MCF_FEC_EIR_RL | MCF_FEC_EIR_LC | MCF_FEC_EIR_EBERR | MCF_FEC_EIR_BABT | MCF_FEC_EIR_BABR | MCF_FEC_EIR_HBERR ) )

+	{

+		/* Sledge hammer error handling. */

+		prvInitialiseFECBuffers();

+		MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;

+	}

+

+	portEND_SWITCHING_ISR( xHighPriorityTaskWoken );

+}

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235.h
new file mode 100644
index 00000000..5a69a6d5
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235.h
@@ -0,0 +1,86 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_H__

+#define __MCF52235_H__

+

+//#include "common.h"

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+

+typedef unsigned char           uint8;   /*  8 bits */

+typedef unsigned short int      uint16;  /* 16 bits */

+typedef unsigned long int       uint32;  /* 32 bits */

+

+typedef signed char             int8;    /*  8 bits */

+typedef signed short int        int16;   /* 16 bits */

+typedef signed long int         int32;   /* 32 bits */

+

+typedef volatile uint8          vuint8;  /*  8 bits */

+typedef volatile uint16         vuint16; /* 16 bits */

+typedef volatile uint32         vuint32; /* 32 bits */

+

+#ifdef THESE_ARE_CODEWARRIOR_DEFINITIONS

+#pragma define_section system ".system" far_absolute RW

+

+/***

+ * MCF52235 Derivative Memory map definitions from linker command files:

+ * __IPSBAR, __RAMBAR, __RAMBAR_SIZE, __FLASHBAR, __FLASHBAR_SIZE linker

+ * symbols must be defined in the linker command file.

+ */

+

+	extern __declspec(system)  uint8 __IPSBAR[];

+	extern __declspec(system)  uint8 __RAMBAR[];

+	extern __declspec(system)  uint8 __RAMBAR_SIZE[];

+	extern __declspec(system)  uint8 __FLASHBAR[];

+	extern __declspec(system)  uint8 __FLASHBAR_SIZE[];

+#endif

+

+#define __IPSBAR ( ( uint8 * ) 0x40000000 )

+#define __RAMBAR ( ( uint8 * ) 0x20000000 )

+

+#define IPSBAR_ADDRESS   (uint32)__IPSBAR

+#define RAMBAR_ADDRESS   (uint32)__RAMBAR

+#define RAMBAR_SIZE      (uint32)__RAMBAR_SIZE

+#define FLASHBAR_ADDRESS (uint32)__FLASHBAR

+#define FLASHBAR_SIZE    (uint32)__FLASHBAR_SIZE

+

+

+#include "MCF52235_SCM.h"

+#include "MCF52235_DMA.h"

+#include "MCF52235_UART.h"

+#include "MCF52235_I2C.h"

+#include "MCF52235_QSPI.h"

+#include "MCF52235_RTC.h"

+#include "MCF52235_DTIM.h"

+#include "MCF52235_INTC.h"

+#include "MCF52235_GIACR.h"

+#include "MCF52235_FEC.h"

+#include "MCF52235_GPIO.h"

+#include "MCF52235_PAD.h"

+#include "MCF52235_RCM.h"

+#include "MCF52235_CCM.h"

+#include "MCF52235_PMM.h"

+#include "MCF52235_CLOCK.h"

+#include "MCF52235_EPORT.h"

+#include "MCF52235_PIT.h"

+#include "MCF52235_ADC.h"

+#include "MCF52235_GPTA.h"

+#include "MCF52235_PWM.h"

+#include "MCF52235_FlexCAN.h"

+#include "MCF52235_CFM.h"

+#include "MCF52235_EPHY.h"

+#include "MCF52235_RNGA.h"

+

+#ifdef __cplusplus

+}

+#endif

+

+

+#endif /* __MCF52235_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_ADC.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_ADC.h
new file mode 100644
index 00000000..3251867a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_ADC.h
@@ -0,0 +1,193 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_ADC_H__

+#define __MCF52235_ADC_H__

+

+

+/*********************************************************************

+*

+* Analog-to-Digital Converter (ADC)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_ADC_CTRL1                        (*(vuint16*)(&__IPSBAR[0x190000]))

+#define MCF_ADC_CTRL2                        (*(vuint16*)(&__IPSBAR[0x190002]))

+#define MCF_ADC_ADZCC                        (*(vuint16*)(&__IPSBAR[0x190004]))

+#define MCF_ADC_ADLST1                       (*(vuint16*)(&__IPSBAR[0x190006]))

+#define MCF_ADC_ADLST2                       (*(vuint16*)(&__IPSBAR[0x190008]))

+#define MCF_ADC_ADSDIS                       (*(vuint16*)(&__IPSBAR[0x19000A]))

+#define MCF_ADC_ADSTAT                       (*(vuint16*)(&__IPSBAR[0x19000C]))

+#define MCF_ADC_ADLSTAT                      (*(vuint16*)(&__IPSBAR[0x19000E]))

+#define MCF_ADC_ADZCSTAT                     (*(vuint16*)(&__IPSBAR[0x190010]))

+#define MCF_ADC_ADRSLT0                      (*(vuint16*)(&__IPSBAR[0x190012]))

+#define MCF_ADC_ADRSLT1                      (*(vuint16*)(&__IPSBAR[0x190014]))

+#define MCF_ADC_ADRSLT2                      (*(vuint16*)(&__IPSBAR[0x190016]))

+#define MCF_ADC_ADRSLT3                      (*(vuint16*)(&__IPSBAR[0x190018]))

+#define MCF_ADC_ADRSLT4                      (*(vuint16*)(&__IPSBAR[0x19001A]))

+#define MCF_ADC_ADRSLT5                      (*(vuint16*)(&__IPSBAR[0x19001C]))

+#define MCF_ADC_ADRSLT6                      (*(vuint16*)(&__IPSBAR[0x19001E]))

+#define MCF_ADC_ADRSLT7                      (*(vuint16*)(&__IPSBAR[0x190020]))

+#define MCF_ADC_ADLLMT0                      (*(vuint16*)(&__IPSBAR[0x190022]))

+#define MCF_ADC_ADLLMT1                      (*(vuint16*)(&__IPSBAR[0x190024]))

+#define MCF_ADC_ADLLMT2                      (*(vuint16*)(&__IPSBAR[0x190026]))

+#define MCF_ADC_ADLLMT3                      (*(vuint16*)(&__IPSBAR[0x190028]))

+#define MCF_ADC_ADLLMT4                      (*(vuint16*)(&__IPSBAR[0x19002A]))

+#define MCF_ADC_ADLLMT5                      (*(vuint16*)(&__IPSBAR[0x19002C]))

+#define MCF_ADC_ADLLMT6                      (*(vuint16*)(&__IPSBAR[0x19002E]))

+#define MCF_ADC_ADLLMT7                      (*(vuint16*)(&__IPSBAR[0x190030]))

+#define MCF_ADC_ADHLMT0                      (*(vuint16*)(&__IPSBAR[0x190032]))

+#define MCF_ADC_ADHLMT1                      (*(vuint16*)(&__IPSBAR[0x190034]))

+#define MCF_ADC_ADHLMT2                      (*(vuint16*)(&__IPSBAR[0x190036]))

+#define MCF_ADC_ADHLMT3                      (*(vuint16*)(&__IPSBAR[0x190038]))

+#define MCF_ADC_ADHLMT4                      (*(vuint16*)(&__IPSBAR[0x19003A]))

+#define MCF_ADC_ADHLMT5                      (*(vuint16*)(&__IPSBAR[0x19003C]))

+#define MCF_ADC_ADHLMT6                      (*(vuint16*)(&__IPSBAR[0x19003E]))

+#define MCF_ADC_ADHLMT7                      (*(vuint16*)(&__IPSBAR[0x190040]))

+#define MCF_ADC_ADOFS0                       (*(vuint16*)(&__IPSBAR[0x190042]))

+#define MCF_ADC_ADOFS1                       (*(vuint16*)(&__IPSBAR[0x190044]))

+#define MCF_ADC_ADOFS2                       (*(vuint16*)(&__IPSBAR[0x190046]))

+#define MCF_ADC_ADOFS3                       (*(vuint16*)(&__IPSBAR[0x190048]))

+#define MCF_ADC_ADOFS4                       (*(vuint16*)(&__IPSBAR[0x19004A]))

+#define MCF_ADC_ADOFS5                       (*(vuint16*)(&__IPSBAR[0x19004C]))

+#define MCF_ADC_ADOFS6                       (*(vuint16*)(&__IPSBAR[0x19004E]))

+#define MCF_ADC_ADOFS7                       (*(vuint16*)(&__IPSBAR[0x190050]))

+#define MCF_ADC_POWER                        (*(vuint16*)(&__IPSBAR[0x190052]))

+#define MCF_ADC_CAL                          (*(vuint16*)(&__IPSBAR[0x190054]))

+#define MCF_ADC_ADRSLT(x)                    (*(vuint16*)(&__IPSBAR[0x190012 + ((x)*0x2)]))

+#define MCF_ADC_ADLLMT(x)                    (*(vuint16*)(&__IPSBAR[0x190022 + ((x)*0x2)]))

+#define MCF_ADC_ADHLMT(x)                    (*(vuint16*)(&__IPSBAR[0x190032 + ((x)*0x2)]))

+#define MCF_ADC_ADOFS(x)                     (*(vuint16*)(&__IPSBAR[0x190042 + ((x)*0x2)]))

+

+

+/* Bit definitions and macros for MCF_ADC_CTRL1 */

+#define MCF_ADC_CTRL1_SMODE(x)               (((x)&0x7)<<0)

+#define MCF_ADC_CTRL1_CHNCFG(x)              (((x)&0xF)<<0x4)

+#define MCF_ADC_CTRL1_HLMTIE                 (0x100)

+#define MCF_ADC_CTRL1_LLMTIE                 (0x200)

+#define MCF_ADC_CTRL1_ZCIE                   (0x400)

+#define MCF_ADC_CTRL1_EOSIE0                 (0x800)

+#define MCF_ADC_CTRL1_SYNC0                  (0x1000)

+#define MCF_ADC_CTRL1_START0                 (0x2000)

+#define MCF_ADC_CTRL1_STOP0                  (0x4000)

+

+/* Bit definitions and macros for MCF_ADC_CTRL2 */

+#define MCF_ADC_CTRL2_DIV(x)                 (((x)&0x1F)<<0)

+#define MCF_ADC_CTRL2_SIMULT                 (0x20)

+#define MCF_ADC_CTRL2_EOSIE1                 (0x800)

+#define MCF_ADC_CTRL2_SYNC1                  (0x1000)

+#define MCF_ADC_CTRL2_START1                 (0x2000)

+#define MCF_ADC_CTRL2_STOP1                  (0x4000)

+

+/* Bit definitions and macros for MCF_ADC_ADZCC */

+#define MCF_ADC_ADZCC_ZCE0(x)                (((x)&0x3)<<0)

+#define MCF_ADC_ADZCC_ZCE1(x)                (((x)&0x3)<<0x2)

+#define MCF_ADC_ADZCC_ZCE2(x)                (((x)&0x3)<<0x4)

+#define MCF_ADC_ADZCC_ZCE3(x)                (((x)&0x3)<<0x6)

+#define MCF_ADC_ADZCC_ZCE4(x)                (((x)&0x3)<<0x8)

+#define MCF_ADC_ADZCC_ZCE5(x)                (((x)&0x3)<<0xA)

+#define MCF_ADC_ADZCC_ZCE6(x)                (((x)&0x3)<<0xC)

+#define MCF_ADC_ADZCC_ZCE7(x)                (((x)&0x3)<<0xE)

+

+/* Bit definitions and macros for MCF_ADC_ADLST1 */

+#define MCF_ADC_ADLST1_SAMPLE0(x)            (((x)&0x7)<<0)

+#define MCF_ADC_ADLST1_SAMPLE1(x)            (((x)&0x7)<<0x4)

+#define MCF_ADC_ADLST1_SAMPLE2(x)            (((x)&0x7)<<0x8)

+#define MCF_ADC_ADLST1_SAMPLE3(x)            (((x)&0x7)<<0xC)

+

+/* Bit definitions and macros for MCF_ADC_ADLST2 */

+#define MCF_ADC_ADLST2_SAMPLE4(x)            (((x)&0x7)<<0)

+#define MCF_ADC_ADLST2_SAMPLE5(x)            (((x)&0x7)<<0x4)

+#define MCF_ADC_ADLST2_SAMPLE6(x)            (((x)&0x7)<<0x8)

+#define MCF_ADC_ADLST2_SAMPLE7(x)            (((x)&0x7)<<0xC)

+

+/* Bit definitions and macros for MCF_ADC_ADSDIS */

+#define MCF_ADC_ADSDIS_DS0                   (0x1)

+#define MCF_ADC_ADSDIS_DS1                   (0x2)

+#define MCF_ADC_ADSDIS_DS2                   (0x4)

+#define MCF_ADC_ADSDIS_DS3                   (0x8)

+#define MCF_ADC_ADSDIS_DS4                   (0x10)

+#define MCF_ADC_ADSDIS_DS5                   (0x20)

+#define MCF_ADC_ADSDIS_DS6                   (0x40)

+#define MCF_ADC_ADSDIS_DS7                   (0x80)

+

+/* Bit definitions and macros for MCF_ADC_ADSTAT */

+#define MCF_ADC_ADSTAT_RDY0                  (0x1)

+#define MCF_ADC_ADSTAT_RDY1                  (0x2)

+#define MCF_ADC_ADSTAT_RDY2                  (0x4)

+#define MCF_ADC_ADSTAT_RDY3                  (0x8)

+#define MCF_ADC_ADSTAT_RDY4                  (0x10)

+#define MCF_ADC_ADSTAT_RDY5                  (0x20)

+#define MCF_ADC_ADSTAT_RDY6                  (0x40)

+#define MCF_ADC_ADSTAT_RDY7                  (0x80)

+#define MCF_ADC_ADSTAT_HLMTI                 (0x100)

+#define MCF_ADC_ADSTAT_LLMTI                 (0x200)

+#define MCF_ADC_ADSTAT_ZCI                   (0x400)

+#define MCF_ADC_ADSTAT_EOSI0                 (0x800)

+#define MCF_ADC_ADSTAT_EOSI1                 (0x1000)

+#define MCF_ADC_ADSTAT_CIP1                  (0x4000)

+#define MCF_ADC_ADSTAT_CIP0                  (0x8000)

+

+/* Bit definitions and macros for MCF_ADC_ADLSTAT */

+#define MCF_ADC_ADLSTAT_LLS0                 (0x1)

+#define MCF_ADC_ADLSTAT_LLS1                 (0x2)

+#define MCF_ADC_ADLSTAT_LLS2                 (0x4)

+#define MCF_ADC_ADLSTAT_LLS3                 (0x8)

+#define MCF_ADC_ADLSTAT_LLS4                 (0x10)

+#define MCF_ADC_ADLSTAT_LLS5                 (0x20)

+#define MCF_ADC_ADLSTAT_LLS6                 (0x40)

+#define MCF_ADC_ADLSTAT_LLS7                 (0x80)

+#define MCF_ADC_ADLSTAT_HLS0                 (0x100)

+#define MCF_ADC_ADLSTAT_HLS1                 (0x200)

+#define MCF_ADC_ADLSTAT_HLS2                 (0x400)

+#define MCF_ADC_ADLSTAT_HLS3                 (0x800)

+#define MCF_ADC_ADLSTAT_HLS4                 (0x1000)

+#define MCF_ADC_ADLSTAT_HLS5                 (0x2000)

+#define MCF_ADC_ADLSTAT_HLS6                 (0x4000)

+#define MCF_ADC_ADLSTAT_HLS7                 (0x8000)

+

+/* Bit definitions and macros for MCF_ADC_ADZCSTAT */

+#define MCF_ADC_ADZCSTAT_ZCS0                (0x1)

+#define MCF_ADC_ADZCSTAT_ZCS1                (0x2)

+#define MCF_ADC_ADZCSTAT_ZCS2                (0x4)

+#define MCF_ADC_ADZCSTAT_ZCS3                (0x8)

+#define MCF_ADC_ADZCSTAT_ZCS4                (0x10)

+#define MCF_ADC_ADZCSTAT_ZCS5                (0x20)

+#define MCF_ADC_ADZCSTAT_ZCS6                (0x40)

+#define MCF_ADC_ADZCSTAT_ZCS7                (0x80)

+

+/* Bit definitions and macros for MCF_ADC_ADRSLT */

+#define MCF_ADC_ADRSLT_RSLT(x)               (((x)&0xFFF)<<0x3)

+#define MCF_ADC_ADRSLT_SEXT                  (0x8000)

+

+/* Bit definitions and macros for MCF_ADC_ADLLMT */

+#define MCF_ADC_ADLLMT_LLMT(x)               (((x)&0xFFF)<<0x3)

+

+/* Bit definitions and macros for MCF_ADC_ADHLMT */

+#define MCF_ADC_ADHLMT_HLMT(x)               (((x)&0xFFF)<<0x3)

+

+/* Bit definitions and macros for MCF_ADC_ADOFS */

+#define MCF_ADC_ADOFS_OFFSET(x)              (((x)&0xFFF)<<0x3)

+

+/* Bit definitions and macros for MCF_ADC_POWER */

+#define MCF_ADC_POWER_PD0                    (0x1)

+#define MCF_ADC_POWER_PD1                    (0x2)

+#define MCF_ADC_POWER_PD2                    (0x4)

+#define MCF_ADC_POWER_APD                    (0x8)

+#define MCF_ADC_POWER_PUDELAY(x)             (((x)&0x3F)<<0x4)

+#define MCF_ADC_POWER_PSTS0                  (0x400)

+#define MCF_ADC_POWER_PSTS1                  (0x800)

+#define MCF_ADC_POWER_PSTS2                  (0x1000)

+#define MCF_ADC_POWER_ASB                    (0x8000)

+

+/* Bit definitions and macros for MCF_ADC_CAL */

+#define MCF_ADC_CAL_SEL_VREFL                (0x4000)

+#define MCF_ADC_CAL_SEL_VREFH                (0x8000)

+

+

+#endif /* __MCF52235_ADC_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CCM.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CCM.h
new file mode 100644
index 00000000..5fe3517c
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CCM.h
@@ -0,0 +1,47 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_CCM_H__

+#define __MCF52235_CCM_H__

+

+

+/*********************************************************************

+*

+* Chip Configuration Module (CCM)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_CCM_CCR                          (*(vuint16*)(&__IPSBAR[0x110004]))

+#define MCF_CCM_RCON                         (*(vuint16*)(&__IPSBAR[0x110008]))

+#define MCF_CCM_CIR                          (*(vuint16*)(&__IPSBAR[0x11000A]))

+

+

+/* Bit definitions and macros for MCF_CCM_CCR */

+#define MCF_CCM_CCR_BMT(x)                   (((x)&0x7)<<0)

+#define MCF_CCM_CCR_BMT_65536                (0)

+#define MCF_CCM_CCR_BMT_32768                (0x1)

+#define MCF_CCM_CCR_BMT_16384                (0x2)

+#define MCF_CCM_CCR_BMT_8192                 (0x3)

+#define MCF_CCM_CCR_BMT_4096                 (0x4)

+#define MCF_CCM_CCR_BMT_2048                 (0x5)

+#define MCF_CCM_CCR_BMT_1024                 (0x6)

+#define MCF_CCM_CCR_BMT_512                  (0x7)

+#define MCF_CCM_CCR_BME                      (0x8)

+#define MCF_CCM_CCR_PSTEN                    (0x20)

+#define MCF_CCM_CCR_SZEN                     (0x40)

+

+/* Bit definitions and macros for MCF_CCM_RCON */

+#define MCF_CCM_RCON_MODE                    (0x1)

+#define MCF_CCM_RCON_RLOAD                   (0x20)

+

+/* Bit definitions and macros for MCF_CCM_CIR */

+#define MCF_CCM_CIR_PRN(x)                   (((x)&0x3F)<<0)

+#define MCF_CCM_CIR_PIN(x)                   (((x)&0x3FF)<<0x6)

+

+

+#endif /* __MCF52235_CCM_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CFM.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CFM.h
new file mode 100644
index 00000000..c8619f53
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CFM.h
@@ -0,0 +1,76 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_CFM_H__

+#define __MCF52235_CFM_H__

+

+

+/*********************************************************************

+*

+* ColdFire Flash Module (CFM)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_CFM_CFMMCR                       (*(vuint16*)(&__IPSBAR[0x1D0000]))

+#define MCF_CFM_CFMCLKD                      (*(vuint8 *)(&__IPSBAR[0x1D0002]))

+#define MCF_CFM_CFMSEC                       (*(vuint32*)(&__IPSBAR[0x1D0008]))

+#define MCF_CFM_CFMPROT                      (*(vuint32*)(&__IPSBAR[0x1D0010]))

+#define MCF_CFM_CFMSACC                      (*(vuint32*)(&__IPSBAR[0x1D0014]))

+#define MCF_CFM_CFMDACC                      (*(vuint32*)(&__IPSBAR[0x1D0018]))

+#define MCF_CFM_CFMUSTAT                     (*(vuint8 *)(&__IPSBAR[0x1D0020]))

+#define MCF_CFM_CFMCMD                       (*(vuint8 *)(&__IPSBAR[0x1D0024]))

+#define MCF_CFM_CFMCLKSEL                    (*(vuint16*)(&__IPSBAR[0x1D004A]))

+

+

+/* Bit definitions and macros for MCF_CFM_CFMMCR */

+#define MCF_CFM_CFMMCR_KEYACC                (0x20)

+#define MCF_CFM_CFMMCR_CCIE                  (0x40)

+#define MCF_CFM_CFMMCR_CBEIE                 (0x80)

+#define MCF_CFM_CFMMCR_AEIE                  (0x100)

+#define MCF_CFM_CFMMCR_PVIE                  (0x200)

+#define MCF_CFM_CFMMCR_LOCK                  (0x400)

+

+/* Bit definitions and macros for MCF_CFM_CFMCLKD */

+#define MCF_CFM_CFMCLKD_DIV(x)               (((x)&0x3F)<<0)

+#define MCF_CFM_CFMCLKD_PRDIV8               (0x40)

+#define MCF_CFM_CFMCLKD_DIVLD                (0x80)

+

+/* Bit definitions and macros for MCF_CFM_CFMSEC */

+#define MCF_CFM_CFMSEC_SEC(x)                (((x)&0xFFFF)<<0)

+#define MCF_CFM_CFMSEC_SECSTAT               (0x40000000)

+#define MCF_CFM_CFMSEC_KEYEN                 (0x80000000)

+

+/* Bit definitions and macros for MCF_CFM_CFMPROT */

+#define MCF_CFM_CFMPROT_PROTECT(x)           (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_CFM_CFMSACC */

+#define MCF_CFM_CFMSACC_SUPV(x)              (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_CFM_CFMDACC */

+#define MCF_CFM_CFMDACC_DACC(x)              (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_CFM_CFMUSTAT */

+#define MCF_CFM_CFMUSTAT_BLANK               (0x4)

+#define MCF_CFM_CFMUSTAT_ACCERR              (0x10)

+#define MCF_CFM_CFMUSTAT_PVIOL               (0x20)

+#define MCF_CFM_CFMUSTAT_CCIF                (0x40)

+#define MCF_CFM_CFMUSTAT_CBEIF               (0x80)

+

+/* Bit definitions and macros for MCF_CFM_CFMCMD */

+#define MCF_CFM_CFMCMD_CMD(x)                (((x)&0x7F)<<0)

+#define MCF_CFM_CFMCMD_BLANK_CHECK           (0x5)

+#define MCF_CFM_CFMCMD_PAGE_ERASE_VERIFY     (0x6)

+#define MCF_CFM_CFMCMD_WORD_PROGRAM          (0x20)

+#define MCF_CFM_CFMCMD_PAGE_ERASE            (0x40)

+#define MCF_CFM_CFMCMD_MASS_ERASE            (0x41)

+

+/* Bit definitions and macros for MCF_CFM_CFMCLKSEL */

+#define MCF_CFM_CFMCLKSEL_CLKSEL(x)          (((x)&0x3)<<0)

+

+

+#endif /* __MCF52235_CFM_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CLOCK.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CLOCK.h
new file mode 100644
index 00000000..21ef560e
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_CLOCK.h
@@ -0,0 +1,54 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_CLOCK_H__

+#define __MCF52235_CLOCK_H__

+

+

+/*********************************************************************

+*

+* Clock Module (CLOCK)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_CLOCK_SYNCR                      (*(vuint16*)(&__IPSBAR[0x120000]))

+#define MCF_CLOCK_SYNSR                      (*(vuint8 *)(&__IPSBAR[0x120002]))

+#define MCF_CLOCK_LPCR                       (*(vuint8 *)(&__IPSBAR[0x120007]))

+#define MCF_CLOCK_CCHR                       (*(vuint8 *)(&__IPSBAR[0x120008]))

+#define MCF_CLOCK_RTCDR                      (*(vuint32*)(&__IPSBAR[0x12000C]))

+

+

+/* Bit definitions and macros for MCF_CLOCK_SYNCR */

+#define MCF_CLOCK_SYNCR_PLLEN                (0x1)

+#define MCF_CLOCK_SYNCR_PLLMODE              (0x2)

+#define MCF_CLOCK_SYNCR_CLKSRC               (0x4)

+#define MCF_CLOCK_SYNCR_FWKUP                (0x20)

+#define MCF_CLOCK_SYNCR_DISCLK               (0x40)

+#define MCF_CLOCK_SYNCR_LOCEN                (0x80)

+#define MCF_CLOCK_SYNCR_RFD(x)               (((x)&0x7)<<0x8)

+#define MCF_CLOCK_SYNCR_LOCRE                (0x800)

+#define MCF_CLOCK_SYNCR_MFD(x)               (((x)&0x7)<<0xC)

+#define MCF_CLOCK_SYNCR_LOLRE                (0x8000)

+

+/* Bit definitions and macros for MCF_CLOCK_SYNSR */

+#define MCF_CLOCK_SYNSR_LOCS                 (0x4)

+#define MCF_CLOCK_SYNSR_LOCK                 (0x8)

+#define MCF_CLOCK_SYNSR_LOCKS                (0x10)

+#define MCF_CLOCK_SYNSR_EXTOSC               (0x80)

+

+/* Bit definitions and macros for MCF_CLOCK_LPCR */

+#define MCF_CLOCK_LPCR_LPD(x)                (((x)&0xF)<<0)

+

+/* Bit definitions and macros for MCF_CLOCK_CCHR */

+#define MCF_CLOCK_CCHR_CCHR(x)               (((x)&0x7)<<0)

+

+/* Bit definitions and macros for MCF_CLOCK_RTCDR */

+#define MCF_CLOCK_RTCDR_RTCDF(x)             (((x)&0xFFFFFFFF)<<0)

+

+

+#endif /* __MCF52235_CLOCK_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_DMA.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_DMA.h
new file mode 100644
index 00000000..8aac8ce1
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_DMA.h
@@ -0,0 +1,142 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_DMA_H__

+#define __MCF52235_DMA_H__

+

+

+/*********************************************************************

+*

+* DMA Controller (DMA)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_DMA0_SAR                         (*(vuint32*)(&__IPSBAR[0x100]))

+#define MCF_DMA0_DAR                         (*(vuint32*)(&__IPSBAR[0x104]))

+#define MCF_DMA0_DSR                         (*(vuint8 *)(&__IPSBAR[0x108]))

+#define MCF_DMA0_BCR                         (*(vuint32*)(&__IPSBAR[0x108]))

+#define MCF_DMA0_DCR                         (*(vuint32*)(&__IPSBAR[0x10C]))

+

+#define MCF_DMA1_SAR                         (*(vuint32*)(&__IPSBAR[0x110]))

+#define MCF_DMA1_DAR                         (*(vuint32*)(&__IPSBAR[0x114]))

+#define MCF_DMA1_DSR                         (*(vuint8 *)(&__IPSBAR[0x118]))

+#define MCF_DMA1_BCR                         (*(vuint32*)(&__IPSBAR[0x118]))

+#define MCF_DMA1_DCR                         (*(vuint32*)(&__IPSBAR[0x11C]))

+

+#define MCF_DMA2_SAR                         (*(vuint32*)(&__IPSBAR[0x120]))

+#define MCF_DMA2_DAR                         (*(vuint32*)(&__IPSBAR[0x124]))

+#define MCF_DMA2_DSR                         (*(vuint8 *)(&__IPSBAR[0x128]))

+#define MCF_DMA2_BCR                         (*(vuint32*)(&__IPSBAR[0x128]))

+#define MCF_DMA2_DCR                         (*(vuint32*)(&__IPSBAR[0x12C]))

+

+#define MCF_DMA3_SAR                         (*(vuint32*)(&__IPSBAR[0x130]))

+#define MCF_DMA3_DAR                         (*(vuint32*)(&__IPSBAR[0x134]))

+#define MCF_DMA3_DSR                         (*(vuint8 *)(&__IPSBAR[0x138]))

+#define MCF_DMA3_BCR                         (*(vuint32*)(&__IPSBAR[0x138]))

+#define MCF_DMA3_DCR                         (*(vuint32*)(&__IPSBAR[0x13C]))

+

+#define MCF_DMA_SAR(x)                       (*(vuint32*)(&__IPSBAR[0x100 + ((x)*0x10)]))

+#define MCF_DMA_DAR(x)                       (*(vuint32*)(&__IPSBAR[0x104 + ((x)*0x10)]))

+#define MCF_DMA_DSR(x)                       (*(vuint8 *)(&__IPSBAR[0x108 + ((x)*0x10)]))

+#define MCF_DMA_BCR(x)                       (*(vuint32*)(&__IPSBAR[0x108 + ((x)*0x10)]))

+#define MCF_DMA_DCR(x)                       (*(vuint32*)(&__IPSBAR[0x10C + ((x)*0x10)]))

+

+

+/* Bit definitions and macros for MCF_DMA_SAR */

+#define MCF_DMA_SAR_SAR(x)                   (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_DMA_DAR */

+#define MCF_DMA_DAR_DAR(x)                   (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_DMA_DSR */

+#define MCF_DMA_DSR_DONE                     (0x1)

+#define MCF_DMA_DSR_BSY                      (0x2)

+#define MCF_DMA_DSR_REQ                      (0x4)

+#define MCF_DMA_DSR_BED                      (0x10)

+#define MCF_DMA_DSR_BES                      (0x20)

+#define MCF_DMA_DSR_CE                       (0x40)

+

+/* Bit definitions and macros for MCF_DMA_BCR */

+#define MCF_DMA_BCR_BCR(x)                   (((x)&0xFFFFFF)<<0)

+#define MCF_DMA_BCR_DSR(x)                   (((x)&0xFF)<<0x18)

+

+/* Bit definitions and macros for MCF_DMA_DCR */

+#define MCF_DMA_DCR_LCH2(x)                  (((x)&0x3)<<0)

+#define MCF_DMA_DCR_LCH2_CH0                 (0)

+#define MCF_DMA_DCR_LCH2_CH1                 (0x1)

+#define MCF_DMA_DCR_LCH2_CH2                 (0x2)

+#define MCF_DMA_DCR_LCH2_CH3                 (0x3)

+#define MCF_DMA_DCR_LCH1(x)                  (((x)&0x3)<<0x2)

+#define MCF_DMA_DCR_LCH1_CH0                 (0)

+#define MCF_DMA_DCR_LCH1_CH1                 (0x1)

+#define MCF_DMA_DCR_LCH1_CH2                 (0x2)

+#define MCF_DMA_DCR_LCH1_CH3                 (0x3)

+#define MCF_DMA_DCR_LINKCC(x)                (((x)&0x3)<<0x4)

+#define MCF_DMA_DCR_D_REQ                    (0x80)

+#define MCF_DMA_DCR_DMOD(x)                  (((x)&0xF)<<0x8)

+#define MCF_DMA_DCR_DMOD_DIS                 (0)

+#define MCF_DMA_DCR_DMOD_16                  (0x1)

+#define MCF_DMA_DCR_DMOD_32                  (0x2)

+#define MCF_DMA_DCR_DMOD_64                  (0x3)

+#define MCF_DMA_DCR_DMOD_128                 (0x4)

+#define MCF_DMA_DCR_DMOD_256                 (0x5)

+#define MCF_DMA_DCR_DMOD_512                 (0x6)

+#define MCF_DMA_DCR_DMOD_1K                  (0x7)

+#define MCF_DMA_DCR_DMOD_2K                  (0x8)

+#define MCF_DMA_DCR_DMOD_4K                  (0x9)

+#define MCF_DMA_DCR_DMOD_8K                  (0xA)

+#define MCF_DMA_DCR_DMOD_16K                 (0xB)

+#define MCF_DMA_DCR_DMOD_32K                 (0xC)

+#define MCF_DMA_DCR_DMOD_64K                 (0xD)

+#define MCF_DMA_DCR_DMOD_128K                (0xE)

+#define MCF_DMA_DCR_DMOD_256K                (0xF)

+#define MCF_DMA_DCR_SMOD(x)                  (((x)&0xF)<<0xC)

+#define MCF_DMA_DCR_SMOD_DIS                 (0)

+#define MCF_DMA_DCR_SMOD_16                  (0x1)

+#define MCF_DMA_DCR_SMOD_32                  (0x2)

+#define MCF_DMA_DCR_SMOD_64                  (0x3)

+#define MCF_DMA_DCR_SMOD_128                 (0x4)

+#define MCF_DMA_DCR_SMOD_256                 (0x5)

+#define MCF_DMA_DCR_SMOD_512                 (0x6)

+#define MCF_DMA_DCR_SMOD_1K                  (0x7)

+#define MCF_DMA_DCR_SMOD_2K                  (0x8)

+#define MCF_DMA_DCR_SMOD_4K                  (0x9)

+#define MCF_DMA_DCR_SMOD_8K                  (0xA)

+#define MCF_DMA_DCR_SMOD_16K                 (0xB)

+#define MCF_DMA_DCR_SMOD_32K                 (0xC)

+#define MCF_DMA_DCR_SMOD_64K                 (0xD)

+#define MCF_DMA_DCR_SMOD_128K                (0xE)

+#define MCF_DMA_DCR_SMOD_256K                (0xF)

+#define MCF_DMA_DCR_START                    (0x10000)

+#define MCF_DMA_DCR_DSIZE(x)                 (((x)&0x3)<<0x11)

+#define MCF_DMA_DCR_DSIZE_LONG               (0)

+#define MCF_DMA_DCR_DSIZE_BYTE               (0x1)

+#define MCF_DMA_DCR_DSIZE_WORD               (0x2)

+#define MCF_DMA_DCR_DSIZE_LINE               (0x3)

+#define MCF_DMA_DCR_DINC                     (0x80000)

+#define MCF_DMA_DCR_SSIZE(x)                 (((x)&0x3)<<0x14)

+#define MCF_DMA_DCR_SSIZE_LONG               (0)

+#define MCF_DMA_DCR_SSIZE_BYTE               (0x1)

+#define MCF_DMA_DCR_SSIZE_WORD               (0x2)

+#define MCF_DMA_DCR_SSIZE_LINE               (0x3)

+#define MCF_DMA_DCR_SINC                     (0x400000)

+#define MCF_DMA_DCR_BWC(x)                   (((x)&0x7)<<0x19)

+#define MCF_DMA_DCR_BWC_16K                  (0x1)

+#define MCF_DMA_DCR_BWC_32K                  (0x2)

+#define MCF_DMA_DCR_BWC_64K                  (0x3)

+#define MCF_DMA_DCR_BWC_128K                 (0x4)

+#define MCF_DMA_DCR_BWC_256K                 (0x5)

+#define MCF_DMA_DCR_BWC_512K                 (0x6)

+#define MCF_DMA_DCR_BWC_1024K                (0x7)

+#define MCF_DMA_DCR_AA                       (0x10000000)

+#define MCF_DMA_DCR_CS                       (0x20000000)

+#define MCF_DMA_DCR_EEXT                     (0x40000000)

+#define MCF_DMA_DCR_INT                      (0x80000000)

+

+

+#endif /* __MCF52235_DMA_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_DTIM.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_DTIM.h
new file mode 100644
index 00000000..75efae4a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_DTIM.h
@@ -0,0 +1,91 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_DTIM_H__

+#define __MCF52235_DTIM_H__

+

+

+/*********************************************************************

+*

+* DMA Timers (DTIM)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_DTIM0_DTMR                       (*(vuint16*)(&__IPSBAR[0x400]))

+#define MCF_DTIM0_DTXMR                      (*(vuint8 *)(&__IPSBAR[0x402]))

+#define MCF_DTIM0_DTER                       (*(vuint8 *)(&__IPSBAR[0x403]))

+#define MCF_DTIM0_DTRR                       (*(vuint32*)(&__IPSBAR[0x404]))

+#define MCF_DTIM0_DTCR                       (*(vuint32*)(&__IPSBAR[0x408]))

+#define MCF_DTIM0_DTCN                       (*(vuint32*)(&__IPSBAR[0x40C]))

+

+#define MCF_DTIM1_DTMR                       (*(vuint16*)(&__IPSBAR[0x440]))

+#define MCF_DTIM1_DTXMR                      (*(vuint8 *)(&__IPSBAR[0x442]))

+#define MCF_DTIM1_DTER                       (*(vuint8 *)(&__IPSBAR[0x443]))

+#define MCF_DTIM1_DTRR                       (*(vuint32*)(&__IPSBAR[0x444]))

+#define MCF_DTIM1_DTCR                       (*(vuint32*)(&__IPSBAR[0x448]))

+#define MCF_DTIM1_DTCN                       (*(vuint32*)(&__IPSBAR[0x44C]))

+

+#define MCF_DTIM2_DTMR                       (*(vuint16*)(&__IPSBAR[0x480]))

+#define MCF_DTIM2_DTXMR                      (*(vuint8 *)(&__IPSBAR[0x482]))

+#define MCF_DTIM2_DTER                       (*(vuint8 *)(&__IPSBAR[0x483]))

+#define MCF_DTIM2_DTRR                       (*(vuint32*)(&__IPSBAR[0x484]))

+#define MCF_DTIM2_DTCR                       (*(vuint32*)(&__IPSBAR[0x488]))

+#define MCF_DTIM2_DTCN                       (*(vuint32*)(&__IPSBAR[0x48C]))

+

+#define MCF_DTIM3_DTMR                       (*(vuint16*)(&__IPSBAR[0x4C0]))

+#define MCF_DTIM3_DTXMR                      (*(vuint8 *)(&__IPSBAR[0x4C2]))

+#define MCF_DTIM3_DTER                       (*(vuint8 *)(&__IPSBAR[0x4C3]))

+#define MCF_DTIM3_DTRR                       (*(vuint32*)(&__IPSBAR[0x4C4]))

+#define MCF_DTIM3_DTCR                       (*(vuint32*)(&__IPSBAR[0x4C8]))

+#define MCF_DTIM3_DTCN                       (*(vuint32*)(&__IPSBAR[0x4CC]))

+

+#define MCF_DTIM_DTMR(x)                     (*(vuint16*)(&__IPSBAR[0x400 + ((x)*0x40)]))

+#define MCF_DTIM_DTXMR(x)                    (*(vuint8 *)(&__IPSBAR[0x402 + ((x)*0x40)]))

+#define MCF_DTIM_DTER(x)                     (*(vuint8 *)(&__IPSBAR[0x403 + ((x)*0x40)]))

+#define MCF_DTIM_DTRR(x)                     (*(vuint32*)(&__IPSBAR[0x404 + ((x)*0x40)]))

+#define MCF_DTIM_DTCR(x)                     (*(vuint32*)(&__IPSBAR[0x408 + ((x)*0x40)]))

+#define MCF_DTIM_DTCN(x)                     (*(vuint32*)(&__IPSBAR[0x40C + ((x)*0x40)]))

+

+

+/* Bit definitions and macros for MCF_DTIM_DTMR */

+#define MCF_DTIM_DTMR_RST                    (0x1)

+#define MCF_DTIM_DTMR_CLK(x)                 (((x)&0x3)<<0x1)

+#define MCF_DTIM_DTMR_CLK_STOP               (0)

+#define MCF_DTIM_DTMR_CLK_DIV1               (0x2)

+#define MCF_DTIM_DTMR_CLK_DIV16              (0x4)

+#define MCF_DTIM_DTMR_CLK_DTIN               (0x6)

+#define MCF_DTIM_DTMR_FRR                    (0x8)

+#define MCF_DTIM_DTMR_ORRI                   (0x10)

+#define MCF_DTIM_DTMR_OM                     (0x20)

+#define MCF_DTIM_DTMR_CE(x)                  (((x)&0x3)<<0x6)

+#define MCF_DTIM_DTMR_CE_NONE                (0)

+#define MCF_DTIM_DTMR_CE_RISE                (0x40)

+#define MCF_DTIM_DTMR_CE_FALL                (0x80)

+#define MCF_DTIM_DTMR_CE_ANY                 (0xC0)

+#define MCF_DTIM_DTMR_PS(x)                  (((x)&0xFF)<<0x8)

+

+/* Bit definitions and macros for MCF_DTIM_DTXMR */

+#define MCF_DTIM_DTXMR_MODE16                (0x1)

+#define MCF_DTIM_DTXMR_HALTED                (0x40)

+#define MCF_DTIM_DTXMR_DMAEN                 (0x80)

+

+/* Bit definitions and macros for MCF_DTIM_DTER */

+#define MCF_DTIM_DTER_CAP                    (0x1)

+#define MCF_DTIM_DTER_REF                    (0x2)

+

+/* Bit definitions and macros for MCF_DTIM_DTRR */

+#define MCF_DTIM_DTRR_REF(x)                 (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_DTIM_DTCR */

+#define MCF_DTIM_DTCR_CAP(x)                 (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_DTIM_DTCN */

+#define MCF_DTIM_DTCN_CNT(x)                 (((x)&0xFFFFFFFF)<<0)

+

+

+#endif /* __MCF52235_DTIM_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_EPHY.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_EPHY.h
new file mode 100644
index 00000000..0ae0ec6d
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_EPHY.h
@@ -0,0 +1,42 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_EPHY_H__

+#define __MCF52235_EPHY_H__

+

+

+/*********************************************************************

+*

+* Ethernet Physical Transceiver (EPHY)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_EPHY_EPHYCTL0                    (*(vuint8 *)(&__IPSBAR[0x1E0000]))

+#define MCF_EPHY_EPHYCTL1                    (*(vuint8 *)(&__IPSBAR[0x1E0001]))

+#define MCF_EPHY_EPHYSR                      (*(vuint8 *)(&__IPSBAR[0x1E0002]))

+

+

+/* Bit definitions and macros for MCF_EPHY_EPHYCTL0 */

+#define MCF_EPHY_EPHYCTL0_EPHYIEN            (0x1)

+#define MCF_EPHY_EPHYCTL0_EPHYWAI            (0x4)

+#define MCF_EPHY_EPHYCTL0_LEDEN              (0x8)

+#define MCF_EPHY_EPHYCTL0_DIS10              (0x10)

+#define MCF_EPHY_EPHYCTL0_DIS100             (0x20)

+#define MCF_EPHY_EPHYCTL0_ANDIS              (0x40)

+#define MCF_EPHY_EPHYCTL0_EPHYEN             (0x80)

+

+/* Bit definitions and macros for MCF_EPHY_EPHYCTL1 */

+#define MCF_EPHY_EPHYCTL1_PHYADD(x)          (((x)&0x1F)<<0)

+

+/* Bit definitions and macros for MCF_EPHY_EPHYSR */

+#define MCF_EPHY_EPHYSR_EPHYIF               (0x1)

+#define MCF_EPHY_EPHYSR_10DIS                (0x10)

+#define MCF_EPHY_EPHYSR_100DIS               (0x20)

+

+

+#endif /* __MCF52235_EPHY_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_EPORT.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_EPORT.h
new file mode 100644
index 00000000..365466b5
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_EPORT.h
@@ -0,0 +1,220 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_EPORT_H__

+#define __MCF52235_EPORT_H__

+

+

+/*********************************************************************

+*

+* Edge Port Module (EPORT)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_EPORT0_EPPAR                     (*(vuint16*)(&__IPSBAR[0x130000]))

+#define MCF_EPORT0_EPDDR                     (*(vuint8 *)(&__IPSBAR[0x130002]))

+#define MCF_EPORT0_EPIER                     (*(vuint8 *)(&__IPSBAR[0x130003]))

+#define MCF_EPORT0_EPDR                      (*(vuint8 *)(&__IPSBAR[0x130004]))

+#define MCF_EPORT0_EPPDR                     (*(vuint8 *)(&__IPSBAR[0x130005]))

+#define MCF_EPORT0_EPFR                      (*(vuint8 *)(&__IPSBAR[0x130006]))

+

+#define MCF_EPORT1_EPPAR                     (*(vuint16*)(&__IPSBAR[0x140000]))

+#define MCF_EPORT1_EPDDR                     (*(vuint8 *)(&__IPSBAR[0x140002]))

+#define MCF_EPORT1_EPIER                     (*(vuint8 *)(&__IPSBAR[0x140003]))

+#define MCF_EPORT1_EPDR                      (*(vuint8 *)(&__IPSBAR[0x140004]))

+#define MCF_EPORT1_EPPDR                     (*(vuint8 *)(&__IPSBAR[0x140005]))

+#define MCF_EPORT1_EPFR                      (*(vuint8 *)(&__IPSBAR[0x140006]))

+

+#define MCF_EPORT_EPPAR(x)                   (*(vuint16*)(&__IPSBAR[0x130000 + ((x)*0x10000)]))

+#define MCF_EPORT_EPDDR(x)                   (*(vuint8 *)(&__IPSBAR[0x130002 + ((x)*0x10000)]))

+#define MCF_EPORT_EPIER(x)                   (*(vuint8 *)(&__IPSBAR[0x130003 + ((x)*0x10000)]))

+#define MCF_EPORT_EPDR(x)                    (*(vuint8 *)(&__IPSBAR[0x130004 + ((x)*0x10000)]))

+#define MCF_EPORT_EPPDR(x)                   (*(vuint8 *)(&__IPSBAR[0x130005 + ((x)*0x10000)]))

+#define MCF_EPORT_EPFR(x)                    (*(vuint8 *)(&__IPSBAR[0x130006 + ((x)*0x10000)]))

+

+

+/* Bit definitions and macros for MCF_EPORT_EPPAR */

+#define MCF_EPORT_EPPAR_EPPA1(x)             (((x)&0x3)<<0x2)

+#define MCF_EPORT_EPPAR_EPPA1_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA1_RISING         (0x4)

+#define MCF_EPORT_EPPAR_EPPA1_FALLING        (0x8)

+#define MCF_EPORT_EPPAR_EPPA1_BOTH           (0xC)

+#define MCF_EPORT_EPPAR_EPPA2(x)             (((x)&0x3)<<0x4)

+#define MCF_EPORT_EPPAR_EPPA2_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA2_RISING         (0x10)

+#define MCF_EPORT_EPPAR_EPPA2_FALLING        (0x20)

+#define MCF_EPORT_EPPAR_EPPA2_BOTH           (0x30)

+#define MCF_EPORT_EPPAR_EPPA3(x)             (((x)&0x3)<<0x6)

+#define MCF_EPORT_EPPAR_EPPA3_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA3_RISING         (0x40)

+#define MCF_EPORT_EPPAR_EPPA3_FALLING        (0x80)

+#define MCF_EPORT_EPPAR_EPPA3_BOTH           (0xC0)

+#define MCF_EPORT_EPPAR_EPPA4(x)             (((x)&0x3)<<0x8)

+#define MCF_EPORT_EPPAR_EPPA4_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA4_RISING         (0x100)

+#define MCF_EPORT_EPPAR_EPPA4_FALLING        (0x200)

+#define MCF_EPORT_EPPAR_EPPA4_BOTH           (0x300)

+#define MCF_EPORT_EPPAR_EPPA5(x)             (((x)&0x3)<<0xA)

+#define MCF_EPORT_EPPAR_EPPA5_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA5_RISING         (0x400)

+#define MCF_EPORT_EPPAR_EPPA5_FALLING        (0x800)

+#define MCF_EPORT_EPPAR_EPPA5_BOTH           (0xC00)

+#define MCF_EPORT_EPPAR_EPPA6(x)             (((x)&0x3)<<0xC)

+#define MCF_EPORT_EPPAR_EPPA6_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA6_RISING         (0x1000)

+#define MCF_EPORT_EPPAR_EPPA6_FALLING        (0x2000)

+#define MCF_EPORT_EPPAR_EPPA6_BOTH           (0x3000)

+#define MCF_EPORT_EPPAR_EPPA7(x)             (((x)&0x3)<<0xE)

+#define MCF_EPORT_EPPAR_EPPA7_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA7_RISING         (0x4000)

+#define MCF_EPORT_EPPAR_EPPA7_FALLING        (0x8000)

+#define MCF_EPORT_EPPAR_EPPA7_BOTH           (0xC000)

+#define MCF_EPORT_EPPAR_LEVEL                (0)

+#define MCF_EPORT_EPPAR_RISING               (0x1)

+#define MCF_EPORT_EPPAR_FALLING              (0x2)

+#define MCF_EPORT_EPPAR_BOTH                 (0x3)

+

+/* Bit definitions and macros for MCF_EPORT_EPDDR */

+#define MCF_EPORT_EPDDR_EPDD1                (0x2)

+#define MCF_EPORT_EPDDR_EPDD2                (0x4)

+#define MCF_EPORT_EPDDR_EPDD3                (0x8)

+#define MCF_EPORT_EPDDR_EPDD4                (0x10)

+#define MCF_EPORT_EPDDR_EPDD5                (0x20)

+#define MCF_EPORT_EPDDR_EPDD6                (0x40)

+#define MCF_EPORT_EPDDR_EPDD7                (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPIER */

+#define MCF_EPORT_EPIER_EPIE1                (0x2)

+#define MCF_EPORT_EPIER_EPIE2                (0x4)

+#define MCF_EPORT_EPIER_EPIE3                (0x8)

+#define MCF_EPORT_EPIER_EPIE4                (0x10)

+#define MCF_EPORT_EPIER_EPIE5                (0x20)

+#define MCF_EPORT_EPIER_EPIE6                (0x40)

+#define MCF_EPORT_EPIER_EPIE7                (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPDR */

+#define MCF_EPORT_EPDR_EPD1                  (0x2)

+#define MCF_EPORT_EPDR_EPD2                  (0x4)

+#define MCF_EPORT_EPDR_EPD3                  (0x8)

+#define MCF_EPORT_EPDR_EPD4                  (0x10)

+#define MCF_EPORT_EPDR_EPD5                  (0x20)

+#define MCF_EPORT_EPDR_EPD6                  (0x40)

+#define MCF_EPORT_EPDR_EPD7                  (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPPDR */

+#define MCF_EPORT_EPPDR_EPPD1                (0x2)

+#define MCF_EPORT_EPPDR_EPPD2                (0x4)

+#define MCF_EPORT_EPPDR_EPPD3                (0x8)

+#define MCF_EPORT_EPPDR_EPPD4                (0x10)

+#define MCF_EPORT_EPPDR_EPPD5                (0x20)

+#define MCF_EPORT_EPPDR_EPPD6                (0x40)

+#define MCF_EPORT_EPPDR_EPPD7                (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPFR */

+#define MCF_EPORT_EPFR_EPF1                  (0x2)

+#define MCF_EPORT_EPFR_EPF2                  (0x4)

+#define MCF_EPORT_EPFR_EPF3                  (0x8)

+#define MCF_EPORT_EPFR_EPF4                  (0x10)

+#define MCF_EPORT_EPFR_EPF5                  (0x20)

+#define MCF_EPORT_EPFR_EPF6                  (0x40)

+#define MCF_EPORT_EPFR_EPF7                  (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPPAR */

+#define MCF_EPORT_EPPAR_EPPA8(x)             (((x)&0x3)<<0)

+#define MCF_EPORT_EPPAR_EPPA8_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA8_RISING         (0x1)

+#define MCF_EPORT_EPPAR_EPPA8_FALLING        (0x2)

+#define MCF_EPORT_EPPAR_EPPA8_BOTH           (0x3)

+#define MCF_EPORT_EPPAR_EPPA9(x)             (((x)&0x3)<<0x2)

+#define MCF_EPORT_EPPAR_EPPA9_LEVEL          (0)

+#define MCF_EPORT_EPPAR_EPPA9_RISING         (0x4)

+#define MCF_EPORT_EPPAR_EPPA9_FALLING        (0x8)

+#define MCF_EPORT_EPPAR_EPPA9_BOTH           (0xC)

+#define MCF_EPORT_EPPAR_EPPA10(x)            (((x)&0x3)<<0x4)

+#define MCF_EPORT_EPPAR_EPPA10_LEVEL         (0)

+#define MCF_EPORT_EPPAR_EPPA10_RISING        (0x10)

+#define MCF_EPORT_EPPAR_EPPA10_FALLING       (0x20)

+#define MCF_EPORT_EPPAR_EPPA10_BOTH          (0x30)

+#define MCF_EPORT_EPPAR_EPPA11(x)            (((x)&0x3)<<0x6)

+#define MCF_EPORT_EPPAR_EPPA11_LEVEL         (0)

+#define MCF_EPORT_EPPAR_EPPA11_RISING        (0x40)

+#define MCF_EPORT_EPPAR_EPPA11_FALLING       (0x80)

+#define MCF_EPORT_EPPAR_EPPA11_BOTH          (0xC0)

+#define MCF_EPORT_EPPAR_EPPA12(x)            (((x)&0x3)<<0x8)

+#define MCF_EPORT_EPPAR_EPPA12_LEVEL         (0)

+#define MCF_EPORT_EPPAR_EPPA12_RISING        (0x100)

+#define MCF_EPORT_EPPAR_EPPA12_FALLING       (0x200)

+#define MCF_EPORT_EPPAR_EPPA12_BOTH          (0x300)

+#define MCF_EPORT_EPPAR_EPPA13(x)            (((x)&0x3)<<0xA)

+#define MCF_EPORT_EPPAR_EPPA13_LEVEL         (0)

+#define MCF_EPORT_EPPAR_EPPA13_RISING        (0x400)

+#define MCF_EPORT_EPPAR_EPPA13_FALLING       (0x800)

+#define MCF_EPORT_EPPAR_EPPA13_BOTH          (0xC00)

+#define MCF_EPORT_EPPAR_EPPA14(x)            (((x)&0x3)<<0xC)

+#define MCF_EPORT_EPPAR_EPPA14_LEVEL         (0)

+#define MCF_EPORT_EPPAR_EPPA14_RISING        (0x1000)

+#define MCF_EPORT_EPPAR_EPPA14_FALLING       (0x2000)

+#define MCF_EPORT_EPPAR_EPPA14_BOTH          (0x3000)

+#define MCF_EPORT_EPPAR_EPPA15(x)            (((x)&0x3)<<0xE)

+#define MCF_EPORT_EPPAR_EPPA15_LEVEL         (0)

+#define MCF_EPORT_EPPAR_EPPA15_RISING        (0x4000)

+#define MCF_EPORT_EPPAR_EPPA15_FALLING       (0x8000)

+#define MCF_EPORT_EPPAR_EPPA15_BOTH          (0xC000)

+

+/* Bit definitions and macros for MCF_EPORT_EPDDR */

+#define MCF_EPORT_EPDDR_EPDD8                (0x1)

+#define MCF_EPORT_EPDDR_EPDD9                (0x2)

+#define MCF_EPORT_EPDDR_EPDD10               (0x4)

+#define MCF_EPORT_EPDDR_EPDD11               (0x8)

+#define MCF_EPORT_EPDDR_EPDD12               (0x10)

+#define MCF_EPORT_EPDDR_EPDD13               (0x20)

+#define MCF_EPORT_EPDDR_EPDD14               (0x40)

+#define MCF_EPORT_EPDDR_EPDD15               (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPIER */

+#define MCF_EPORT_EPIER_EPIE8                (0x1)

+#define MCF_EPORT_EPIER_EPIE9                (0x2)

+#define MCF_EPORT_EPIER_EPIE10               (0x4)

+#define MCF_EPORT_EPIER_EPIE11               (0x8)

+#define MCF_EPORT_EPIER_EPIE12               (0x10)

+#define MCF_EPORT_EPIER_EPIE13               (0x20)

+#define MCF_EPORT_EPIER_EPIE14               (0x40)

+#define MCF_EPORT_EPIER_EPIE15               (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPDR */

+#define MCF_EPORT_EPDR_EPD8                  (0x1)

+#define MCF_EPORT_EPDR_EPD9                  (0x2)

+#define MCF_EPORT_EPDR_EPD10                 (0x4)

+#define MCF_EPORT_EPDR_EPD11                 (0x8)

+#define MCF_EPORT_EPDR_EPD12                 (0x10)

+#define MCF_EPORT_EPDR_EPD13                 (0x20)

+#define MCF_EPORT_EPDR_EPD14                 (0x40)

+#define MCF_EPORT_EPDR_EPD15                 (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPPDR */

+#define MCF_EPORT_EPPDR_EPPD8                (0x1)

+#define MCF_EPORT_EPPDR_EPPD9                (0x2)

+#define MCF_EPORT_EPPDR_EPPD10               (0x4)

+#define MCF_EPORT_EPPDR_EPPD11               (0x8)

+#define MCF_EPORT_EPPDR_EPPD12               (0x10)

+#define MCF_EPORT_EPPDR_EPPD13               (0x20)

+#define MCF_EPORT_EPPDR_EPPD14               (0x40)

+#define MCF_EPORT_EPPDR_EPPD15               (0x80)

+

+/* Bit definitions and macros for MCF_EPORT_EPFR */

+#define MCF_EPORT_EPFR_EPF8                  (0x1)

+#define MCF_EPORT_EPFR_EPF9                  (0x2)

+#define MCF_EPORT_EPFR_EPF10                 (0x4)

+#define MCF_EPORT_EPFR_EPF11                 (0x8)

+#define MCF_EPORT_EPFR_EPF12                 (0x10)

+#define MCF_EPORT_EPFR_EPF13                 (0x20)

+#define MCF_EPORT_EPFR_EPF14                 (0x40)

+#define MCF_EPORT_EPFR_EPF15                 (0x80)

+

+

+#endif /* __MCF52235_EPORT_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_FEC.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_FEC.h
new file mode 100644
index 00000000..68fa92c1
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_FEC.h
@@ -0,0 +1,385 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_FEC_H__

+#define __MCF52235_FEC_H__

+

+

+/*********************************************************************

+*

+* Fast Ethernet Controller(FEC)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_FEC_EIR                          (*(vuint32*)(&__IPSBAR[0x1004]))

+#define MCF_FEC_EIMR                         (*(vuint32*)(&__IPSBAR[0x1008]))

+#define MCF_FEC_RDAR                         (*(vuint32*)(&__IPSBAR[0x1010]))

+#define MCF_FEC_TDAR                         (*(vuint32*)(&__IPSBAR[0x1014]))

+#define MCF_FEC_ECR                          (*(vuint32*)(&__IPSBAR[0x1024]))

+#define MCF_FEC_MMFR                         (*(vuint32*)(&__IPSBAR[0x1040]))

+#define MCF_FEC_MSCR                         (*(vuint32*)(&__IPSBAR[0x1044]))

+#define MCF_FEC_MIBC                         (*(vuint32*)(&__IPSBAR[0x1064]))

+#define MCF_FEC_RCR                          (*(vuint32*)(&__IPSBAR[0x1084]))

+#define MCF_FEC_TCR                          (*(vuint32*)(&__IPSBAR[0x10C4]))

+#define MCF_FEC_PALR                         (*(vuint32*)(&__IPSBAR[0x10E4]))

+#define MCF_FEC_PAUR                         (*(vuint32*)(&__IPSBAR[0x10E8]))

+#define MCF_FEC_OPD                          (*(vuint32*)(&__IPSBAR[0x10EC]))

+#define MCF_FEC_IAUR                         (*(vuint32*)(&__IPSBAR[0x1118]))

+#define MCF_FEC_IALR                         (*(vuint32*)(&__IPSBAR[0x111C]))

+#define MCF_FEC_GAUR                         (*(vuint32*)(&__IPSBAR[0x1120]))

+#define MCF_FEC_GALR                         (*(vuint32*)(&__IPSBAR[0x1124]))

+#define MCF_FEC_TFWR                         (*(vuint32*)(&__IPSBAR[0x1144]))

+#define MCF_FEC_FRBR                         (*(vuint32*)(&__IPSBAR[0x114C]))

+#define MCF_FEC_FRSR                         (*(vuint32*)(&__IPSBAR[0x1150]))

+#define MCF_FEC_ERDSR                        (*(vuint32*)(&__IPSBAR[0x1180]))

+#define MCF_FEC_ETSDR                        (*(vuint32*)(&__IPSBAR[0x1184]))

+#define MCF_FEC_EMRBR                        (*(vuint32*)(&__IPSBAR[0x1188]))

+#define MCF_FEC_RMON_T_DROP                  (*(vuint32*)(&__IPSBAR[0x1200]))

+#define MCF_FEC_RMON_T_PACKETS               (*(vuint32*)(&__IPSBAR[0x1204]))

+#define MCF_FEC_RMON_T_BC_PKT                (*(vuint32*)(&__IPSBAR[0x1208]))

+#define MCF_FEC_RMON_T_MC_PKT                (*(vuint32*)(&__IPSBAR[0x120C]))

+#define MCF_FEC_RMON_T_CRC_ALIGN             (*(vuint32*)(&__IPSBAR[0x1210]))

+#define MCF_FEC_RMON_T_UNDERSIZE             (*(vuint32*)(&__IPSBAR[0x1214]))

+#define MCF_FEC_RMON_T_OVERSIZE              (*(vuint32*)(&__IPSBAR[0x1218]))

+#define MCF_FEC_RMON_T_FRAG                  (*(vuint32*)(&__IPSBAR[0x121C]))

+#define MCF_FEC_RMON_T_JAB                   (*(vuint32*)(&__IPSBAR[0x1220]))

+#define MCF_FEC_RMON_T_COL                   (*(vuint32*)(&__IPSBAR[0x1224]))

+#define MCF_FEC_RMON_T_P64                   (*(vuint32*)(&__IPSBAR[0x1228]))

+#define MCF_FEC_RMON_T_P65TO127              (*(vuint32*)(&__IPSBAR[0x122C]))

+#define MCF_FEC_RMON_T_P128TO255             (*(vuint32*)(&__IPSBAR[0x1230]))

+#define MCF_FEC_RMON_T_P256TO511             (*(vuint32*)(&__IPSBAR[0x1234]))

+#define MCF_FEC_RMON_T_P512TO1023            (*(vuint32*)(&__IPSBAR[0x1238]))

+#define MCF_FEC_RMON_T_P1024TO2047           (*(vuint32*)(&__IPSBAR[0x123C]))

+#define MCF_FEC_RMON_T_P_GTE2048             (*(vuint32*)(&__IPSBAR[0x1240]))

+#define MCF_FEC_RMON_T_OCTETS                (*(vuint32*)(&__IPSBAR[0x1244]))

+#define MCF_FEC_IEEE_T_DROP                  (*(vuint32*)(&__IPSBAR[0x1248]))

+#define MCF_FEC_IEEE_T_FRAME_OK              (*(vuint32*)(&__IPSBAR[0x124C]))

+#define MCF_FEC_IEEE_T_1COL                  (*(vuint32*)(&__IPSBAR[0x1250]))

+#define MCF_FEC_IEEE_T_MCOL                  (*(vuint32*)(&__IPSBAR[0x1254]))

+#define MCF_FEC_IEEE_T_DEF                   (*(vuint32*)(&__IPSBAR[0x1258]))

+#define MCF_FEC_IEEE_T_LCOL                  (*(vuint32*)(&__IPSBAR[0x125C]))

+#define MCF_FEC_IEEE_T_EXCOL                 (*(vuint32*)(&__IPSBAR[0x1260]))

+#define MCF_FEC_IEEE_T_MACERR                (*(vuint32*)(&__IPSBAR[0x1264]))

+#define MCF_FEC_IEEE_T_CSERR                 (*(vuint32*)(&__IPSBAR[0x1268]))

+#define MCF_FEC_IEEE_T_SQE                   (*(vuint32*)(&__IPSBAR[0x126C]))

+#define MCF_FEC_IEEE_T_FDXFC                 (*(vuint32*)(&__IPSBAR[0x1270]))

+#define MCF_FEC_IEEE_T_OCTETS_OK             (*(vuint32*)(&__IPSBAR[0x1274]))

+#define MCF_FEC_RMON_R_PACKETS               (*(vuint32*)(&__IPSBAR[0x1284]))

+#define MCF_FEC_RMON_R_BC_PKT                (*(vuint32*)(&__IPSBAR[0x1288]))

+#define MCF_FEC_RMON_R_MC_PKT                (*(vuint32*)(&__IPSBAR[0x128C]))

+#define MCF_FEC_RMON_R_CRC_ALIGN             (*(vuint32*)(&__IPSBAR[0x1290]))

+#define MCF_FEC_RMON_R_UNDERSIZE             (*(vuint32*)(&__IPSBAR[0x1294]))

+#define MCF_FEC_RMON_R_OVERSIZE              (*(vuint32*)(&__IPSBAR[0x1298]))

+#define MCF_FEC_RMON_R_FRAG                  (*(vuint32*)(&__IPSBAR[0x129C]))

+#define MCF_FEC_RMON_R_JAB                   (*(vuint32*)(&__IPSBAR[0x12A0]))

+#define MCF_FEC_RMON_R_RESVD_0               (*(vuint32*)(&__IPSBAR[0x12A4]))

+#define MCF_FEC_RMON_R_P64                   (*(vuint32*)(&__IPSBAR[0x12A8]))

+#define MCF_FEC_RMON_R_P65TO127              (*(vuint32*)(&__IPSBAR[0x12AC]))

+#define MCF_FEC_RMON_R_P128TO255             (*(vuint32*)(&__IPSBAR[0x12B0]))

+#define MCF_FEC_RMON_R_P256TO511             (*(vuint32*)(&__IPSBAR[0x12B4]))

+#define MCF_FEC_RMON_R_P512TO1023            (*(vuint32*)(&__IPSBAR[0x12B8]))

+#define MCF_FEC_RMON_R_P1024TO2047           (*(vuint32*)(&__IPSBAR[0x12BC]))

+#define MCF_FEC_RMON_R_P_GTE2048             (*(vuint32*)(&__IPSBAR[0x12C0]))

+#define MCF_FEC_RMON_R_OCTETS                (*(vuint32*)(&__IPSBAR[0x12C4]))

+#define MCF_FEC_IEEE_R_DROP                  (*(vuint32*)(&__IPSBAR[0x12C8]))

+#define MCF_FEC_IEEE_R_FRAME_OK              (*(vuint32*)(&__IPSBAR[0x12CC]))

+#define MCF_FEC_IEEE_R_CRC                   (*(vuint32*)(&__IPSBAR[0x12D0]))

+#define MCF_FEC_IEEE_R_ALIGN                 (*(vuint32*)(&__IPSBAR[0x12D4]))

+#define MCF_FEC_IEEE_R_MACERR                (*(vuint32*)(&__IPSBAR[0x12D8]))

+#define MCF_FEC_IEEE_R_FDXFC                 (*(vuint32*)(&__IPSBAR[0x12DC]))

+#define MCF_FEC_IEEE_R_OCTETS_OK             (*(vuint32*)(&__IPSBAR[0x12E0]))

+

+

+

+/* Bit definitions and macros for MCF_FEC_EIR */

+#define MCF_FEC_EIR_UN                       (0x80000)

+#define MCF_FEC_EIR_RL                       (0x100000)

+#define MCF_FEC_EIR_LC                       (0x200000)

+#define MCF_FEC_EIR_EBERR                    (0x400000)

+#define MCF_FEC_EIR_MII                      (0x800000)

+#define MCF_FEC_EIR_RXB                      (0x1000000)

+#define MCF_FEC_EIR_RXF                      (0x2000000)

+#define MCF_FEC_EIR_TXB                      (0x4000000)

+#define MCF_FEC_EIR_TXF                      (0x8000000)

+#define MCF_FEC_EIR_GRA                      (0x10000000)

+#define MCF_FEC_EIR_BABT                     (0x20000000)

+#define MCF_FEC_EIR_BABR                     (0x40000000)

+#define MCF_FEC_EIR_HBERR                    (0x80000000)

+#define MCF_FEC_EIR_CLEAR_ALL                (0xFFFFFFFF)

+

+/* Bit definitions and macros for MCF_FEC_EIMR */

+#define MCF_FEC_EIMR_UN                      (0x80000)

+#define MCF_FEC_EIMR_RL                      (0x100000)

+#define MCF_FEC_EIMR_LC                      (0x200000)

+#define MCF_FEC_EIMR_EBERR                   (0x400000)

+#define MCF_FEC_EIMR_MII                     (0x800000)

+#define MCF_FEC_EIMR_RXB                     (0x1000000)

+#define MCF_FEC_EIMR_RXF                     (0x2000000)

+#define MCF_FEC_EIMR_TXB                     (0x4000000)

+#define MCF_FEC_EIMR_TXF                     (0x8000000)

+#define MCF_FEC_EIMR_GRA                     (0x10000000)

+#define MCF_FEC_EIMR_BABT                    (0x20000000)

+#define MCF_FEC_EIMR_BABR                    (0x40000000)

+#define MCF_FEC_EIMR_HBERR                   (0x80000000)

+#define MCF_FEC_EIMR_MASK_ALL                (0)

+#define MCF_FEC_EIMR_UNMASK_ALL              (0xFFFFFFFF)

+

+/* Bit definitions and macros for MCF_FEC_RDAR */

+#define MCF_FEC_RDAR_R_DES_ACTIVE            (0x1000000)

+

+/* Bit definitions and macros for MCF_FEC_TDAR */

+#define MCF_FEC_TDAR_X_DES_ACTIVE            (0x1000000)

+

+/* Bit definitions and macros for MCF_FEC_ECR */

+#define MCF_FEC_ECR_RESET                    (0x1)

+#define MCF_FEC_ECR_ETHER_EN                 (0x2)

+

+/* Bit definitions and macros for MCF_FEC_MMFR */

+#define MCF_FEC_MMFR_DATA(x)                 (((x)&0xFFFF)<<0)

+#define MCF_FEC_MMFR_TA(x)                   (((x)&0x3)<<0x10)

+#define MCF_FEC_MMFR_TA_10                   (0x20000)

+#define MCF_FEC_MMFR_RA(x)                   (((x)&0x1F)<<0x12)

+#define MCF_FEC_MMFR_PA(x)                   (((x)&0x1F)<<0x17)

+#define MCF_FEC_MMFR_OP(x)                   (((x)&0x3)<<0x1C)

+#define MCF_FEC_MMFR_OP_READ                 (0x20000000)

+#define MCF_FEC_MMFR_OP_WRITE                (0x10000000)

+#define MCF_FEC_MMFR_ST(x)                   (((x)&0x3)<<0x1E)

+#define MCF_FEC_MMFR_ST_01                   (0x40000000)

+

+/* Bit definitions and macros for MCF_FEC_MSCR */

+#define MCF_FEC_MSCR_MII_SPEED(x)            (((x)&0x3F)<<0x1)

+#define MCF_FEC_MSCR_DIS_PREAMBLE            (0x80)

+

+/* Bit definitions and macros for MCF_FEC_MIBC */

+#define MCF_FEC_MIBC_MIB_IDLE                (0x40000000)

+#define MCF_FEC_MIBC_MIB_DISABLE             (0x80000000)

+

+/* Bit definitions and macros for MCF_FEC_RCR */

+#define MCF_FEC_RCR_LOOP                     (0x1)

+#define MCF_FEC_RCR_DRT                      (0x2)

+#define MCF_FEC_RCR_MII_MODE                 (0x4)

+#define MCF_FEC_RCR_PROM                     (0x8)

+#define MCF_FEC_RCR_BC_REJ                   (0x10)

+#define MCF_FEC_RCR_FCE                      (0x20)

+#define MCF_FEC_RCR_MAX_FL(x)                (((x)&0x7FF)<<0x10)

+

+/* Bit definitions and macros for MCF_FEC_TCR */

+#define MCF_FEC_TCR_GTS                      (0x1)

+#define MCF_FEC_TCR_HBC                      (0x2)

+#define MCF_FEC_TCR_FDEN                     (0x4)

+#define MCF_FEC_TCR_TFC_PAUSE                (0x8)

+#define MCF_FEC_TCR_RFC_PAUSE                (0x10)

+

+/* Bit definitions and macros for MCF_FEC_PALR */

+#define MCF_FEC_PALR_PADDR1(x)               (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_PAUR */

+#define MCF_FEC_PAUR_TYPE(x)                 (((x)&0xFFFF)<<0)

+#define MCF_FEC_PAUR_PADDR2(x)               (((x)&0xFFFF)<<0x10)

+

+/* Bit definitions and macros for MCF_FEC_OPD */

+#define MCF_FEC_OPD_PAUSE_DUR(x)             (((x)&0xFFFF)<<0)

+#define MCF_FEC_OPD_OPCODE(x)                (((x)&0xFFFF)<<0x10)

+

+/* Bit definitions and macros for MCF_FEC_IAUR */

+#define MCF_FEC_IAUR_IADDR1(x)               (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IALR */

+#define MCF_FEC_IALR_IADDR2(x)               (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_GAUR */

+#define MCF_FEC_GAUR_GADDR1(x)               (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_GALR */

+#define MCF_FEC_GALR_GADDR2(x)               (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_TFWR */

+#define MCF_FEC_TFWR_X_WMRK(x)               (((x)&0x3)<<0)

+#define MCF_FEC_TFWR_X_WMRK_64               (0)

+#define MCF_FEC_TFWR_X_WMRK_128              (0x2)

+#define MCF_FEC_TFWR_X_WMRK_192              (0x3)

+

+/* Bit definitions and macros for MCF_FEC_FRBR */

+#define MCF_FEC_FRBR_R_BOUND(x)              (((x)&0xFF)<<0x2)

+

+/* Bit definitions and macros for MCF_FEC_FRSR */

+#define MCF_FEC_FRSR_R_FSTART(x)             (((x)&0xFF)<<0x2)

+

+/* Bit definitions and macros for MCF_FEC_ERDSR */

+#define MCF_FEC_ERDSR_R_DES_START(x)         (((x)&0x3FFFFFFF)<<0x2)

+

+/* Bit definitions and macros for MCF_FEC_ETSDR */

+#define MCF_FEC_ETSDR_X_DES_START(x)         (((x)&0x3FFFFFFF)<<0x2)

+

+/* Bit definitions and macros for MCF_FEC_EMRBR */

+#define MCF_FEC_EMRBR_R_BUF_SIZE(x)          (((x)&0x7F)<<0x4)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_DROP */

+#define MCF_FEC_RMON_T_DROP_Value(x)         (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_PACKETS */

+#define MCF_FEC_RMON_T_PACKETS_Value(x)      (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_BC_PKT */

+#define MCF_FEC_RMON_T_BC_PKT_Value(x)       (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_MC_PKT */

+#define MCF_FEC_RMON_T_MC_PKT_Value(x)       (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_CRC_ALIGN */

+#define MCF_FEC_RMON_T_CRC_ALIGN_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_UNDERSIZE */

+#define MCF_FEC_RMON_T_UNDERSIZE_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_OVERSIZE */

+#define MCF_FEC_RMON_T_OVERSIZE_Value(x)     (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_FRAG */

+#define MCF_FEC_RMON_T_FRAG_Value(x)         (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_JAB */

+#define MCF_FEC_RMON_T_JAB_Value(x)          (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_COL */

+#define MCF_FEC_RMON_T_COL_Value(x)          (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_P64 */

+#define MCF_FEC_RMON_T_P64_Value(x)          (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_P65TO127 */

+#define MCF_FEC_RMON_T_P65TO127_Value(x)     (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_P128TO255 */

+#define MCF_FEC_RMON_T_P128TO255_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_P256TO511 */

+#define MCF_FEC_RMON_T_P256TO511_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_P512TO1023 */

+#define MCF_FEC_RMON_T_P512TO1023_Value(x)   (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_P1024TO2047 */

+#define MCF_FEC_RMON_T_P1024TO2047_Value(x)  (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_P_GTE2048 */

+#define MCF_FEC_RMON_T_P_GTE2048_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_T_OCTETS */

+#define MCF_FEC_RMON_T_OCTETS_Value(x)       (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_DROP */

+#define MCF_FEC_IEEE_T_DROP_Value(x)         (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_FRAME_OK */

+#define MCF_FEC_IEEE_T_FRAME_OK_Value(x)     (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_1COL */

+#define MCF_FEC_IEEE_T_1COL_Value(x)         (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_MCOL */

+#define MCF_FEC_IEEE_T_MCOL_Value(x)         (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_DEF */

+#define MCF_FEC_IEEE_T_DEF_Value(x)          (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_LCOL */

+#define MCF_FEC_IEEE_T_LCOL_Value(x)         (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_EXCOL */

+#define MCF_FEC_IEEE_T_EXCOL_Value(x)        (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_MACERR */

+#define MCF_FEC_IEEE_T_MACERR_Value(x)       (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_CSERR */

+#define MCF_FEC_IEEE_T_CSERR_Value(x)        (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_SQE */

+#define MCF_FEC_IEEE_T_SQE_Value(x)          (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_FDXFC */

+#define MCF_FEC_IEEE_T_FDXFC_Value(x)        (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_T_OCTETS_OK */

+#define MCF_FEC_IEEE_T_OCTETS_OK_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_PACKETS */

+#define MCF_FEC_RMON_R_PACKETS_Value(x)      (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_BC_PKT */

+#define MCF_FEC_RMON_R_BC_PKT_Value(x)       (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_MC_PKT */

+#define MCF_FEC_RMON_R_MC_PKT_Value(x)       (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_CRC_ALIGN */

+#define MCF_FEC_RMON_R_CRC_ALIGN_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_UNDERSIZE */

+#define MCF_FEC_RMON_R_UNDERSIZE_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_OVERSIZE */

+#define MCF_FEC_RMON_R_OVERSIZE_Value(x)     (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_FRAG */

+#define MCF_FEC_RMON_R_FRAG_Value(x)         (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_JAB */

+#define MCF_FEC_RMON_R_JAB_Value(x)          (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_RESVD_0 */

+#define MCF_FEC_RMON_R_RESVD_0_Value(x)      (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_P64 */

+#define MCF_FEC_RMON_R_P64_Value(x)          (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_P65TO127 */

+#define MCF_FEC_RMON_R_P65TO127_Value(x)     (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_P128TO255 */

+#define MCF_FEC_RMON_R_P128TO255_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_P256TO511 */

+#define MCF_FEC_RMON_R_P256TO511_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_P512TO1023 */

+#define MCF_FEC_RMON_R_P512TO1023_Value(x)   (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_P1024TO2047 */

+#define MCF_FEC_RMON_R_P1024TO2047_Value(x)  (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_P_GTE2048 */

+#define MCF_FEC_RMON_R_P_GTE2048_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_RMON_R_OCTETS */

+#define MCF_FEC_RMON_R_OCTETS_Value(x)       (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_R_DROP */

+#define MCF_FEC_IEEE_R_DROP_Value(x)         (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_R_FRAME_OK */

+#define MCF_FEC_IEEE_R_FRAME_OK_Value(x)     (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_R_CRC */

+#define MCF_FEC_IEEE_R_CRC_Value(x)          (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_R_ALIGN */

+#define MCF_FEC_IEEE_R_ALIGN_Value(x)        (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_R_MACERR */

+#define MCF_FEC_IEEE_R_MACERR_Value(x)       (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_R_FDXFC */

+#define MCF_FEC_IEEE_R_FDXFC_Value(x)        (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FEC_IEEE_R_OCTETS_OK */

+#define MCF_FEC_IEEE_R_OCTETS_OK_Value(x)    (((x)&0xFFFFFFFF)<<0)

+

+

+#endif /* __MCF52235_FEC_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_FlexCAN.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_FlexCAN.h
new file mode 100644
index 00000000..97b19722
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_FlexCAN.h
@@ -0,0 +1,132 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_FlexCAN_H__

+#define __MCF52235_FlexCAN_H__

+

+

+/*********************************************************************

+*

+* Flex Controller Area Network (FlexCAN)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_FlexCAN_CANMCR                   (*(vuint32*)(&__IPSBAR[0x1C0000]))

+#define MCF_FlexCAN_CANCTRL                  (*(vuint32*)(&__IPSBAR[0x1C0004]))

+#define MCF_FlexCAN_TIMER                    (*(vuint32*)(&__IPSBAR[0x1C0008]))

+#define MCF_FlexCAN_RXGMASK                  (*(vuint32*)(&__IPSBAR[0x1C0010]))

+#define MCF_FlexCAN_RX14MASK                 (*(vuint32*)(&__IPSBAR[0x1C0014]))

+#define MCF_FlexCAN_RX15MASK                 (*(vuint32*)(&__IPSBAR[0x1C0018]))

+#define MCF_FlexCAN_ERRCNT                   (*(vuint32*)(&__IPSBAR[0x1C001C]))

+#define MCF_FlexCAN_ERRSTAT                  (*(vuint32*)(&__IPSBAR[0x1C0020]))

+#define MCF_FlexCAN_IMASK                    (*(vuint32*)(&__IPSBAR[0x1C0028]))

+#define MCF_FlexCAN_IFLAG                    (*(vuint32*)(&__IPSBAR[0x1C0030]))

+

+

+

+/* Bit definitions and macros for MCF_FlexCAN_CANMCR */

+#define MCF_FlexCAN_CANMCR_MAXMB(x)          (((x)&0xF)<<0)

+#define MCF_FlexCAN_CANMCR_LPMACK            (0x100000)

+#define MCF_FlexCAN_CANMCR_SUPV              (0x800000)

+#define MCF_FlexCAN_CANMCR_FRZACK            (0x1000000)

+#define MCF_FlexCAN_CANMCR_SOFTRST           (0x2000000)

+#define MCF_FlexCAN_CANMCR_NOTRDY            (0x8000000)

+#define MCF_FlexCAN_CANMCR_HALT              (0x10000000)

+#define MCF_FlexCAN_CANMCR_FRZ               (0x40000000)

+#define MCF_FlexCAN_CANMCR_MDIS              (0x80000000)

+

+/* Bit definitions and macros for MCF_FlexCAN_CANCTRL */

+#define MCF_FlexCAN_CANCTRL_PROPSEG(x)       (((x)&0x7)<<0)

+#define MCF_FlexCAN_CANCTRL_LOM              (0x8)

+#define MCF_FlexCAN_CANCTRL_LBUF             (0x10)

+#define MCF_FlexCAN_CANCTRL_TSYNC            (0x20)

+#define MCF_FlexCAN_CANCTRL_BOFFREC          (0x40)

+#define MCF_FlexCAN_CANCTRL_SAMP             (0x80)

+#define MCF_FlexCAN_CANCTRL_LPB              (0x1000)

+#define MCF_FlexCAN_CANCTRL_CLK_SRC          (0x2000)

+#define MCF_FlexCAN_CANCTRL_ERRMSK           (0x4000)

+#define MCF_FlexCAN_CANCTRL_BOFFMSK          (0x8000)

+#define MCF_FlexCAN_CANCTRL_PSEG2(x)         (((x)&0x7)<<0x10)

+#define MCF_FlexCAN_CANCTRL_PSEG1(x)         (((x)&0x7)<<0x13)

+#define MCF_FlexCAN_CANCTRL_RJW(x)           (((x)&0x3)<<0x16)

+#define MCF_FlexCAN_CANCTRL_PRESDIV(x)       (((x)&0xFF)<<0x18)

+

+/* Bit definitions and macros for MCF_FlexCAN_TIMER */

+#define MCF_FlexCAN_TIMER_TIMER(x)           (((x)&0xFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FlexCAN_RXGMASK */

+#define MCF_FlexCAN_RXGMASK_MI(x)            (((x)&0x1FFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FlexCAN_RX14MASK */

+#define MCF_FlexCAN_RX14MASK_MI(x)           (((x)&0x1FFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FlexCAN_RX15MASK */

+#define MCF_FlexCAN_RX15MASK_MI(x)           (((x)&0x1FFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_FlexCAN_ERRCNT */

+#define MCF_FlexCAN_ERRCNT_TXECTR(x)         (((x)&0xFF)<<0)

+#define MCF_FlexCAN_ERRCNT_RXECTR(x)         (((x)&0xFF)<<0x8)

+

+/* Bit definitions and macros for MCF_FlexCAN_ERRSTAT */

+#define MCF_FlexCAN_ERRSTAT_ERRINT           (0x2)

+#define MCF_FlexCAN_ERRSTAT_BOFFINT          (0x4)

+#define MCF_FlexCAN_ERRSTAT_FLTCONF(x)       (((x)&0x3)<<0x4)

+#define MCF_FlexCAN_ERRSTAT_FLTCONF_ACTIVE   (0)

+#define MCF_FlexCAN_ERRSTAT_FLTCONF_PASSIVE  (0x10)

+#define MCF_FlexCAN_ERRSTAT_FLTCONF_BUSOFF   (0x20)

+#define MCF_FlexCAN_ERRSTAT_TXRX             (0x40)

+#define MCF_FlexCAN_ERRSTAT_IDLE             (0x80)

+#define MCF_FlexCAN_ERRSTAT_RXWRN            (0x100)

+#define MCF_FlexCAN_ERRSTAT_TXWRN            (0x200)

+#define MCF_FlexCAN_ERRSTAT_STFERR           (0x400)

+#define MCF_FlexCAN_ERRSTAT_FRMERR           (0x800)

+#define MCF_FlexCAN_ERRSTAT_CRCERR           (0x1000)

+#define MCF_FlexCAN_ERRSTAT_ACKERR           (0x2000)

+#define MCF_FlexCAN_ERRSTAT_BIT0ERR          (0x4000)

+#define MCF_FlexCAN_ERRSTAT_BIT1ERR          (0x8000)

+

+/* Bit definitions and macros for MCF_FlexCAN_IMASK */

+#define MCF_FlexCAN_IMASK_BUF0M              (0x1)

+#define MCF_FlexCAN_IMASK_BUF1M              (0x2)

+#define MCF_FlexCAN_IMASK_BUF2M              (0x4)

+#define MCF_FlexCAN_IMASK_BUF3M              (0x8)

+#define MCF_FlexCAN_IMASK_BUF4M              (0x10)

+#define MCF_FlexCAN_IMASK_BUF5M              (0x20)

+#define MCF_FlexCAN_IMASK_BUF6M              (0x40)

+#define MCF_FlexCAN_IMASK_BUF7M              (0x80)

+#define MCF_FlexCAN_IMASK_BUF8M              (0x100)

+#define MCF_FlexCAN_IMASK_BUF9M              (0x200)

+#define MCF_FlexCAN_IMASK_BUF10M             (0x400)

+#define MCF_FlexCAN_IMASK_BUF11M             (0x800)

+#define MCF_FlexCAN_IMASK_BUF12M             (0x1000)

+#define MCF_FlexCAN_IMASK_BUF13M             (0x2000)

+#define MCF_FlexCAN_IMASK_BUF14M             (0x4000)

+#define MCF_FlexCAN_IMASK_BUF15M             (0x8000)

+#define MCF_FlexCAN_IMASK_BUF(x)             (0x1<<(x))

+

+/* Bit definitions and macros for MCF_FlexCAN_IFLAG */

+#define MCF_FlexCAN_IFLAG_BUF0I              (0x1)

+#define MCF_FlexCAN_IFLAG_BUF1I              (0x2)

+#define MCF_FlexCAN_IFLAG_BUF2I              (0x4)

+#define MCF_FlexCAN_IFLAG_BUF3I              (0x8)

+#define MCF_FlexCAN_IFLAG_BUF4I              (0x10)

+#define MCF_FlexCAN_IFLAG_BUF5I              (0x20)

+#define MCF_FlexCAN_IFLAG_BUF6I              (0x40)

+#define MCF_FlexCAN_IFLAG_BUF7I              (0x80)

+#define MCF_FlexCAN_IFLAG_BUF8I              (0x100)

+#define MCF_FlexCAN_IFLAG_BUF9I              (0x200)

+#define MCF_FlexCAN_IFLAG_BUF10I             (0x400)

+#define MCF_FlexCAN_IFLAG_BUF11I             (0x800)

+#define MCF_FlexCAN_IFLAG_BUF12I             (0x1000)

+#define MCF_FlexCAN_IFLAG_BUF13I             (0x2000)

+#define MCF_FlexCAN_IFLAG_BUF14I             (0x4000)

+#define MCF_FlexCAN_IFLAG_BUF15I             (0x8000)

+#define MCF_FlexCAN_IFLAG_BUF(x)             (0x1<<(x))

+

+

+#endif /* __MCF52235_FlexCAN_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GIACR.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GIACR.h
new file mode 100644
index 00000000..7f1fbb30
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GIACR.h
@@ -0,0 +1,37 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_GIACR_H__

+#define __MCF52235_GIACR_H__

+

+

+/*********************************************************************

+*

+* Global Interrupt Acknowledge Control Registers Module (GIACR)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_GIACR_GSWIACK                    (*(vuint8 *)(&__IPSBAR[0xFE0]))

+#define MCF_GIACR_GL1IACK                    (*(vuint8 *)(&__IPSBAR[0xFE4]))

+#define MCF_GIACR_GL2IACK                    (*(vuint8 *)(&__IPSBAR[0xFE8]))

+#define MCF_GIACR_GL3IACK                    (*(vuint8 *)(&__IPSBAR[0xFEC]))

+#define MCF_GIACR_GL4IACK                    (*(vuint8 *)(&__IPSBAR[0xFF0]))

+#define MCF_GIACR_GL5IACK                    (*(vuint8 *)(&__IPSBAR[0xFF4]))

+#define MCF_GIACR_GL6IACK                    (*(vuint8 *)(&__IPSBAR[0xFF8]))

+#define MCF_GIACR_GL7IACK                    (*(vuint8 *)(&__IPSBAR[0xFFC]))

+#define MCF_GIACR_GLIACK(x)                  (*(vuint8 *)(&__IPSBAR[0xFE4 + ((x-1)*0x4)]))

+

+

+/* Bit definitions and macros for MCF_GIACR_GSWIACK */

+#define MCF_GIACR_GSWIACK_VECTOR(x)          (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_GIACR_GLIACK */

+#define MCF_GIACR_GLIACK_VECTOR(x)           (((x)&0xFF)<<0)

+

+

+#endif /* __MCF52235_GIACR_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GPIO.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GPIO.h
new file mode 100644
index 00000000..f12353e4
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GPIO.h
@@ -0,0 +1,795 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_GPIO_H__

+#define __MCF52235_GPIO_H__

+

+

+/*********************************************************************

+*

+* General Purpose I/O (GPIO)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_GPIO_PORTNQ                      (*(vuint8 *)(&__IPSBAR[0x100008]))

+#define MCF_GPIO_DDRNQ                       (*(vuint8 *)(&__IPSBAR[0x100020]))

+#define MCF_GPIO_SETNQ                       (*(vuint8 *)(&__IPSBAR[0x100038]))

+#define MCF_GPIO_CLRNQ                       (*(vuint8 *)(&__IPSBAR[0x100050]))

+#define MCF_GPIO_PNQPAR                      (*(vuint16*)(&__IPSBAR[0x100068]))

+

+#define MCF_GPIO_PORTAN                      (*(vuint8 *)(&__IPSBAR[0x10000A]))

+#define MCF_GPIO_DDRAN                       (*(vuint8 *)(&__IPSBAR[0x100022]))

+#define MCF_GPIO_SETAN                       (*(vuint8 *)(&__IPSBAR[0x10003A]))

+#define MCF_GPIO_CLRAN                       (*(vuint8 *)(&__IPSBAR[0x100052]))

+#define MCF_GPIO_PANPAR                      (*(vuint8 *)(&__IPSBAR[0x10006A]))

+

+#define MCF_GPIO_PORTAS                      (*(vuint8 *)(&__IPSBAR[0x10000B]))

+#define MCF_GPIO_DDRAS                       (*(vuint8 *)(&__IPSBAR[0x100023]))

+#define MCF_GPIO_SETAS                       (*(vuint8 *)(&__IPSBAR[0x10003B]))

+#define MCF_GPIO_CLRAS                       (*(vuint8 *)(&__IPSBAR[0x100053]))

+#define MCF_GPIO_PASPAR                      (*(vuint8 *)(&__IPSBAR[0x10006B]))

+

+#define MCF_GPIO_PORTQS                      (*(vuint8 *)(&__IPSBAR[0x10000C]))

+#define MCF_GPIO_DDRQS                       (*(vuint8 *)(&__IPSBAR[0x100024]))

+#define MCF_GPIO_SETQS                       (*(vuint8 *)(&__IPSBAR[0x10003C]))

+#define MCF_GPIO_CLRQS                       (*(vuint8 *)(&__IPSBAR[0x100054]))

+#define MCF_GPIO_PQSPAR                      (*(vuint16*)(&__IPSBAR[0x10006C]))

+

+#define MCF_GPIO_PORTTA                      (*(vuint8 *)(&__IPSBAR[0x10000E]))

+#define MCF_GPIO_DDRTA                       (*(vuint8 *)(&__IPSBAR[0x100026]))

+#define MCF_GPIO_SETTA                       (*(vuint8 *)(&__IPSBAR[0x10003E]))

+#define MCF_GPIO_CLRTA                       (*(vuint8 *)(&__IPSBAR[0x100056]))

+#define MCF_GPIO_PTAPAR                      (*(vuint8 *)(&__IPSBAR[0x10006E]))

+

+#define MCF_GPIO_PORTTC                      (*(vuint8 *)(&__IPSBAR[0x10000F]))

+#define MCF_GPIO_DDRTC                       (*(vuint8 *)(&__IPSBAR[0x100027]))

+#define MCF_GPIO_SETTC                       (*(vuint8 *)(&__IPSBAR[0x10003F]))

+#define MCF_GPIO_CLRTC                       (*(vuint8 *)(&__IPSBAR[0x100057]))

+#define MCF_GPIO_PTCPAR                      (*(vuint8 *)(&__IPSBAR[0x10006F]))

+

+#define MCF_GPIO_PORTTD                      (*(vuint8 *)(&__IPSBAR[0x100010]))

+#define MCF_GPIO_DDRTD                       (*(vuint8 *)(&__IPSBAR[0x100028]))

+#define MCF_GPIO_SETTD                       (*(vuint8 *)(&__IPSBAR[0x100040]))

+#define MCF_GPIO_CLRTD                       (*(vuint8 *)(&__IPSBAR[0x100058]))

+#define MCF_GPIO_PTDPAR                      (*(vuint8 *)(&__IPSBAR[0x100070]))

+

+#define MCF_GPIO_PORTUA                      (*(vuint8 *)(&__IPSBAR[0x100011]))

+#define MCF_GPIO_DDRUA                       (*(vuint8 *)(&__IPSBAR[0x100029]))

+#define MCF_GPIO_SETUA                       (*(vuint8 *)(&__IPSBAR[0x100041]))

+#define MCF_GPIO_CLRUA                       (*(vuint8 *)(&__IPSBAR[0x100059]))

+#define MCF_GPIO_PUAPAR                      (*(vuint8 *)(&__IPSBAR[0x100071]))

+

+#define MCF_GPIO_PORTUB                      (*(vuint8 *)(&__IPSBAR[0x100012]))

+#define MCF_GPIO_DDRUB                       (*(vuint8 *)(&__IPSBAR[0x10002A]))

+#define MCF_GPIO_SETUB                       (*(vuint8 *)(&__IPSBAR[0x100042]))

+#define MCF_GPIO_CLRUB                       (*(vuint8 *)(&__IPSBAR[0x10005A]))

+#define MCF_GPIO_PUBPAR                      (*(vuint8 *)(&__IPSBAR[0x100072]))

+

+#define MCF_GPIO_PORTUC                      (*(vuint8 *)(&__IPSBAR[0x100013]))

+#define MCF_GPIO_DDRUC                       (*(vuint8 *)(&__IPSBAR[0x10002B]))

+#define MCF_GPIO_SETUC                       (*(vuint8 *)(&__IPSBAR[0x100043]))

+#define MCF_GPIO_CLRUC                       (*(vuint8 *)(&__IPSBAR[0x10005B]))

+#define MCF_GPIO_PUCPAR                      (*(vuint8 *)(&__IPSBAR[0x100073]))

+

+#define MCF_GPIO_PORTDD                      (*(vuint8 *)(&__IPSBAR[0x100014]))

+#define MCF_GPIO_DDRDD                       (*(vuint8 *)(&__IPSBAR[0x10002C]))

+#define MCF_GPIO_SETDD                       (*(vuint8 *)(&__IPSBAR[0x100044]))

+#define MCF_GPIO_CLRDD                       (*(vuint8 *)(&__IPSBAR[0x10005C]))

+#define MCF_GPIO_PDDPAR                      (*(vuint8 *)(&__IPSBAR[0x100074]))

+

+#define MCF_GPIO_PORTLD                      (*(vuint8 *)(&__IPSBAR[0x100015]))

+#define MCF_GPIO_DDRLD                       (*(vuint8 *)(&__IPSBAR[0x10002D]))

+#define MCF_GPIO_SETLD                       (*(vuint8 *)(&__IPSBAR[0x100045]))

+#define MCF_GPIO_CLRLD                       (*(vuint8 *)(&__IPSBAR[0x10005D]))

+#define MCF_GPIO_PLDPAR                      (*(vuint8 *)(&__IPSBAR[0x100075]))

+

+#define MCF_GPIO_PORTGP                      (*(vuint8 *)(&__IPSBAR[0x100016]))

+#define MCF_GPIO_DDRGP                       (*(vuint8 *)(&__IPSBAR[0x10002E]))

+#define MCF_GPIO_SETGP                       (*(vuint8 *)(&__IPSBAR[0x100046]))

+#define MCF_GPIO_CLRGP                       (*(vuint8 *)(&__IPSBAR[0x10005E]))

+#define MCF_GPIO_PGPPAR                      (*(vuint8 *)(&__IPSBAR[0x100076]))

+

+

+

+/* Bit definitions and macros for MCF_GPIO_PORTNQ */

+#define MCF_GPIO_PORTNQ_PORTNQ1              (0x2)

+#define MCF_GPIO_PORTNQ_PORTNQ2              (0x4)

+#define MCF_GPIO_PORTNQ_PORTNQ3              (0x8)

+#define MCF_GPIO_PORTNQ_PORTNQ4              (0x10)

+#define MCF_GPIO_PORTNQ_PORTNQ5              (0x20)

+#define MCF_GPIO_PORTNQ_PORTNQ6              (0x40)

+#define MCF_GPIO_PORTNQ_PORTNQ7              (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_DDRNQ */

+#define MCF_GPIO_DDRNQ_DDRNQ1                (0x2)

+#define MCF_GPIO_DDRNQ_DDRNQ2                (0x4)

+#define MCF_GPIO_DDRNQ_DDRNQ3                (0x8)

+#define MCF_GPIO_DDRNQ_DDRNQ4                (0x10)

+#define MCF_GPIO_DDRNQ_DDRNQ5                (0x20)

+#define MCF_GPIO_DDRNQ_DDRNQ6                (0x40)

+#define MCF_GPIO_DDRNQ_DDRNQ7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_SETNQ */

+#define MCF_GPIO_SETNQ_SETNQ1                (0x2)

+#define MCF_GPIO_SETNQ_SETNQ2                (0x4)

+#define MCF_GPIO_SETNQ_SETNQ3                (0x8)

+#define MCF_GPIO_SETNQ_SETNQ4                (0x10)

+#define MCF_GPIO_SETNQ_SETNQ5                (0x20)

+#define MCF_GPIO_SETNQ_SETNQ6                (0x40)

+#define MCF_GPIO_SETNQ_SETNQ7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_CLRNQ */

+#define MCF_GPIO_CLRNQ_CLRNQ1                (0x2)

+#define MCF_GPIO_CLRNQ_CLRNQ2                (0x4)

+#define MCF_GPIO_CLRNQ_CLRNQ3                (0x8)

+#define MCF_GPIO_CLRNQ_CLRNQ4                (0x10)

+#define MCF_GPIO_CLRNQ_CLRNQ5                (0x20)

+#define MCF_GPIO_CLRNQ_CLRNQ6                (0x40)

+#define MCF_GPIO_CLRNQ_CLRNQ7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_PNQPAR */

+#define MCF_GPIO_PNQPAR_PNQPAR1(x)           (((x)&0x3)<<0x2)

+#define MCF_GPIO_PNQPAR_IRQ1_GPIO            (0)

+#define MCF_GPIO_PNQPAR_IRQ1_IRQ1            (0x4)

+#define MCF_GPIO_PNQPAR_IRQ1_SYNCA           (0x8)

+#define MCF_GPIO_PNQPAR_IRQ1_PWM1            (0xC)

+#define MCF_GPIO_PNQPAR_PNQPAR2(x)           (((x)&0x3)<<0x4)

+#define MCF_GPIO_PNQPAR_IRQ2_GPIO            (0)

+#define MCF_GPIO_PNQPAR_IRQ2_IRQ2            (0x10)

+#define MCF_GPIO_PNQPAR_IRQ2_FEC_RXD3        (0x30)

+#define MCF_GPIO_PNQPAR_PNQPAR3(x)           (((x)&0x3)<<0x6)

+#define MCF_GPIO_PNQPAR_IRQ3_GPIO            (0)

+#define MCF_GPIO_PNQPAR_IRQ3_IRQ3            (0x40)

+#define MCF_GPIO_PNQPAR_IRQ3_FEC_RXD2        (0xC0)

+#define MCF_GPIO_PNQPAR_PNQPAR4(x)           (((x)&0x3)<<0x8)

+#define MCF_GPIO_PNQPAR_IRQ4_GPIO            (0)

+#define MCF_GPIO_PNQPAR_IRQ4_IRQ4            (0x100)

+#define MCF_GPIO_PNQPAR_PNQPAR5(x)           (((x)&0x3)<<0xA)

+#define MCF_GPIO_PNQPAR_IRQ5_GPIO            (0)

+#define MCF_GPIO_PNQPAR_IRQ5_IRQ5            (0x400)

+#define MCF_GPIO_PNQPAR_IRQ5_FEC_RXD1        (0xC00)

+#define MCF_GPIO_PNQPAR_PNQPAR6(x)           (((x)&0x3)<<0xC)

+#define MCF_GPIO_PNQPAR_IRQ6_GPIO            (0)

+#define MCF_GPIO_PNQPAR_IRQ6_IRQ6            (0x1000)

+#define MCF_GPIO_PNQPAR_IRQ6_FEC_RXER        (0x3000)

+#define MCF_GPIO_PNQPAR_PNQPAR7(x)           (((x)&0x3)<<0xE)

+#define MCF_GPIO_PNQPAR_IRQ7_GPIO            (0)

+#define MCF_GPIO_PNQPAR_IRQ7_IRQ7            (0x4000)

+

+/* Bit definitions and macros for MCF_GPIO_PORTAN */

+#define MCF_GPIO_PORTAN_PORTAN0              (0x1)

+#define MCF_GPIO_PORTAN_PORTAN1              (0x2)

+#define MCF_GPIO_PORTAN_PORTAN2              (0x4)

+#define MCF_GPIO_PORTAN_PORTAN3              (0x8)

+#define MCF_GPIO_PORTAN_PORTAN4              (0x10)

+#define MCF_GPIO_PORTAN_PORTAN5              (0x20)

+#define MCF_GPIO_PORTAN_PORTAN6              (0x40)

+#define MCF_GPIO_PORTAN_PORTAN7              (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_DDRAN */

+#define MCF_GPIO_DDRAN_DDRAN0                (0x1)

+#define MCF_GPIO_DDRAN_DDRAN1                (0x2)

+#define MCF_GPIO_DDRAN_DDRAN2                (0x4)

+#define MCF_GPIO_DDRAN_DDRAN3                (0x8)

+#define MCF_GPIO_DDRAN_DDRAN4                (0x10)

+#define MCF_GPIO_DDRAN_DDRAN5                (0x20)

+#define MCF_GPIO_DDRAN_DDRAN6                (0x40)

+#define MCF_GPIO_DDRAN_DDRAN7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_SETAN */

+#define MCF_GPIO_SETAN_SETAN0                (0x1)

+#define MCF_GPIO_SETAN_SETAN1                (0x2)

+#define MCF_GPIO_SETAN_SETAN2                (0x4)

+#define MCF_GPIO_SETAN_SETAN3                (0x8)

+#define MCF_GPIO_SETAN_SETAN4                (0x10)

+#define MCF_GPIO_SETAN_SETAN5                (0x20)

+#define MCF_GPIO_SETAN_SETAN6                (0x40)

+#define MCF_GPIO_SETAN_SETAN7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_CLRAN */

+#define MCF_GPIO_CLRAN_CLRAN0                (0x1)

+#define MCF_GPIO_CLRAN_CLRAN1                (0x2)

+#define MCF_GPIO_CLRAN_CLRAN2                (0x4)

+#define MCF_GPIO_CLRAN_CLRAN3                (0x8)

+#define MCF_GPIO_CLRAN_CLRAN4                (0x10)

+#define MCF_GPIO_CLRAN_CLRAN5                (0x20)

+#define MCF_GPIO_CLRAN_CLRAN6                (0x40)

+#define MCF_GPIO_CLRAN_CLRAN7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_PANPAR */

+#define MCF_GPIO_PANPAR_PANPAR0              (0x1)

+#define MCF_GPIO_PANPAR_AN0_GPIO             (0)

+#define MCF_GPIO_PANPAR_AN0_AN0              (0x1)

+#define MCF_GPIO_PANPAR_PANPAR1              (0x2)

+#define MCF_GPIO_PANPAR_AN1_GPIO             (0)

+#define MCF_GPIO_PANPAR_AN1_AN1              (0x2)

+#define MCF_GPIO_PANPAR_PANPAR2              (0x4)

+#define MCF_GPIO_PANPAR_AN2_GPIO             (0)

+#define MCF_GPIO_PANPAR_AN2_AN2              (0x4)

+#define MCF_GPIO_PANPAR_PANPAR3              (0x8)

+#define MCF_GPIO_PANPAR_AN3_GPIO             (0)

+#define MCF_GPIO_PANPAR_AN3_AN3              (0x8)

+#define MCF_GPIO_PANPAR_PANPAR4              (0x10)

+#define MCF_GPIO_PANPAR_AN4_GPIO             (0)

+#define MCF_GPIO_PANPAR_AN4_AN4              (0x10)

+#define MCF_GPIO_PANPAR_PANPAR5              (0x20)

+#define MCF_GPIO_PANPAR_AN5_GPIO             (0)

+#define MCF_GPIO_PANPAR_AN5_AN5              (0x20)

+#define MCF_GPIO_PANPAR_PANPAR6              (0x40)

+#define MCF_GPIO_PANPAR_AN6_GPIO             (0)

+#define MCF_GPIO_PANPAR_AN6_AN6              (0x40)

+#define MCF_GPIO_PANPAR_PANPAR7              (0x80)

+#define MCF_GPIO_PANPAR_AN7_GPIO             (0)

+#define MCF_GPIO_PANPAR_AN7_AN7              (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_PORTAS */

+#define MCF_GPIO_PORTAS_PORTAS0              (0x1)

+#define MCF_GPIO_PORTAS_PORTAS1              (0x2)

+#define MCF_GPIO_PORTAS_PORTAS2              (0x4)

+#define MCF_GPIO_PORTAS_PORTAS3              (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_DDRAS */

+#define MCF_GPIO_DDRAS_DDRAS0                (0x1)

+#define MCF_GPIO_DDRAS_DDRAS1                (0x2)

+#define MCF_GPIO_DDRAS_DDRAS2                (0x4)

+#define MCF_GPIO_DDRAS_DDRAS3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_SETAS */

+#define MCF_GPIO_SETAS_SETAS0                (0x1)

+#define MCF_GPIO_SETAS_SETAS1                (0x2)

+#define MCF_GPIO_SETAS_SETAS2                (0x4)

+#define MCF_GPIO_SETAS_SETAS3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_CLRAS */

+#define MCF_GPIO_CLRAS_CLRAS0                (0x1)

+#define MCF_GPIO_CLRAS_CLRAS1                (0x2)

+#define MCF_GPIO_CLRAS_CLRAS2                (0x4)

+#define MCF_GPIO_CLRAS_CLRAS3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PASPAR */

+#define MCF_GPIO_PASPAR_PASPAR0(x)           (((x)&0x3)<<0)

+#define MCF_GPIO_PASPAR_SCL_GPIO             (0)

+#define MCF_GPIO_PASPAR_SCL_SCL              (0x1)

+#define MCF_GPIO_PASPAR_SCL_CANTX            (0x2)

+#define MCF_GPIO_PASPAR_SCL_UTXD2            (0x3)

+#define MCF_GPIO_PASPAR_PASPAR1(x)           (((x)&0x3)<<0x2)

+#define MCF_GPIO_PASPAR_SDA_GPIO             (0)

+#define MCF_GPIO_PASPAR_SDA_SDA              (0x4)

+#define MCF_GPIO_PASPAR_SDA_CANRX            (0x8)

+#define MCF_GPIO_PASPAR_SDA_URXD2            (0xC)

+#define MCF_GPIO_PASPAR_PASPAR2(x)           (((x)&0x3)<<0x4)

+#define MCF_GPIO_PASPAR_SYNCB_GPIO           (0)

+#define MCF_GPIO_PASPAR_SYNCB_SYNCB          (0x10)

+#define MCF_GPIO_PASPAR_SYNCB_CANTX          (0x20)

+#define MCF_GPIO_PASPAR_SYNCB_FEC_MDC        (0x30)

+#define MCF_GPIO_PASPAR_PASPAR3(x)           (((x)&0x3)<<0x6)

+#define MCF_GPIO_PASPAR_SYNCA_GPIO           (0)

+#define MCF_GPIO_PASPAR_SYNCA_SYNCA          (0x40)

+#define MCF_GPIO_PASPAR_SYNCA_CANRX          (0x80)

+#define MCF_GPIO_PASPAR_SYNC_FEC_MDIO        (0xC0)

+

+/* Bit definitions and macros for MCF_GPIO_PORTQS */

+#define MCF_GPIO_PORTQS_PORTQS0              (0x1)

+#define MCF_GPIO_PORTQS_PORTQS1              (0x2)

+#define MCF_GPIO_PORTQS_PORTQS2              (0x4)

+#define MCF_GPIO_PORTQS_PORTQS3              (0x8)

+#define MCF_GPIO_PORTQS_PORTQS4              (0x10)

+#define MCF_GPIO_PORTQS_PORTQS5              (0x20)

+#define MCF_GPIO_PORTQS_PORTQS6              (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_DDRQS */

+#define MCF_GPIO_DDRQS_DDRQS0                (0x1)

+#define MCF_GPIO_DDRQS_DDRQS1                (0x2)

+#define MCF_GPIO_DDRQS_DDRQS2                (0x4)

+#define MCF_GPIO_DDRQS_DDRQS3                (0x8)

+#define MCF_GPIO_DDRQS_DDRQS4                (0x10)

+#define MCF_GPIO_DDRQS_DDRQS5                (0x20)

+#define MCF_GPIO_DDRQS_DDRQS6                (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_SETQS */

+#define MCF_GPIO_SETQS_SETQS0                (0x1)

+#define MCF_GPIO_SETQS_SETQS1                (0x2)

+#define MCF_GPIO_SETQS_SETQS2                (0x4)

+#define MCF_GPIO_SETQS_SETQS3                (0x8)

+#define MCF_GPIO_SETQS_SETQS4                (0x10)

+#define MCF_GPIO_SETQS_SETQS5                (0x20)

+#define MCF_GPIO_SETQS_SETQS6                (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_CLRQS */

+#define MCF_GPIO_CLRQS_CLRQS0                (0x1)

+#define MCF_GPIO_CLRQS_CLRQS1                (0x2)

+#define MCF_GPIO_CLRQS_CLRQS2                (0x4)

+#define MCF_GPIO_CLRQS_CLRQS3                (0x8)

+#define MCF_GPIO_CLRQS_CLRQS4                (0x10)

+#define MCF_GPIO_CLRQS_CLRQS5                (0x20)

+#define MCF_GPIO_CLRQS_CLRQS6                (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_PQSPAR */

+#define MCF_GPIO_PQSPAR_PQSPAR0(x)           (((x)&0x3)<<0)

+#define MCF_GPIO_PQSPAR_QSPI_DOUT_GPIO       (0)

+#define MCF_GPIO_PQSPAR_QSPI_DOUT_DOUT       (0x1)

+#define MCF_GPIO_PQSPAR_QSPI_DOUT_CANTX      (0x2)

+#define MCF_GPIO_PQSPAR_QSPI_DOUT_UTXD1      (0x3)

+#define MCF_GPIO_PQSPAR_PQSPAR1(x)           (((x)&0x3)<<0x2)

+#define MCF_GPIO_PQSPAR_QSPI_DIN_GPIO        (0)

+#define MCF_GPIO_PQSPAR_QSPI_DIN_DIN         (0x4)

+#define MCF_GPIO_PQSPAR_QSPI_DIN_CANRX       (0x8)

+#define MCF_GPIO_PQSPAR_QSPI_DIN_URXD1       (0xC)

+#define MCF_GPIO_PQSPAR_PQSPAR2(x)           (((x)&0x3)<<0x4)

+#define MCF_GPIO_PQSPAR_QSPI_CLK_GPIO        (0)

+#define MCF_GPIO_PQSPAR_QSPI_CLK_CLK         (0x10)

+#define MCF_GPIO_PQSPAR_QSPI_CLK_SCL         (0x20)

+#define MCF_GPIO_PQSPAR_QSPI_CLK_URTS1       (0x30)

+#define MCF_GPIO_PQSPAR_PQSPAR3(x)           (((x)&0x3)<<0x6)

+#define MCF_GPIO_PQSPAR_QSPI_CS0_GPIO        (0)

+#define MCF_GPIO_PQSPAR_QSPI_CS0_CS0         (0x40)

+#define MCF_GPIO_PQSPAR_QSPI_CS0_SDA         (0x80)

+#define MCF_GPIO_PQSPAR_QSPI_CS0_UCTS1       (0xC0)

+#define MCF_GPIO_PQSPAR_PQSPAR4(x)           (((x)&0x3)<<0x8)

+#define MCF_GPIO_PQSPAR_QSPI_CS1_GPIO        (0)

+#define MCF_GPIO_PQSPAR_QSPI_CS1_CS1         (0x100)

+#define MCF_GPIO_PQSPAR_QSPI_CS1_FEC_TXEN    (0x300)

+#define MCF_GPIO_PQSPAR_PQSPAR5(x)           (((x)&0x3)<<0xA)

+#define MCF_GPIO_PQSPAR_QSPI_CS2_GPIO        (0)

+#define MCF_GPIO_PQSPAR_QSPI_CS2_CS2         (0x400)

+#define MCF_GPIO_PQSPAR_QSPI_CS2_FEC_TXCLK   (0xC00)

+#define MCF_GPIO_PQSPAR_PQSPAR6(x)           (((x)&0x3)<<0xC)

+#define MCF_GPIO_PQSPAR_QSPI_CS3_GPIO        (0)

+#define MCF_GPIO_PQSPAR_QSPI_CS3_CS3         (0x1000)

+#define MCF_GPIO_PQSPAR_QSPI_CS3_SYNCA       (0x2000)

+#define MCF_GPIO_PQSPAR_QSPI_CS3_SYNCB       (0x3000)

+

+/* Bit definitions and macros for MCF_GPIO_PORTTA */

+#define MCF_GPIO_PORTTA_PORTTA0              (0x1)

+#define MCF_GPIO_PORTTA_PORTTA1              (0x2)

+#define MCF_GPIO_PORTTA_PORTTA2              (0x4)

+#define MCF_GPIO_PORTTA_PORTTA3              (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_DDRTA */

+#define MCF_GPIO_DDRTA_DDRTA0                (0x1)

+#define MCF_GPIO_DDRTA_DDRTA1                (0x2)

+#define MCF_GPIO_DDRTA_DDRTA2                (0x4)

+#define MCF_GPIO_DDRTA_DDRTA3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_SETTA */

+#define MCF_GPIO_SETTA_SETTA0                (0x1)

+#define MCF_GPIO_SETTA_SETTA1                (0x2)

+#define MCF_GPIO_SETTA_SETTA2                (0x4)

+#define MCF_GPIO_SETTA_SETTA3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_CLRTA */

+#define MCF_GPIO_CLRTA_CLRTA0                (0x1)

+#define MCF_GPIO_CLRTA_CLRTA1                (0x2)

+#define MCF_GPIO_CLRTA_CLRTA2                (0x4)

+#define MCF_GPIO_CLRTA_CLRTA3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PTAPAR */

+#define MCF_GPIO_PTAPAR_PTAPAR0(x)           (((x)&0x3)<<0)

+#define MCF_GPIO_PTAPAR_GPT0_GPIO            (0)

+#define MCF_GPIO_PTAPAR_GPT0_GPT0            (0x1)

+#define MCF_GPIO_PTAPAR_GPT0_FEC_TXER        (0x2)

+#define MCF_GPIO_PTAPAR_GPT0_PWM1            (0x3)

+#define MCF_GPIO_PTAPAR_PTAPAR1(x)           (((x)&0x3)<<0x2)

+#define MCF_GPIO_PTAPAR_GPT1_GPIO            (0)

+#define MCF_GPIO_PTAPAR_GPT1_GPT1            (0x4)

+#define MCF_GPIO_PTAPAR_GPT1_FEC_TXD1        (0x8)

+#define MCF_GPIO_PTAPAR_GPT1_PWM3            (0xC)

+#define MCF_GPIO_PTAPAR_PTAPAR2(x)           (((x)&0x3)<<0x4)

+#define MCF_GPIO_PTAPAR_GPT2_GPIO            (0)

+#define MCF_GPIO_PTAPAR_GPT2_GPT2            (0x10)

+#define MCF_GPIO_PTAPAR_GPT2_FEC_TXD2        (0x20)

+#define MCF_GPIO_PTAPAR_GPT2_PWM5            (0x30)

+#define MCF_GPIO_PTAPAR_PTAPAR3(x)           (((x)&0x3)<<0x6)

+#define MCF_GPIO_PTAPAR_GPT3_GPIO            (0)

+#define MCF_GPIO_PTAPAR_GPT3_GPT3            (0x40)

+#define MCF_GPIO_PTAPAR_GPT3_FEC_TXD3        (0x80)

+#define MCF_GPIO_PTAPAR_GPT3_PWM7            (0xC0)

+

+/* Bit definitions and macros for MCF_GPIO_PORTTC */

+#define MCF_GPIO_PORTTC_PORTTC0              (0x1)

+#define MCF_GPIO_PORTTC_PORTTC1              (0x2)

+#define MCF_GPIO_PORTTC_PORTTC2              (0x4)

+#define MCF_GPIO_PORTTC_PORTTC3              (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_DDRTC */

+#define MCF_GPIO_DDRTC_DDRTC0                (0x1)

+#define MCF_GPIO_DDRTC_DDRTC1                (0x2)

+#define MCF_GPIO_DDRTC_DDRTC2                (0x4)

+#define MCF_GPIO_DDRTC_DDRTC3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_SETTC */

+#define MCF_GPIO_SETTC_SETTC0                (0x1)

+#define MCF_GPIO_SETTC_SETTC1                (0x2)

+#define MCF_GPIO_SETTC_SETTC2                (0x4)

+#define MCF_GPIO_SETTC_SETTC3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_CLRTC */

+#define MCF_GPIO_CLRTC_CLRTC0                (0x1)

+#define MCF_GPIO_CLRTC_CLRTC1                (0x2)

+#define MCF_GPIO_CLRTC_CLRTC2                (0x4)

+#define MCF_GPIO_CLRTC_CLRTC3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PTCPAR */

+#define MCF_GPIO_PTCPAR_PTCPAR0(x)           (((x)&0x3)<<0)

+#define MCF_GPIO_PTCPAR_DTIN0_GPIO           (0)

+#define MCF_GPIO_PTCPAR_DTIN0_DTIN0          (0x1)

+#define MCF_GPIO_PTCPAR_DTIN0_DTOUT0         (0x2)

+#define MCF_GPIO_PTCPAR_DTIN0_PWM0           (0x3)

+#define MCF_GPIO_PTCPAR_PTCPAR1(x)           (((x)&0x3)<<0x2)

+#define MCF_GPIO_PTCPAR_DTIN1_GPIO           (0)

+#define MCF_GPIO_PTCPAR_DTIN1_DTIN1          (0x4)

+#define MCF_GPIO_PTCPAR_DTIN1_DTOUT1         (0x8)

+#define MCF_GPIO_PTCPAR_DTIN1_PWM2           (0xC)

+#define MCF_GPIO_PTCPAR_PTCPAR2(x)           (((x)&0x3)<<0x4)

+#define MCF_GPIO_PTCPAR_DTIN2_GPIO           (0)

+#define MCF_GPIO_PTCPAR_DTIN2_DTIN2          (0x10)

+#define MCF_GPIO_PTCPAR_DTIN2_DTOUT2         (0x20)

+#define MCF_GPIO_PTCPAR_DTIN2_PWM4           (0x30)

+#define MCF_GPIO_PTCPAR_PTCPAR3(x)           (((x)&0x3)<<0x6)

+#define MCF_GPIO_PTCPAR_DTIN3_GPIO           (0)

+#define MCF_GPIO_PTCPAR_DTIN3_DTIN3          (0x40)

+#define MCF_GPIO_PTCPAR_DTIN3_DTOUT3         (0x80)

+#define MCF_GPIO_PTCPAR_DTIN3_PWM6           (0xC0)

+

+/* Bit definitions and macros for MCF_GPIO_PORTTD */

+#define MCF_GPIO_PORTTD_PORTTD0              (0x1)

+#define MCF_GPIO_PORTTD_PORTTD1              (0x2)

+#define MCF_GPIO_PORTTD_PORTTD2              (0x4)

+#define MCF_GPIO_PORTTD_PORTTD3              (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_DDRTD */

+#define MCF_GPIO_DDRTD_DDRTD0                (0x1)

+#define MCF_GPIO_DDRTD_DDRTD1                (0x2)

+#define MCF_GPIO_DDRTD_DDRTD2                (0x4)

+#define MCF_GPIO_DDRTD_DDRTD3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_SETTD */

+#define MCF_GPIO_SETTD_SETTD0                (0x1)

+#define MCF_GPIO_SETTD_SETTD1                (0x2)

+#define MCF_GPIO_SETTD_SETTD2                (0x4)

+#define MCF_GPIO_SETTD_SETTD3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_CLRTD */

+#define MCF_GPIO_CLRTD_CLRTD0                (0x1)

+#define MCF_GPIO_CLRTD_CLRTD1                (0x2)

+#define MCF_GPIO_CLRTD_CLRTD2                (0x4)

+#define MCF_GPIO_CLRTD_CLRTD3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PTDPAR */

+#define MCF_GPIO_PTDPAR_PTDPAR0              (0x1)

+#define MCF_GPIO_PTDPAR_PWM1_GPIO            (0)

+#define MCF_GPIO_PTDPAR_PWM1_PWM1            (0x1)

+#define MCF_GPIO_PTDPAR_PTDPAR1              (0x2)

+#define MCF_GPIO_PTDPAR_PWM3_GPIO            (0)

+#define MCF_GPIO_PTDPAR_PWM3_PWM3            (0x2)

+#define MCF_GPIO_PTDPAR_PTDPAR2              (0x4)

+#define MCF_GPIO_PTDPAR_PWM5_GPIO            (0)

+#define MCF_GPIO_PTDPAR_PWM5_PWM5            (0x4)

+#define MCF_GPIO_PTDPAR_PTDPAR3              (0x8)

+#define MCF_GPIO_PTDPAR_PWM7_GPIO            (0)

+#define MCF_GPIO_PTDPAR_PWM7_PWM7            (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PORTUA */

+#define MCF_GPIO_PORTUA_PORTUA0              (0x1)

+#define MCF_GPIO_PORTUA_PORTUA1              (0x2)

+#define MCF_GPIO_PORTUA_PORTUA2              (0x4)

+#define MCF_GPIO_PORTUA_PORTUA3              (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_DDRUA */

+#define MCF_GPIO_DDRUA_DDRUA0                (0x1)

+#define MCF_GPIO_DDRUA_DDRUA1                (0x2)

+#define MCF_GPIO_DDRUA_DDRUA2                (0x4)

+#define MCF_GPIO_DDRUA_DDRUA3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_SETUA */

+#define MCF_GPIO_SETUA_SETUA0                (0x1)

+#define MCF_GPIO_SETUA_SETUA1                (0x2)

+#define MCF_GPIO_SETUA_SETUA2                (0x4)

+#define MCF_GPIO_SETUA_SETUA3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_CLRUA */

+#define MCF_GPIO_CLRUA_CLRUA0                (0x1)

+#define MCF_GPIO_CLRUA_CLRUA1                (0x2)

+#define MCF_GPIO_CLRUA_CLRUA2                (0x4)

+#define MCF_GPIO_CLRUA_CLRUA3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PUAPAR */

+#define MCF_GPIO_PUAPAR_PUAPAR0(x)           (((x)&0x3)<<0)

+#define MCF_GPIO_PUAPAR_UTXD0_GPIO           (0)

+#define MCF_GPIO_PUAPAR_UTXD0_UTXD0          (0x1)

+#define MCF_GPIO_PUAPAR_UTXD0_FEC_CRS        (0x3)

+#define MCF_GPIO_PUAPAR_PUAPAR1(x)           (((x)&0x3)<<0x2)

+#define MCF_GPIO_PUAPAR_URXD0_GPIO           (0)

+#define MCF_GPIO_PUAPAR_URXD0_URXD0          (0x4)

+#define MCF_GPIO_PUAPAR_URXD0_FEC_RXD0       (0xC)

+#define MCF_GPIO_PUAPAR_PUAPAR2(x)           (((x)&0x3)<<0x4)

+#define MCF_GPIO_PUAPAR_URTS0_GPIO           (0)

+#define MCF_GPIO_PUAPAR_URTS0_URTS0          (0x10)

+#define MCF_GPIO_PUAPAR_URTS0_CANTX          (0x20)

+#define MCF_GPIO_PUAPAR_URTS0_FEC_RXDV       (0x30)

+#define MCF_GPIO_PUAPAR_PUAPAR3(x)           (((x)&0x3)<<0x6)

+#define MCF_GPIO_PUAPAR_UCTS0_GPIO           (0)

+#define MCF_GPIO_PUAPAR_UCTS0_UCTS0          (0x40)

+#define MCF_GPIO_PUAPAR_UCTS0_CANRX          (0x80)

+#define MCF_GPIO_PUAPAR_UCTS0_FEC_RXCLK      (0xC0)

+

+/* Bit definitions and macros for MCF_GPIO_PORTUB */

+#define MCF_GPIO_PORTUB_PORTUB0              (0x1)

+#define MCF_GPIO_PORTUB_PORTUB1              (0x2)

+#define MCF_GPIO_PORTUB_PORTUB2              (0x4)

+#define MCF_GPIO_PORTUB_PORTUB3              (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_DDRUB */

+#define MCF_GPIO_DDRUB_DDRUB0                (0x1)

+#define MCF_GPIO_DDRUB_DDRUB1                (0x2)

+#define MCF_GPIO_DDRUB_DDRUB2                (0x4)

+#define MCF_GPIO_DDRUB_DDRUB3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_SETUB */

+#define MCF_GPIO_SETUB_SETUB0                (0x1)

+#define MCF_GPIO_SETUB_SETUB1                (0x2)

+#define MCF_GPIO_SETUB_SETUB2                (0x4)

+#define MCF_GPIO_SETUB_SETUB3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_CLRUB */

+#define MCF_GPIO_CLRUB_CLRUB0                (0x1)

+#define MCF_GPIO_CLRUB_CLRUB1                (0x2)

+#define MCF_GPIO_CLRUB_CLRUB2                (0x4)

+#define MCF_GPIO_CLRUB_CLRUB3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PUBPAR */

+#define MCF_GPIO_PUBPAR_PUBPAR0(x)           (((x)&0x3)<<0)

+#define MCF_GPIO_PUBPAR_UTXD1_GPIO           (0)

+#define MCF_GPIO_PUBPAR_UTXD1_UTXD1          (0x1)

+#define MCF_GPIO_PUBPAR_UTXD1_FEC_COL        (0x3)

+#define MCF_GPIO_PUBPAR_PUBPAR1(x)           (((x)&0x3)<<0x2)

+#define MCF_GPIO_PUBPAR_URXD1_GPIO           (0)

+#define MCF_GPIO_PUBPAR_URXD1_URXD1          (0x4)

+#define MCF_GPIO_PUBPAR_URXD1_FEC_TXD0       (0xC)

+#define MCF_GPIO_PUBPAR_PUBPAR2(x)           (((x)&0x3)<<0x4)

+#define MCF_GPIO_PUBPAR_URTS1_GPIO           (0)

+#define MCF_GPIO_PUBPAR_URTS1_URTS1          (0x10)

+#define MCF_GPIO_PUBPAR_URTS1_SYNCB          (0x20)

+#define MCF_GPIO_PUBPAR_URTS1_UTXD2          (0x30)

+#define MCF_GPIO_PUBPAR_PUBPAR3(x)           (((x)&0x3)<<0x6)

+#define MCF_GPIO_PUBPAR_UCTS1_GPIO           (0)

+#define MCF_GPIO_PUBPAR_UCTS1_UCTS1          (0x40)

+#define MCF_GPIO_PUBPAR_UCTS1_SYNCA          (0x80)

+#define MCF_GPIO_PUBPAR_UCTS1_URXD2          (0xC0)

+

+/* Bit definitions and macros for MCF_GPIO_PORTUC */

+#define MCF_GPIO_PORTUC_PORTUC0              (0x1)

+#define MCF_GPIO_PORTUC_PORTUC1              (0x2)

+#define MCF_GPIO_PORTUC_PORTUC2              (0x4)

+#define MCF_GPIO_PORTUC_PORTUC3              (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_DDRUC */

+#define MCF_GPIO_DDRUC_DDRUC0                (0x1)

+#define MCF_GPIO_DDRUC_DDRUC1                (0x2)

+#define MCF_GPIO_DDRUC_DDRUC2                (0x4)

+#define MCF_GPIO_DDRUC_DDRUC3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_SETUC */

+#define MCF_GPIO_SETUC_SETUC0                (0x1)

+#define MCF_GPIO_SETUC_SETUC1                (0x2)

+#define MCF_GPIO_SETUC_SETUC2                (0x4)

+#define MCF_GPIO_SETUC_SETUC3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_CLRUC */

+#define MCF_GPIO_CLRUC_CLRUC0                (0x1)

+#define MCF_GPIO_CLRUC_CLRUC1                (0x2)

+#define MCF_GPIO_CLRUC_CLRUC2                (0x4)

+#define MCF_GPIO_CLRUC_CLRUC3                (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PUCPAR */

+#define MCF_GPIO_PUCPAR_PUCPAR0              (0x1)

+#define MCF_GPIO_PUCPAR_UTXD2_GPIO           (0)

+#define MCF_GPIO_PUCPAR_UTXD2_UTXD2          (0x1)

+#define MCF_GPIO_PUCPAR_PUCPAR1              (0x2)

+#define MCF_GPIO_PUCPAR_URXD2_GPIO           (0)

+#define MCF_GPIO_PUCPAR_URXD2_URXD2          (0x2)

+#define MCF_GPIO_PUCPAR_PUCPAR2              (0x4)

+#define MCF_GPIO_PUCPAR_URTS2_GPIO           (0)

+#define MCF_GPIO_PUCPAR_URTS2_URTS2          (0x4)

+#define MCF_GPIO_PUCPAR_PUCPAR3              (0x8)

+#define MCF_GPIO_PUCPAR_UCTS2_GPIO           (0)

+#define MCF_GPIO_PUCPAR_UCTS2_UCTS2          (0x8)

+

+/* Bit definitions and macros for MCF_GPIO_PORTDD */

+#define MCF_GPIO_PORTDD_PORTDD0              (0x1)

+#define MCF_GPIO_PORTDD_PORTDD1              (0x2)

+#define MCF_GPIO_PORTDD_PORTDD2              (0x4)

+#define MCF_GPIO_PORTDD_PORTDD3              (0x8)

+#define MCF_GPIO_PORTDD_PORTDD4              (0x10)

+#define MCF_GPIO_PORTDD_PORTDD5              (0x20)

+#define MCF_GPIO_PORTDD_PORTDD6              (0x40)

+#define MCF_GPIO_PORTDD_PORTDD7              (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_DDRDD */

+#define MCF_GPIO_DDRDD_DDRDD0                (0x1)

+#define MCF_GPIO_DDRDD_DDRDD1                (0x2)

+#define MCF_GPIO_DDRDD_DDRDD2                (0x4)

+#define MCF_GPIO_DDRDD_DDRDD3                (0x8)

+#define MCF_GPIO_DDRDD_DDRDD4                (0x10)

+#define MCF_GPIO_DDRDD_DDRDD5                (0x20)

+#define MCF_GPIO_DDRDD_DDRDD6                (0x40)

+#define MCF_GPIO_DDRDD_DDRDD7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_SETDD */

+#define MCF_GPIO_SETDD_SETDD0                (0x1)

+#define MCF_GPIO_SETDD_SETDD1                (0x2)

+#define MCF_GPIO_SETDD_SETDD2                (0x4)

+#define MCF_GPIO_SETDD_SETDD3                (0x8)

+#define MCF_GPIO_SETDD_SETDD4                (0x10)

+#define MCF_GPIO_SETDD_SETDD5                (0x20)

+#define MCF_GPIO_SETDD_SETDD6                (0x40)

+#define MCF_GPIO_SETDD_SETDD7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_CLRDD */

+#define MCF_GPIO_CLRDD_CLRDD0                (0x1)

+#define MCF_GPIO_CLRDD_CLRDD1                (0x2)

+#define MCF_GPIO_CLRDD_CLRDD2                (0x4)

+#define MCF_GPIO_CLRDD_CLRDD3                (0x8)

+#define MCF_GPIO_CLRDD_CLRDD4                (0x10)

+#define MCF_GPIO_CLRDD_CLRDD5                (0x20)

+#define MCF_GPIO_CLRDD_CLRDD6                (0x40)

+#define MCF_GPIO_CLRDD_CLRDD7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_PDDPAR */

+#define MCF_GPIO_PDDPAR_PDDPAR0              (0x1)

+#define MCF_GPIO_PDDPAR_PDD0_GPIO            (0)

+#define MCF_GPIO_PDDPAR_PDD0_PST0            (0x1)

+#define MCF_GPIO_PDDPAR_PDDPAR1              (0x2)

+#define MCF_GPIO_PDDPAR_PDD1_GPIO            (0)

+#define MCF_GPIO_PDDPAR_PDD1_PST1            (0x2)

+#define MCF_GPIO_PDDPAR_PDDPAR2              (0x4)

+#define MCF_GPIO_PDDPAR_PDD2_GPIO            (0)

+#define MCF_GPIO_PDDPAR_PDD2_PST2            (0x4)

+#define MCF_GPIO_PDDPAR_PDDPAR3              (0x8)

+#define MCF_GPIO_PDDPAR_PDD3_GPIO            (0)

+#define MCF_GPIO_PDDPAR_PDD3_PST3            (0x8)

+#define MCF_GPIO_PDDPAR_PDDPAR4              (0x10)

+#define MCF_GPIO_PDDPAR_PDD4_GPIO            (0)

+#define MCF_GPIO_PDDPAR_PDD4_DDATA0          (0x10)

+#define MCF_GPIO_PDDPAR_PDDPAR5              (0x20)

+#define MCF_GPIO_PDDPAR_PDD5_GPIO            (0)

+#define MCF_GPIO_PDDPAR_PDD5_DDATA1          (0x20)

+#define MCF_GPIO_PDDPAR_PDDPAR6              (0x40)

+#define MCF_GPIO_PDDPAR_PDD6_GPIO            (0)

+#define MCF_GPIO_PDDPAR_PDD6_DDATA2          (0x40)

+#define MCF_GPIO_PDDPAR_PDDPAR7              (0x80)

+#define MCF_GPIO_PDDPAR_PDD7_GPIO            (0)

+#define MCF_GPIO_PDDPAR_PDD7_DDATA3          (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_PORTLD */

+#define MCF_GPIO_PORTLD_PORTLD0              (0x1)

+#define MCF_GPIO_PORTLD_PORTLD1              (0x2)

+#define MCF_GPIO_PORTLD_PORTLD2              (0x4)

+#define MCF_GPIO_PORTLD_PORTLD3              (0x8)

+#define MCF_GPIO_PORTLD_PORTLD4              (0x10)

+#define MCF_GPIO_PORTLD_PORTLD5              (0x20)

+#define MCF_GPIO_PORTLD_PORTLD6              (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_DDRLD */

+#define MCF_GPIO_DDRLD_DDRLD0                (0x1)

+#define MCF_GPIO_DDRLD_DDRLD1                (0x2)

+#define MCF_GPIO_DDRLD_DDRLD2                (0x4)

+#define MCF_GPIO_DDRLD_DDRLD3                (0x8)

+#define MCF_GPIO_DDRLD_DDRLD4                (0x10)

+#define MCF_GPIO_DDRLD_DDRLD5                (0x20)

+#define MCF_GPIO_DDRLD_DDRLD6                (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_SETLD */

+#define MCF_GPIO_SETLD_SETLD0                (0x1)

+#define MCF_GPIO_SETLD_SETLD1                (0x2)

+#define MCF_GPIO_SETLD_SETLD2                (0x4)

+#define MCF_GPIO_SETLD_SETLD3                (0x8)

+#define MCF_GPIO_SETLD_SETLD4                (0x10)

+#define MCF_GPIO_SETLD_SETLD5                (0x20)

+#define MCF_GPIO_SETLD_SETLD6                (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_CLRLD */

+#define MCF_GPIO_CLRLD_CLRLD0                (0x1)

+#define MCF_GPIO_CLRLD_CLRLD1                (0x2)

+#define MCF_GPIO_CLRLD_CLRLD2                (0x4)

+#define MCF_GPIO_CLRLD_CLRLD3                (0x8)

+#define MCF_GPIO_CLRLD_CLRLD4                (0x10)

+#define MCF_GPIO_CLRLD_CLRLD5                (0x20)

+#define MCF_GPIO_CLRLD_CLRLD6                (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_PLDPAR */

+#define MCF_GPIO_PLDPAR_PLDPAR0              (0x1)

+#define MCF_GPIO_PLDPAR_ACTLED_GPIO          (0)

+#define MCF_GPIO_PLDPAR_ACTLED_ACTLED        (0x1)

+#define MCF_GPIO_PLDPAR_PLDPAR1              (0x2)

+#define MCF_GPIO_PLDPAR_LINKLED_GPIO         (0)

+#define MCF_GPIO_PLDPAR_LINKLED_LINKLED      (0x2)

+#define MCF_GPIO_PLDPAR_PLDPAR2              (0x4)

+#define MCF_GPIO_PLDPAR_SPDLED_GPIO          (0)

+#define MCF_GPIO_PLDPAR_SPDLED_SPDLED        (0x4)

+#define MCF_GPIO_PLDPAR_PLDPAR3              (0x8)

+#define MCF_GPIO_PLDPAR_DUPLED_GPIO          (0)

+#define MCF_GPIO_PLDPAR_DUPLED_DUPLED        (0x8)

+#define MCF_GPIO_PLDPAR_PLDPAR4              (0x10)

+#define MCF_GPIO_PLDPAR_COLLED_GPIO          (0)

+#define MCF_GPIO_PLDPAR_COLLED_COLLED        (0x10)

+#define MCF_GPIO_PLDPAR_PLDPAR5              (0x20)

+#define MCF_GPIO_PLDPAR_RXLED_GPIO           (0)

+#define MCF_GPIO_PLDPAR_RXLED_RXLED          (0x20)

+#define MCF_GPIO_PLDPAR_PLDPAR6              (0x40)

+#define MCF_GPIO_PLDPAR_TXLED_GPIO           (0)

+#define MCF_GPIO_PLDPAR_TXLED_TXLED          (0x40)

+

+/* Bit definitions and macros for MCF_GPIO_PORTGP */

+#define MCF_GPIO_PORTGP_PORTGP0              (0x1)

+#define MCF_GPIO_PORTGP_PORTGP1              (0x2)

+#define MCF_GPIO_PORTGP_PORTGP2              (0x4)

+#define MCF_GPIO_PORTGP_PORTGP3              (0x8)

+#define MCF_GPIO_PORTGP_PORTGP4              (0x10)

+#define MCF_GPIO_PORTGP_PORTGP5              (0x20)

+#define MCF_GPIO_PORTGP_PORTGP6              (0x40)

+#define MCF_GPIO_PORTGP_PORTGP7              (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_DDRGP */

+#define MCF_GPIO_DDRGP_DDRGP0                (0x1)

+#define MCF_GPIO_DDRGP_DDRGP1                (0x2)

+#define MCF_GPIO_DDRGP_DDRGP2                (0x4)

+#define MCF_GPIO_DDRGP_DDRGP3                (0x8)

+#define MCF_GPIO_DDRGP_DDRGP4                (0x10)

+#define MCF_GPIO_DDRGP_DDRGP5                (0x20)

+#define MCF_GPIO_DDRGP_DDRGP6                (0x40)

+#define MCF_GPIO_DDRGP_DDRGP7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_SETGP */

+#define MCF_GPIO_SETGP_SETGP0                (0x1)

+#define MCF_GPIO_SETGP_SETGP1                (0x2)

+#define MCF_GPIO_SETGP_SETGP2                (0x4)

+#define MCF_GPIO_SETGP_SETGP3                (0x8)

+#define MCF_GPIO_SETGP_SETGP4                (0x10)

+#define MCF_GPIO_SETGP_SETGP5                (0x20)

+#define MCF_GPIO_SETGP_SETGP6                (0x40)

+#define MCF_GPIO_SETGP_SETGP7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_CLRGP */

+#define MCF_GPIO_CLRGP_CLRGP0                (0x1)

+#define MCF_GPIO_CLRGP_CLRGP1                (0x2)

+#define MCF_GPIO_CLRGP_CLRGP2                (0x4)

+#define MCF_GPIO_CLRGP_CLRGP3                (0x8)

+#define MCF_GPIO_CLRGP_CLRGP4                (0x10)

+#define MCF_GPIO_CLRGP_CLRGP5                (0x20)

+#define MCF_GPIO_CLRGP_CLRGP6                (0x40)

+#define MCF_GPIO_CLRGP_CLRGP7                (0x80)

+

+/* Bit definitions and macros for MCF_GPIO_PGPPAR */

+#define MCF_GPIO_PGPPAR_PGPPAR0              (0x1)

+#define MCF_GPIO_PGPPAR_IRQ8_GPIO            (0)

+#define MCF_GPIO_PGPPAR_IRQ8_IRQ8            (0x1)

+#define MCF_GPIO_PGPPAR_PGPPAR1              (0x2)

+#define MCF_GPIO_PGPPAR_IRQ9_GPIO            (0)

+#define MCF_GPIO_PGPPAR_IRQ9_IRQ9            (0x2)

+#define MCF_GPIO_PGPPAR_PGPPAR2              (0x4)

+#define MCF_GPIO_PGPPAR_IRQ10_GPIO           (0)

+#define MCF_GPIO_PGPPAR_IRQ10_IRQ10          (0x4)

+#define MCF_GPIO_PGPPAR_PGPPAR3              (0x8)

+#define MCF_GPIO_PGPPAR_IRQ11_GPIO           (0)

+#define MCF_GPIO_PGPPAR_IRQ11_IRQ11          (0x8)

+#define MCF_GPIO_PGPPAR_PGPPAR4              (0x10)

+#define MCF_GPIO_PGPPAR_IRQ12_GPIO           (0)

+#define MCF_GPIO_PGPPAR_IRQ12_IRQ12          (0x10)

+#define MCF_GPIO_PGPPAR_PGPPAR5              (0x20)

+#define MCF_GPIO_PGPPAR_IRQ13_GPIO           (0)

+#define MCF_GPIO_PGPPAR_IRQ13_IRQ13          (0x20)

+#define MCF_GPIO_PGPPAR_PGPPAR6              (0x40)

+#define MCF_GPIO_PGPPAR_IRQ14_GPIO           (0)

+#define MCF_GPIO_PGPPAR_IRQ14_IRQ14          (0x40)

+#define MCF_GPIO_PGPPAR_PGPPAR7              (0x80)

+#define MCF_GPIO_PGPPAR_IRQ15_GPIO           (0)

+#define MCF_GPIO_PGPPAR_IRQ15_IRQ15          (0x80)

+

+

+#endif /* __MCF52235_GPIO_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GPTA.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GPTA.h
new file mode 100644
index 00000000..717943c7
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_GPTA.h
@@ -0,0 +1,198 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_GPTA_H__

+#define __MCF52235_GPTA_H__

+

+

+/*********************************************************************

+*

+* General Purpose Timer Module (GPT)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_GPTA_GPTIOS                      (*(vuint8 *)(&__IPSBAR[0x1A0000]))

+#define MCF_GPTA_GPTCFORC                    (*(vuint8 *)(&__IPSBAR[0x1A0001]))

+#define MCF_GPTA_GPTOC3M                     (*(vuint8 *)(&__IPSBAR[0x1A0002]))

+#define MCF_GPTA_GPTOC3D                     (*(vuint8 *)(&__IPSBAR[0x1A0003]))

+#define MCF_GPTA_GPTCNT                      (*(vuint16*)(&__IPSBAR[0x1A0004]))

+#define MCF_GPTA_GPTSCR1                     (*(vuint8 *)(&__IPSBAR[0x1A0006]))

+#define MCF_GPTA_GPTTOV                      (*(vuint8 *)(&__IPSBAR[0x1A0008]))

+#define MCF_GPTA_GPTCTL1                     (*(vuint8 *)(&__IPSBAR[0x1A0009]))

+#define MCF_GPTA_GPTCTL2                     (*(vuint8 *)(&__IPSBAR[0x1A000B]))

+#define MCF_GPTA_GPTIE                       (*(vuint8 *)(&__IPSBAR[0x1A000C]))

+#define MCF_GPTA_GPTSCR2                     (*(vuint8 *)(&__IPSBAR[0x1A000D]))

+#define MCF_GPTA_GPTFLG1                     (*(vuint8 *)(&__IPSBAR[0x1A000E]))

+#define MCF_GPTA_GPTFLG2                     (*(vuint8 *)(&__IPSBAR[0x1A000F]))

+#define MCF_GPTA_GPTC0                       (*(vuint16*)(&__IPSBAR[0x1A0010]))

+#define MCF_GPTA_GPTC1                       (*(vuint16*)(&__IPSBAR[0x1A0012]))

+#define MCF_GPTA_GPTC2                       (*(vuint16*)(&__IPSBAR[0x1A0014]))

+#define MCF_GPTA_GPTC3                       (*(vuint16*)(&__IPSBAR[0x1A0016]))

+#define MCF_GPTA_GPTPACTL                    (*(vuint8 *)(&__IPSBAR[0x1A0018]))

+#define MCF_GPTA_GPTPAFLG                    (*(vuint8 *)(&__IPSBAR[0x1A0019]))

+#define MCF_GPTA_GPTPACNT                    (*(vuint16*)(&__IPSBAR[0x1A001A]))

+#define MCF_GPTA_GPTPORT                     (*(vuint8 *)(&__IPSBAR[0x1A001D]))

+#define MCF_GPTA_GPTDDR                      (*(vuint8 *)(&__IPSBAR[0x1A001E]))

+#define MCF_GPTA_GPTC(x)                     (*(vuint16*)(&__IPSBAR[0x1A0010 + ((x)*0x2)]))

+

+

+/* Bit definitions and macros for MCF_GPTA_GPTIOS */

+#define MCF_GPTA_GPTIOS_IOS0                 (0x1)

+#define MCF_GPTA_GPTIOS_IOS1                 (0x2)

+#define MCF_GPTA_GPTIOS_IOS2                 (0x4)

+#define MCF_GPTA_GPTIOS_IOS3                 (0x8)

+

+/* Bit definitions and macros for MCF_GPTA_GPTCFORC */

+#define MCF_GPTA_GPTCFORC_FOC0               (0x1)

+#define MCF_GPTA_GPTCFORC_FOC1               (0x2)

+#define MCF_GPTA_GPTCFORC_FOC2               (0x4)

+#define MCF_GPTA_GPTCFORC_FOC3               (0x8)

+

+/* Bit definitions and macros for MCF_GPTA_GPTOC3M */

+#define MCF_GPTA_GPTOC3M_OC3M0               (0x1)

+#define MCF_GPTA_GPTOC3M_OC3M1               (0x2)

+#define MCF_GPTA_GPTOC3M_OC3M2               (0x4)

+#define MCF_GPTA_GPTOC3M_OC3M3               (0x8)

+

+/* Bit definitions and macros for MCF_GPTA_GPTOC3D */

+#define MCF_GPTA_GPTOC3D_OC3D0               (0x1)

+#define MCF_GPTA_GPTOC3D_OC3D1               (0x2)

+#define MCF_GPTA_GPTOC3D_OC3D2               (0x4)

+#define MCF_GPTA_GPTOC3D_OC3D3               (0x8)

+

+/* Bit definitions and macros for MCF_GPTA_GPTCNT */

+#define MCF_GPTA_GPTCNT_CNTR(x)              (((x)&0xFFFF)<<0)

+

+/* Bit definitions and macros for MCF_GPTA_GPTSCR1 */

+#define MCF_GPTA_GPTSCR1_TFFCA               (0x10)

+#define MCF_GPTA_GPTSCR1_GPTEN               (0x80)

+

+/* Bit definitions and macros for MCF_GPTA_GPTTOV */

+#define MCF_GPTA_GPTTOV_TOV0                 (0x1)

+#define MCF_GPTA_GPTTOV_TOV1                 (0x2)

+#define MCF_GPTA_GPTTOV_TOV2                 (0x4)

+#define MCF_GPTA_GPTTOV_TOV3                 (0x8)

+

+/* Bit definitions and macros for MCF_GPTA_GPTCTL1 */

+#define MCF_GPTA_GPTCTL1_OL0                 (0x1)

+#define MCF_GPTA_GPTCTL1_OM0                 (0x2)

+#define MCF_GPTA_GPTCTL1_OL1                 (0x4)

+#define MCF_GPTA_GPTCTL1_OM1                 (0x8)

+#define MCF_GPTA_GPTCTL1_OL2                 (0x10)

+#define MCF_GPTA_GPTCTL1_OM2                 (0x20)

+#define MCF_GPTA_GPTCTL1_OL3                 (0x40)

+#define MCF_GPTA_GPTCTL1_OM3                 (0x80)

+#define MCF_GPTA_GPTCTL1_OUTPUT0_NOTHING     (0)

+#define MCF_GPTA_GPTCTL1_OUTPUT0_TOGGLE      (0x1)

+#define MCF_GPTA_GPTCTL1_OUTPUT0_CLEAR       (0x2)

+#define MCF_GPTA_GPTCTL1_OUTPUT0_SET         (0x3)

+#define MCF_GPTA_GPTCTL1_OUTPUT1_NOTHING     (0)

+#define MCF_GPTA_GPTCTL1_OUTPUT1_TOGGLE      (0x4)

+#define MCF_GPTA_GPTCTL1_OUTPUT1_CLEAR       (0x8)

+#define MCF_GPTA_GPTCTL1_OUTPUT1_SET         (0xC)

+#define MCF_GPTA_GPTCTL1_OUTPUT2_NOTHING     (0)

+#define MCF_GPTA_GPTCTL1_OUTPUT2_TOGGLE      (0x10)

+#define MCF_GPTA_GPTCTL1_OUTPUT2_CLEAR       (0x20)

+#define MCF_GPTA_GPTCTL1_OUTPUT2_SET         (0x30)

+#define MCF_GPTA_GPTCTL1_OUTPUT3_NOTHING     (0)

+#define MCF_GPTA_GPTCTL1_OUTPUT3_TOGGLE      (0x40)

+#define MCF_GPTA_GPTCTL1_OUTPUT3_CLEAR       (0x80)

+#define MCF_GPTA_GPTCTL1_OUTPUT3_SET         (0xC0)

+

+/* Bit definitions and macros for MCF_GPTA_GPTCTL2 */

+#define MCF_GPTA_GPTCTL2_EDG0A               (0x1)

+#define MCF_GPTA_GPTCTL2_EDG0B               (0x2)

+#define MCF_GPTA_GPTCTL2_EDG1A               (0x4)

+#define MCF_GPTA_GPTCTL2_EDG1B               (0x8)

+#define MCF_GPTA_GPTCTL2_EDG2A               (0x10)

+#define MCF_GPTA_GPTCTL2_EDG2B               (0x20)

+#define MCF_GPTA_GPTCTL2_EDG3A               (0x40)

+#define MCF_GPTA_GPTCTL2_EDG3B               (0x80)

+#define MCF_GPTA_GPTCTL2_INPUT0_DISABLED     (0)

+#define MCF_GPTA_GPTCTL2_INPUT0_RISING       (0x1)

+#define MCF_GPTA_GPTCTL2_INPUT0_FALLING      (0x2)

+#define MCF_GPTA_GPTCTL2_INPUT0_ANY          (0x3)

+#define MCF_GPTA_GPTCTL2_INPUT1_DISABLED     (0)

+#define MCF_GPTA_GPTCTL2_INPUT1_RISING       (0x4)

+#define MCF_GPTA_GPTCTL2_INPUT1_FALLING      (0x8)

+#define MCF_GPTA_GPTCTL2_INPUT1_ANY          (0xC)

+#define MCF_GPTA_GPTCTL2_INPUT2_DISABLED     (0)

+#define MCF_GPTA_GPTCTL2_INPUT2_RISING       (0x10)

+#define MCF_GPTA_GPTCTL2_INPUT2_FALLING      (0x20)

+#define MCF_GPTA_GPTCTL2_INPUT2_ANY          (0x30)

+#define MCF_GPTA_GPTCTL2_INPUT3_DISABLED     (0)

+#define MCF_GPTA_GPTCTL2_INPUT3_RISING       (0x40)

+#define MCF_GPTA_GPTCTL2_INPUT3_FALLING      (0x80)

+#define MCF_GPTA_GPTCTL2_INPUT3_ANY          (0xC0)

+

+/* Bit definitions and macros for MCF_GPTA_GPTIE */

+#define MCF_GPTA_GPTIE_CI0                   (0x1)

+#define MCF_GPTA_GPTIE_CI1                   (0x2)

+#define MCF_GPTA_GPTIE_CI2                   (0x4)

+#define MCF_GPTA_GPTIE_CI3                   (0x8)

+

+/* Bit definitions and macros for MCF_GPTA_GPTSCR2 */

+#define MCF_GPTA_GPTSCR2_PR(x)               (((x)&0x7)<<0)

+#define MCF_GPTA_GPTSCR2_PR_1                (0)

+#define MCF_GPTA_GPTSCR2_PR_2                (0x1)

+#define MCF_GPTA_GPTSCR2_PR_4                (0x2)

+#define MCF_GPTA_GPTSCR2_PR_8                (0x3)

+#define MCF_GPTA_GPTSCR2_PR_16               (0x4)

+#define MCF_GPTA_GPTSCR2_PR_32               (0x5)

+#define MCF_GPTA_GPTSCR2_PR_64               (0x6)

+#define MCF_GPTA_GPTSCR2_PR_128              (0x7)

+#define MCF_GPTA_GPTSCR2_TCRE                (0x8)

+#define MCF_GPTA_GPTSCR2_RDPT                (0x10)

+#define MCF_GPTA_GPTSCR2_PUPT                (0x20)

+#define MCF_GPTA_GPTSCR2_TOI                 (0x80)

+

+/* Bit definitions and macros for MCF_GPTA_GPTFLG1 */

+#define MCF_GPTA_GPTFLG1_CF0                 (0x1)

+#define MCF_GPTA_GPTFLG1_CF1                 (0x2)

+#define MCF_GPTA_GPTFLG1_CF2                 (0x4)

+#define MCF_GPTA_GPTFLG1_CF3                 (0x8)

+

+/* Bit definitions and macros for MCF_GPTA_GPTFLG2 */

+#define MCF_GPTA_GPTFLG2_TOF                 (0x80)

+

+/* Bit definitions and macros for MCF_GPTA_GPTC */

+#define MCF_GPTA_GPTC_CCNT(x)                (((x)&0xFFFF)<<0)

+

+/* Bit definitions and macros for MCF_GPTA_GPTPACTL */

+#define MCF_GPTA_GPTPACTL_PAI                (0x1)

+#define MCF_GPTA_GPTPACTL_PAOVI              (0x2)

+#define MCF_GPTA_GPTPACTL_CLK(x)             (((x)&0x3)<<0x2)

+#define MCF_GPTA_GPTPACTL_CLK_GPTPR          (0)

+#define MCF_GPTA_GPTPACTL_CLK_PACLK          (0x1)

+#define MCF_GPTA_GPTPACTL_CLK_PACLK_256      (0x2)

+#define MCF_GPTA_GPTPACTL_CLK_PACLK_65536    (0x3)

+#define MCF_GPTA_GPTPACTL_PEDGE              (0x10)

+#define MCF_GPTA_GPTPACTL_PAMOD              (0x20)

+#define MCF_GPTA_GPTPACTL_PAE                (0x40)

+

+/* Bit definitions and macros for MCF_GPTA_GPTPAFLG */

+#define MCF_GPTA_GPTPAFLG_PAIF               (0x1)

+#define MCF_GPTA_GPTPAFLG_PAOVF              (0x2)

+

+/* Bit definitions and macros for MCF_GPTA_GPTPACNT */

+#define MCF_GPTA_GPTPACNT_PACNT(x)           (((x)&0xFFFF)<<0)

+

+/* Bit definitions and macros for MCF_GPTA_GPTPORT */

+#define MCF_GPTA_GPTPORT_PORTT0              (0x1)

+#define MCF_GPTA_GPTPORT_PORTT1              (0x2)

+#define MCF_GPTA_GPTPORT_PORTT2              (0x4)

+#define MCF_GPTA_GPTPORT_PORTT3              (0x8)

+

+/* Bit definitions and macros for MCF_GPTA_GPTDDR */

+#define MCF_GPTA_GPTDDR_DDRT0                (0x1)

+#define MCF_GPTA_GPTDDR_DDRT1                (0x2)

+#define MCF_GPTA_GPTDDR_DDRT2                (0x4)

+#define MCF_GPTA_GPTDDR_DDRT3                (0x8)

+

+

+#endif /* __MCF52235_GPTA_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_I2C.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_I2C.h
new file mode 100644
index 00000000..bba909b9
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_I2C.h
@@ -0,0 +1,54 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_I2C_H__

+#define __MCF52235_I2C_H__

+

+

+/*********************************************************************

+*

+* I2C Module (I2C)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_I2C_I2ADR                        (*(vuint8 *)(&__IPSBAR[0x300]))

+#define MCF_I2C_I2FDR                        (*(vuint8 *)(&__IPSBAR[0x304]))

+#define MCF_I2C_I2CR                         (*(vuint8 *)(&__IPSBAR[0x308]))

+#define MCF_I2C_I2SR                         (*(vuint8 *)(&__IPSBAR[0x30C]))

+#define MCF_I2C_I2DR                         (*(vuint8 *)(&__IPSBAR[0x310]))

+

+

+

+/* Bit definitions and macros for MCF_I2C_I2ADR */

+#define MCF_I2C_I2ADR_ADR(x)                 (((x)&0x7F)<<0x1)

+

+/* Bit definitions and macros for MCF_I2C_I2FDR */

+#define MCF_I2C_I2FDR_IC(x)                  (((x)&0x3F)<<0)

+

+/* Bit definitions and macros for MCF_I2C_I2CR */

+#define MCF_I2C_I2CR_RSTA                    (0x4)

+#define MCF_I2C_I2CR_TXAK                    (0x8)

+#define MCF_I2C_I2CR_MTX                     (0x10)

+#define MCF_I2C_I2CR_MSTA                    (0x20)

+#define MCF_I2C_I2CR_IIEN                    (0x40)

+#define MCF_I2C_I2CR_IEN                     (0x80)

+

+/* Bit definitions and macros for MCF_I2C_I2SR */

+#define MCF_I2C_I2SR_RXAK                    (0x1)

+#define MCF_I2C_I2SR_IIF                     (0x2)

+#define MCF_I2C_I2SR_SRW                     (0x4)

+#define MCF_I2C_I2SR_IAL                     (0x10)

+#define MCF_I2C_I2SR_IBB                     (0x20)

+#define MCF_I2C_I2SR_IAAS                    (0x40)

+#define MCF_I2C_I2SR_ICF                     (0x80)

+

+/* Bit definitions and macros for MCF_I2C_I2DR */

+#define MCF_I2C_I2DR_DATA(x)                 (((x)&0xFF)<<0)

+

+

+#endif /* __MCF52235_I2C_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_INTC.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_INTC.h
new file mode 100644
index 00000000..be040bb7
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_INTC.h
@@ -0,0 +1,484 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_INTC_H__

+#define __MCF52235_INTC_H__

+

+

+/*********************************************************************

+*

+* Interrupt Controller (INTC)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_INTC0_IPRH                       (*(vuint32*)(&__IPSBAR[0xC00]))

+#define MCF_INTC0_IPRL                       (*(vuint32*)(&__IPSBAR[0xC04]))

+#define MCF_INTC0_IMRH                       (*(vuint32*)(&__IPSBAR[0xC08]))

+#define MCF_INTC0_IMRL                       (*(vuint32*)(&__IPSBAR[0xC0C]))

+#define MCF_INTC0_INTFRCH                    (*(vuint32*)(&__IPSBAR[0xC10]))

+#define MCF_INTC0_INTFRCL                    (*(vuint32*)(&__IPSBAR[0xC14]))

+#define MCF_INTC0_IRLR                       (*(vuint8 *)(&__IPSBAR[0xC18]))

+#define MCF_INTC0_IACKLPR                    (*(vuint8 *)(&__IPSBAR[0xC19]))

+#define MCF_INTC0_ICR01                      (*(vuint8 *)(&__IPSBAR[0xC41]))

+#define MCF_INTC0_ICR02                      (*(vuint8 *)(&__IPSBAR[0xC42]))

+#define MCF_INTC0_ICR03                      (*(vuint8 *)(&__IPSBAR[0xC43]))

+#define MCF_INTC0_ICR04                      (*(vuint8 *)(&__IPSBAR[0xC44]))

+#define MCF_INTC0_ICR05                      (*(vuint8 *)(&__IPSBAR[0xC45]))

+#define MCF_INTC0_ICR06                      (*(vuint8 *)(&__IPSBAR[0xC46]))

+#define MCF_INTC0_ICR07                      (*(vuint8 *)(&__IPSBAR[0xC47]))

+#define MCF_INTC0_ICR08                      (*(vuint8 *)(&__IPSBAR[0xC48]))

+#define MCF_INTC0_ICR09                      (*(vuint8 *)(&__IPSBAR[0xC49]))

+#define MCF_INTC0_ICR10                      (*(vuint8 *)(&__IPSBAR[0xC4A]))

+#define MCF_INTC0_ICR11                      (*(vuint8 *)(&__IPSBAR[0xC4B]))

+#define MCF_INTC0_ICR12                      (*(vuint8 *)(&__IPSBAR[0xC4C]))

+#define MCF_INTC0_ICR13                      (*(vuint8 *)(&__IPSBAR[0xC4D]))

+#define MCF_INTC0_ICR14                      (*(vuint8 *)(&__IPSBAR[0xC4E]))

+#define MCF_INTC0_ICR15                      (*(vuint8 *)(&__IPSBAR[0xC4F]))

+#define MCF_INTC0_ICR16                      (*(vuint8 *)(&__IPSBAR[0xC50]))

+#define MCF_INTC0_ICR17                      (*(vuint8 *)(&__IPSBAR[0xC51]))

+#define MCF_INTC0_ICR18                      (*(vuint8 *)(&__IPSBAR[0xC52]))

+#define MCF_INTC0_ICR19                      (*(vuint8 *)(&__IPSBAR[0xC53]))

+#define MCF_INTC0_ICR20                      (*(vuint8 *)(&__IPSBAR[0xC54]))

+#define MCF_INTC0_ICR21                      (*(vuint8 *)(&__IPSBAR[0xC55]))

+#define MCF_INTC0_ICR22                      (*(vuint8 *)(&__IPSBAR[0xC56]))

+#define MCF_INTC0_ICR23                      (*(vuint8 *)(&__IPSBAR[0xC57]))

+#define MCF_INTC0_ICR24                      (*(vuint8 *)(&__IPSBAR[0xC58]))

+#define MCF_INTC0_ICR25                      (*(vuint8 *)(&__IPSBAR[0xC59]))

+#define MCF_INTC0_ICR26                      (*(vuint8 *)(&__IPSBAR[0xC5A]))

+#define MCF_INTC0_ICR27                      (*(vuint8 *)(&__IPSBAR[0xC5B]))

+#define MCF_INTC0_ICR28                      (*(vuint8 *)(&__IPSBAR[0xC5C]))

+#define MCF_INTC0_ICR29                      (*(vuint8 *)(&__IPSBAR[0xC5D]))

+#define MCF_INTC0_ICR30                      (*(vuint8 *)(&__IPSBAR[0xC5E]))

+#define MCF_INTC0_ICR31                      (*(vuint8 *)(&__IPSBAR[0xC5F]))

+#define MCF_INTC0_ICR32                      (*(vuint8 *)(&__IPSBAR[0xC60]))

+#define MCF_INTC0_ICR33                      (*(vuint8 *)(&__IPSBAR[0xC61]))

+#define MCF_INTC0_ICR34                      (*(vuint8 *)(&__IPSBAR[0xC62]))

+#define MCF_INTC0_ICR35                      (*(vuint8 *)(&__IPSBAR[0xC63]))

+#define MCF_INTC0_ICR36                      (*(vuint8 *)(&__IPSBAR[0xC64]))

+#define MCF_INTC0_ICR37                      (*(vuint8 *)(&__IPSBAR[0xC65]))

+#define MCF_INTC0_ICR38                      (*(vuint8 *)(&__IPSBAR[0xC66]))

+#define MCF_INTC0_ICR39                      (*(vuint8 *)(&__IPSBAR[0xC67]))

+#define MCF_INTC0_ICR40                      (*(vuint8 *)(&__IPSBAR[0xC68]))

+#define MCF_INTC0_ICR41                      (*(vuint8 *)(&__IPSBAR[0xC69]))

+#define MCF_INTC0_ICR42                      (*(vuint8 *)(&__IPSBAR[0xC6A]))

+#define MCF_INTC0_ICR43                      (*(vuint8 *)(&__IPSBAR[0xC6B]))

+#define MCF_INTC0_ICR44                      (*(vuint8 *)(&__IPSBAR[0xC6C]))

+#define MCF_INTC0_ICR45                      (*(vuint8 *)(&__IPSBAR[0xC6D]))

+#define MCF_INTC0_ICR46                      (*(vuint8 *)(&__IPSBAR[0xC6E]))

+#define MCF_INTC0_ICR47                      (*(vuint8 *)(&__IPSBAR[0xC6F]))

+#define MCF_INTC0_ICR48                      (*(vuint8 *)(&__IPSBAR[0xC70]))

+#define MCF_INTC0_ICR49                      (*(vuint8 *)(&__IPSBAR[0xC71]))

+#define MCF_INTC0_ICR50                      (*(vuint8 *)(&__IPSBAR[0xC72]))

+#define MCF_INTC0_ICR51                      (*(vuint8 *)(&__IPSBAR[0xC73]))

+#define MCF_INTC0_ICR52                      (*(vuint8 *)(&__IPSBAR[0xC74]))

+#define MCF_INTC0_ICR53                      (*(vuint8 *)(&__IPSBAR[0xC75]))

+#define MCF_INTC0_ICR54                      (*(vuint8 *)(&__IPSBAR[0xC76]))

+#define MCF_INTC0_ICR55                      (*(vuint8 *)(&__IPSBAR[0xC77]))

+#define MCF_INTC0_ICR56                      (*(vuint8 *)(&__IPSBAR[0xC78]))

+#define MCF_INTC0_ICR57                      (*(vuint8 *)(&__IPSBAR[0xC79]))

+#define MCF_INTC0_ICR58                      (*(vuint8 *)(&__IPSBAR[0xC7A]))

+#define MCF_INTC0_ICR59                      (*(vuint8 *)(&__IPSBAR[0xC7B]))

+#define MCF_INTC0_ICR60                      (*(vuint8 *)(&__IPSBAR[0xC7C]))

+#define MCF_INTC0_ICR61                      (*(vuint8 *)(&__IPSBAR[0xC7D]))

+#define MCF_INTC0_ICR62                      (*(vuint8 *)(&__IPSBAR[0xC7E]))

+#define MCF_INTC0_ICR63                      (*(vuint8 *)(&__IPSBAR[0xC7F]))

+#define MCF_INTC0_SWIACK                     (*(vuint8 *)(&__IPSBAR[0xCE0]))

+#define MCF_INTC0_L1IACK                     (*(vuint8 *)(&__IPSBAR[0xCE4]))

+#define MCF_INTC0_L2IACK                     (*(vuint8 *)(&__IPSBAR[0xCE8]))

+#define MCF_INTC0_L3IACK                     (*(vuint8 *)(&__IPSBAR[0xCEC]))

+#define MCF_INTC0_L4IACK                     (*(vuint8 *)(&__IPSBAR[0xCF0]))

+#define MCF_INTC0_L5IACK                     (*(vuint8 *)(&__IPSBAR[0xCF4]))

+#define MCF_INTC0_L6IACK                     (*(vuint8 *)(&__IPSBAR[0xCF8]))

+#define MCF_INTC0_L7IACK                     (*(vuint8 *)(&__IPSBAR[0xCFC]))

+#define MCF_INTC0_ICR(x)                     (*(vuint8 *)(&__IPSBAR[0xC41 + ((x-1)*0x1)]))

+#define MCF_INTC0_LIACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCE4 + ((x-1)*0x4)]))

+

+#define MCF_INTC1_IPRH                       (*(vuint32*)(&__IPSBAR[0xD00]))

+#define MCF_INTC1_IPRL                       (*(vuint32*)(&__IPSBAR[0xD04]))

+#define MCF_INTC1_IMRH                       (*(vuint32*)(&__IPSBAR[0xD08]))

+#define MCF_INTC1_IMRL                       (*(vuint32*)(&__IPSBAR[0xD0C]))

+#define MCF_INTC1_INTFRCH                    (*(vuint32*)(&__IPSBAR[0xD10]))

+#define MCF_INTC1_INTFRCL                    (*(vuint32*)(&__IPSBAR[0xD14]))

+#define MCF_INTC1_IRLR                       (*(vuint8 *)(&__IPSBAR[0xD18]))

+#define MCF_INTC1_IACKLPR                    (*(vuint8 *)(&__IPSBAR[0xD19]))

+#define MCF_INTC1_ICR01                      (*(vuint8 *)(&__IPSBAR[0xD41]))

+#define MCF_INTC1_ICR02                      (*(vuint8 *)(&__IPSBAR[0xD42]))

+#define MCF_INTC1_ICR03                      (*(vuint8 *)(&__IPSBAR[0xD43]))

+#define MCF_INTC1_ICR04                      (*(vuint8 *)(&__IPSBAR[0xD44]))

+#define MCF_INTC1_ICR05                      (*(vuint8 *)(&__IPSBAR[0xD45]))

+#define MCF_INTC1_ICR06                      (*(vuint8 *)(&__IPSBAR[0xD46]))

+#define MCF_INTC1_ICR07                      (*(vuint8 *)(&__IPSBAR[0xD47]))

+#define MCF_INTC1_ICR08                      (*(vuint8 *)(&__IPSBAR[0xD48]))

+#define MCF_INTC1_ICR09                      (*(vuint8 *)(&__IPSBAR[0xD49]))

+#define MCF_INTC1_ICR10                      (*(vuint8 *)(&__IPSBAR[0xD4A]))

+#define MCF_INTC1_ICR11                      (*(vuint8 *)(&__IPSBAR[0xD4B]))

+#define MCF_INTC1_ICR12                      (*(vuint8 *)(&__IPSBAR[0xD4C]))

+#define MCF_INTC1_ICR13                      (*(vuint8 *)(&__IPSBAR[0xD4D]))

+#define MCF_INTC1_ICR14                      (*(vuint8 *)(&__IPSBAR[0xD4E]))

+#define MCF_INTC1_ICR15                      (*(vuint8 *)(&__IPSBAR[0xD4F]))

+#define MCF_INTC1_ICR16                      (*(vuint8 *)(&__IPSBAR[0xD50]))

+#define MCF_INTC1_ICR17                      (*(vuint8 *)(&__IPSBAR[0xD51]))

+#define MCF_INTC1_ICR18                      (*(vuint8 *)(&__IPSBAR[0xD52]))

+#define MCF_INTC1_ICR19                      (*(vuint8 *)(&__IPSBAR[0xD53]))

+#define MCF_INTC1_ICR20                      (*(vuint8 *)(&__IPSBAR[0xD54]))

+#define MCF_INTC1_ICR21                      (*(vuint8 *)(&__IPSBAR[0xD55]))

+#define MCF_INTC1_ICR22                      (*(vuint8 *)(&__IPSBAR[0xD56]))

+#define MCF_INTC1_ICR23                      (*(vuint8 *)(&__IPSBAR[0xD57]))

+#define MCF_INTC1_ICR24                      (*(vuint8 *)(&__IPSBAR[0xD58]))

+#define MCF_INTC1_ICR25                      (*(vuint8 *)(&__IPSBAR[0xD59]))

+#define MCF_INTC1_ICR26                      (*(vuint8 *)(&__IPSBAR[0xD5A]))

+#define MCF_INTC1_ICR27                      (*(vuint8 *)(&__IPSBAR[0xD5B]))

+#define MCF_INTC1_ICR28                      (*(vuint8 *)(&__IPSBAR[0xD5C]))

+#define MCF_INTC1_ICR29                      (*(vuint8 *)(&__IPSBAR[0xD5D]))

+#define MCF_INTC1_ICR30                      (*(vuint8 *)(&__IPSBAR[0xD5E]))

+#define MCF_INTC1_ICR31                      (*(vuint8 *)(&__IPSBAR[0xD5F]))

+#define MCF_INTC1_ICR32                      (*(vuint8 *)(&__IPSBAR[0xD60]))

+#define MCF_INTC1_ICR33                      (*(vuint8 *)(&__IPSBAR[0xD61]))

+#define MCF_INTC1_ICR34                      (*(vuint8 *)(&__IPSBAR[0xD62]))

+#define MCF_INTC1_ICR35                      (*(vuint8 *)(&__IPSBAR[0xD63]))

+#define MCF_INTC1_ICR36                      (*(vuint8 *)(&__IPSBAR[0xD64]))

+#define MCF_INTC1_ICR37                      (*(vuint8 *)(&__IPSBAR[0xD65]))

+#define MCF_INTC1_ICR38                      (*(vuint8 *)(&__IPSBAR[0xD66]))

+#define MCF_INTC1_ICR39                      (*(vuint8 *)(&__IPSBAR[0xD67]))

+#define MCF_INTC1_ICR40                      (*(vuint8 *)(&__IPSBAR[0xD68]))

+#define MCF_INTC1_ICR41                      (*(vuint8 *)(&__IPSBAR[0xD69]))

+#define MCF_INTC1_ICR42                      (*(vuint8 *)(&__IPSBAR[0xD6A]))

+#define MCF_INTC1_ICR43                      (*(vuint8 *)(&__IPSBAR[0xD6B]))

+#define MCF_INTC1_ICR44                      (*(vuint8 *)(&__IPSBAR[0xD6C]))

+#define MCF_INTC1_ICR45                      (*(vuint8 *)(&__IPSBAR[0xD6D]))

+#define MCF_INTC1_ICR46                      (*(vuint8 *)(&__IPSBAR[0xD6E]))

+#define MCF_INTC1_ICR47                      (*(vuint8 *)(&__IPSBAR[0xD6F]))

+#define MCF_INTC1_ICR48                      (*(vuint8 *)(&__IPSBAR[0xD70]))

+#define MCF_INTC1_ICR49                      (*(vuint8 *)(&__IPSBAR[0xD71]))

+#define MCF_INTC1_ICR50                      (*(vuint8 *)(&__IPSBAR[0xD72]))

+#define MCF_INTC1_ICR51                      (*(vuint8 *)(&__IPSBAR[0xD73]))

+#define MCF_INTC1_ICR52                      (*(vuint8 *)(&__IPSBAR[0xD74]))

+#define MCF_INTC1_ICR53                      (*(vuint8 *)(&__IPSBAR[0xD75]))

+#define MCF_INTC1_ICR54                      (*(vuint8 *)(&__IPSBAR[0xD76]))

+#define MCF_INTC1_ICR55                      (*(vuint8 *)(&__IPSBAR[0xD77]))

+#define MCF_INTC1_ICR56                      (*(vuint8 *)(&__IPSBAR[0xD78]))

+#define MCF_INTC1_ICR57                      (*(vuint8 *)(&__IPSBAR[0xD79]))

+#define MCF_INTC1_ICR58                      (*(vuint8 *)(&__IPSBAR[0xD7A]))

+#define MCF_INTC1_ICR59                      (*(vuint8 *)(&__IPSBAR[0xD7B]))

+#define MCF_INTC1_ICR60                      (*(vuint8 *)(&__IPSBAR[0xD7C]))

+#define MCF_INTC1_ICR61                      (*(vuint8 *)(&__IPSBAR[0xD7D]))

+#define MCF_INTC1_ICR62                      (*(vuint8 *)(&__IPSBAR[0xD7E]))

+#define MCF_INTC1_ICR63                      (*(vuint8 *)(&__IPSBAR[0xD7F]))

+#define MCF_INTC1_SWIACK                     (*(vuint8 *)(&__IPSBAR[0xDE0]))

+#define MCF_INTC1_L1IACK                     (*(vuint8 *)(&__IPSBAR[0xDE4]))

+#define MCF_INTC1_L2IACK                     (*(vuint8 *)(&__IPSBAR[0xDE8]))

+#define MCF_INTC1_L3IACK                     (*(vuint8 *)(&__IPSBAR[0xDEC]))

+#define MCF_INTC1_L4IACK                     (*(vuint8 *)(&__IPSBAR[0xDF0]))

+#define MCF_INTC1_L5IACK                     (*(vuint8 *)(&__IPSBAR[0xDF4]))

+#define MCF_INTC1_L6IACK                     (*(vuint8 *)(&__IPSBAR[0xDF8]))

+#define MCF_INTC1_L7IACK                     (*(vuint8 *)(&__IPSBAR[0xDFC]))

+#define MCF_INTC1_ICR(x)                     (*(vuint8 *)(&__IPSBAR[0xD41 + ((x-1)*0x1)]))

+#define MCF_INTC1_LIACK(x)                   (*(vuint8 *)(&__IPSBAR[0xDE4 + ((x-1)*0x4)]))

+

+#define MCF_INTC_IPRH(x)                     (*(vuint32*)(&__IPSBAR[0xC00 + ((x)*0x100)]))

+#define MCF_INTC_IPRL(x)                     (*(vuint32*)(&__IPSBAR[0xC04 + ((x)*0x100)]))

+#define MCF_INTC_IMRH(x)                     (*(vuint32*)(&__IPSBAR[0xC08 + ((x)*0x100)]))

+#define MCF_INTC_IMRL(x)                     (*(vuint32*)(&__IPSBAR[0xC0C + ((x)*0x100)]))

+#define MCF_INTC_INTFRCH(x)                  (*(vuint32*)(&__IPSBAR[0xC10 + ((x)*0x100)]))

+#define MCF_INTC_INTFRCL(x)                  (*(vuint32*)(&__IPSBAR[0xC14 + ((x)*0x100)]))

+#define MCF_INTC_IRLR(x)                     (*(vuint8 *)(&__IPSBAR[0xC18 + ((x)*0x100)]))

+#define MCF_INTC_IACKLPR(x)                  (*(vuint8 *)(&__IPSBAR[0xC19 + ((x)*0x100)]))

+#define MCF_INTC_ICR01(x)                    (*(vuint8 *)(&__IPSBAR[0xC41 + ((x)*0x100)]))

+#define MCF_INTC_ICR02(x)                    (*(vuint8 *)(&__IPSBAR[0xC42 + ((x)*0x100)]))

+#define MCF_INTC_ICR03(x)                    (*(vuint8 *)(&__IPSBAR[0xC43 + ((x)*0x100)]))

+#define MCF_INTC_ICR04(x)                    (*(vuint8 *)(&__IPSBAR[0xC44 + ((x)*0x100)]))

+#define MCF_INTC_ICR05(x)                    (*(vuint8 *)(&__IPSBAR[0xC45 + ((x)*0x100)]))

+#define MCF_INTC_ICR06(x)                    (*(vuint8 *)(&__IPSBAR[0xC46 + ((x)*0x100)]))

+#define MCF_INTC_ICR07(x)                    (*(vuint8 *)(&__IPSBAR[0xC47 + ((x)*0x100)]))

+#define MCF_INTC_ICR08(x)                    (*(vuint8 *)(&__IPSBAR[0xC48 + ((x)*0x100)]))

+#define MCF_INTC_ICR09(x)                    (*(vuint8 *)(&__IPSBAR[0xC49 + ((x)*0x100)]))

+#define MCF_INTC_ICR10(x)                    (*(vuint8 *)(&__IPSBAR[0xC4A + ((x)*0x100)]))

+#define MCF_INTC_ICR11(x)                    (*(vuint8 *)(&__IPSBAR[0xC4B + ((x)*0x100)]))

+#define MCF_INTC_ICR12(x)                    (*(vuint8 *)(&__IPSBAR[0xC4C + ((x)*0x100)]))

+#define MCF_INTC_ICR13(x)                    (*(vuint8 *)(&__IPSBAR[0xC4D + ((x)*0x100)]))

+#define MCF_INTC_ICR14(x)                    (*(vuint8 *)(&__IPSBAR[0xC4E + ((x)*0x100)]))

+#define MCF_INTC_ICR15(x)                    (*(vuint8 *)(&__IPSBAR[0xC4F + ((x)*0x100)]))

+#define MCF_INTC_ICR16(x)                    (*(vuint8 *)(&__IPSBAR[0xC50 + ((x)*0x100)]))

+#define MCF_INTC_ICR17(x)                    (*(vuint8 *)(&__IPSBAR[0xC51 + ((x)*0x100)]))

+#define MCF_INTC_ICR18(x)                    (*(vuint8 *)(&__IPSBAR[0xC52 + ((x)*0x100)]))

+#define MCF_INTC_ICR19(x)                    (*(vuint8 *)(&__IPSBAR[0xC53 + ((x)*0x100)]))

+#define MCF_INTC_ICR20(x)                    (*(vuint8 *)(&__IPSBAR[0xC54 + ((x)*0x100)]))

+#define MCF_INTC_ICR21(x)                    (*(vuint8 *)(&__IPSBAR[0xC55 + ((x)*0x100)]))

+#define MCF_INTC_ICR22(x)                    (*(vuint8 *)(&__IPSBAR[0xC56 + ((x)*0x100)]))

+#define MCF_INTC_ICR23(x)                    (*(vuint8 *)(&__IPSBAR[0xC57 + ((x)*0x100)]))

+#define MCF_INTC_ICR24(x)                    (*(vuint8 *)(&__IPSBAR[0xC58 + ((x)*0x100)]))

+#define MCF_INTC_ICR25(x)                    (*(vuint8 *)(&__IPSBAR[0xC59 + ((x)*0x100)]))

+#define MCF_INTC_ICR26(x)                    (*(vuint8 *)(&__IPSBAR[0xC5A + ((x)*0x100)]))

+#define MCF_INTC_ICR27(x)                    (*(vuint8 *)(&__IPSBAR[0xC5B + ((x)*0x100)]))

+#define MCF_INTC_ICR28(x)                    (*(vuint8 *)(&__IPSBAR[0xC5C + ((x)*0x100)]))

+#define MCF_INTC_ICR29(x)                    (*(vuint8 *)(&__IPSBAR[0xC5D + ((x)*0x100)]))

+#define MCF_INTC_ICR30(x)                    (*(vuint8 *)(&__IPSBAR[0xC5E + ((x)*0x100)]))

+#define MCF_INTC_ICR31(x)                    (*(vuint8 *)(&__IPSBAR[0xC5F + ((x)*0x100)]))

+#define MCF_INTC_ICR32(x)                    (*(vuint8 *)(&__IPSBAR[0xC60 + ((x)*0x100)]))

+#define MCF_INTC_ICR33(x)                    (*(vuint8 *)(&__IPSBAR[0xC61 + ((x)*0x100)]))

+#define MCF_INTC_ICR34(x)                    (*(vuint8 *)(&__IPSBAR[0xC62 + ((x)*0x100)]))

+#define MCF_INTC_ICR35(x)                    (*(vuint8 *)(&__IPSBAR[0xC63 + ((x)*0x100)]))

+#define MCF_INTC_ICR36(x)                    (*(vuint8 *)(&__IPSBAR[0xC64 + ((x)*0x100)]))

+#define MCF_INTC_ICR37(x)                    (*(vuint8 *)(&__IPSBAR[0xC65 + ((x)*0x100)]))

+#define MCF_INTC_ICR38(x)                    (*(vuint8 *)(&__IPSBAR[0xC66 + ((x)*0x100)]))

+#define MCF_INTC_ICR39(x)                    (*(vuint8 *)(&__IPSBAR[0xC67 + ((x)*0x100)]))

+#define MCF_INTC_ICR40(x)                    (*(vuint8 *)(&__IPSBAR[0xC68 + ((x)*0x100)]))

+#define MCF_INTC_ICR41(x)                    (*(vuint8 *)(&__IPSBAR[0xC69 + ((x)*0x100)]))

+#define MCF_INTC_ICR42(x)                    (*(vuint8 *)(&__IPSBAR[0xC6A + ((x)*0x100)]))

+#define MCF_INTC_ICR43(x)                    (*(vuint8 *)(&__IPSBAR[0xC6B + ((x)*0x100)]))

+#define MCF_INTC_ICR44(x)                    (*(vuint8 *)(&__IPSBAR[0xC6C + ((x)*0x100)]))

+#define MCF_INTC_ICR45(x)                    (*(vuint8 *)(&__IPSBAR[0xC6D + ((x)*0x100)]))

+#define MCF_INTC_ICR46(x)                    (*(vuint8 *)(&__IPSBAR[0xC6E + ((x)*0x100)]))

+#define MCF_INTC_ICR47(x)                    (*(vuint8 *)(&__IPSBAR[0xC6F + ((x)*0x100)]))

+#define MCF_INTC_ICR48(x)                    (*(vuint8 *)(&__IPSBAR[0xC70 + ((x)*0x100)]))

+#define MCF_INTC_ICR49(x)                    (*(vuint8 *)(&__IPSBAR[0xC71 + ((x)*0x100)]))

+#define MCF_INTC_ICR50(x)                    (*(vuint8 *)(&__IPSBAR[0xC72 + ((x)*0x100)]))

+#define MCF_INTC_ICR51(x)                    (*(vuint8 *)(&__IPSBAR[0xC73 + ((x)*0x100)]))

+#define MCF_INTC_ICR52(x)                    (*(vuint8 *)(&__IPSBAR[0xC74 + ((x)*0x100)]))

+#define MCF_INTC_ICR53(x)                    (*(vuint8 *)(&__IPSBAR[0xC75 + ((x)*0x100)]))

+#define MCF_INTC_ICR54(x)                    (*(vuint8 *)(&__IPSBAR[0xC76 + ((x)*0x100)]))

+#define MCF_INTC_ICR55(x)                    (*(vuint8 *)(&__IPSBAR[0xC77 + ((x)*0x100)]))

+#define MCF_INTC_ICR56(x)                    (*(vuint8 *)(&__IPSBAR[0xC78 + ((x)*0x100)]))

+#define MCF_INTC_ICR57(x)                    (*(vuint8 *)(&__IPSBAR[0xC79 + ((x)*0x100)]))

+#define MCF_INTC_ICR58(x)                    (*(vuint8 *)(&__IPSBAR[0xC7A + ((x)*0x100)]))

+#define MCF_INTC_ICR59(x)                    (*(vuint8 *)(&__IPSBAR[0xC7B + ((x)*0x100)]))

+#define MCF_INTC_ICR60(x)                    (*(vuint8 *)(&__IPSBAR[0xC7C + ((x)*0x100)]))

+#define MCF_INTC_ICR61(x)                    (*(vuint8 *)(&__IPSBAR[0xC7D + ((x)*0x100)]))

+#define MCF_INTC_ICR62(x)                    (*(vuint8 *)(&__IPSBAR[0xC7E + ((x)*0x100)]))

+#define MCF_INTC_ICR63(x)                    (*(vuint8 *)(&__IPSBAR[0xC7F + ((x)*0x100)]))

+#define MCF_INTC_SWIACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCE0 + ((x)*0x100)]))

+#define MCF_INTC_L1IACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCE4 + ((x)*0x100)]))

+#define MCF_INTC_L2IACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCE8 + ((x)*0x100)]))

+#define MCF_INTC_L3IACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCEC + ((x)*0x100)]))

+#define MCF_INTC_L4IACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCF0 + ((x)*0x100)]))

+#define MCF_INTC_L5IACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCF4 + ((x)*0x100)]))

+#define MCF_INTC_L6IACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCF8 + ((x)*0x100)]))

+#define MCF_INTC_L7IACK(x)                   (*(vuint8 *)(&__IPSBAR[0xCFC + ((x)*0x100)]))

+

+

+/* Bit definitions and macros for MCF_INTC_IPRH */

+#define MCF_INTC_IPRH_INT32                  (0x1)

+#define MCF_INTC_IPRH_INT33                  (0x2)

+#define MCF_INTC_IPRH_INT34                  (0x4)

+#define MCF_INTC_IPRH_INT35                  (0x8)

+#define MCF_INTC_IPRH_INT36                  (0x10)

+#define MCF_INTC_IPRH_INT37                  (0x20)

+#define MCF_INTC_IPRH_INT38                  (0x40)

+#define MCF_INTC_IPRH_INT39                  (0x80)

+#define MCF_INTC_IPRH_INT40                  (0x100)

+#define MCF_INTC_IPRH_INT41                  (0x200)

+#define MCF_INTC_IPRH_INT42                  (0x400)

+#define MCF_INTC_IPRH_INT43                  (0x800)

+#define MCF_INTC_IPRH_INT44                  (0x1000)

+#define MCF_INTC_IPRH_INT45                  (0x2000)

+#define MCF_INTC_IPRH_INT46                  (0x4000)

+#define MCF_INTC_IPRH_INT47                  (0x8000)

+#define MCF_INTC_IPRH_INT48                  (0x10000)

+#define MCF_INTC_IPRH_INT49                  (0x20000)

+#define MCF_INTC_IPRH_INT50                  (0x40000)

+#define MCF_INTC_IPRH_INT51                  (0x80000)

+#define MCF_INTC_IPRH_INT52                  (0x100000)

+#define MCF_INTC_IPRH_INT53                  (0x200000)

+#define MCF_INTC_IPRH_INT54                  (0x400000)

+#define MCF_INTC_IPRH_INT55                  (0x800000)

+#define MCF_INTC_IPRH_INT56                  (0x1000000)

+#define MCF_INTC_IPRH_INT57                  (0x2000000)

+#define MCF_INTC_IPRH_INT58                  (0x4000000)

+#define MCF_INTC_IPRH_INT59                  (0x8000000)

+#define MCF_INTC_IPRH_INT60                  (0x10000000)

+#define MCF_INTC_IPRH_INT61                  (0x20000000)

+#define MCF_INTC_IPRH_INT62                  (0x40000000)

+#define MCF_INTC_IPRH_INT63                  (0x80000000)

+

+/* Bit definitions and macros for MCF_INTC_IPRL */

+#define MCF_INTC_IPRL_INT1                   (0x2)

+#define MCF_INTC_IPRL_INT2                   (0x4)

+#define MCF_INTC_IPRL_INT3                   (0x8)

+#define MCF_INTC_IPRL_INT4                   (0x10)

+#define MCF_INTC_IPRL_INT5                   (0x20)

+#define MCF_INTC_IPRL_INT6                   (0x40)

+#define MCF_INTC_IPRL_INT7                   (0x80)

+#define MCF_INTC_IPRL_INT8                   (0x100)

+#define MCF_INTC_IPRL_INT9                   (0x200)

+#define MCF_INTC_IPRL_INT10                  (0x400)

+#define MCF_INTC_IPRL_INT11                  (0x800)

+#define MCF_INTC_IPRL_INT12                  (0x1000)

+#define MCF_INTC_IPRL_INT13                  (0x2000)

+#define MCF_INTC_IPRL_INT14                  (0x4000)

+#define MCF_INTC_IPRL_INT15                  (0x8000)

+#define MCF_INTC_IPRL_INT16                  (0x10000)

+#define MCF_INTC_IPRL_INT17                  (0x20000)

+#define MCF_INTC_IPRL_INT18                  (0x40000)

+#define MCF_INTC_IPRL_INT19                  (0x80000)

+#define MCF_INTC_IPRL_INT20                  (0x100000)

+#define MCF_INTC_IPRL_INT21                  (0x200000)

+#define MCF_INTC_IPRL_INT22                  (0x400000)

+#define MCF_INTC_IPRL_INT23                  (0x800000)

+#define MCF_INTC_IPRL_INT24                  (0x1000000)

+#define MCF_INTC_IPRL_INT25                  (0x2000000)

+#define MCF_INTC_IPRL_INT26                  (0x4000000)

+#define MCF_INTC_IPRL_INT27                  (0x8000000)

+#define MCF_INTC_IPRL_INT28                  (0x10000000)

+#define MCF_INTC_IPRL_INT29                  (0x20000000)

+#define MCF_INTC_IPRL_INT30                  (0x40000000)

+#define MCF_INTC_IPRL_INT31                  (0x80000000)

+

+/* Bit definitions and macros for MCF_INTC_IMRH */

+#define MCF_INTC_IMRH_INT_MASK32             (0x1)

+#define MCF_INTC_IMRH_INT_MASK33             (0x2)

+#define MCF_INTC_IMRH_INT_MASK34             (0x4)

+#define MCF_INTC_IMRH_INT_MASK35             (0x8)

+#define MCF_INTC_IMRH_INT_MASK36             (0x10)

+#define MCF_INTC_IMRH_INT_MASK37             (0x20)

+#define MCF_INTC_IMRH_INT_MASK38             (0x40)

+#define MCF_INTC_IMRH_INT_MASK39             (0x80)

+#define MCF_INTC_IMRH_INT_MASK40             (0x100)

+#define MCF_INTC_IMRH_INT_MASK41             (0x200)

+#define MCF_INTC_IMRH_INT_MASK42             (0x400)

+#define MCF_INTC_IMRH_INT_MASK43             (0x800)

+#define MCF_INTC_IMRH_INT_MASK44             (0x1000)

+#define MCF_INTC_IMRH_INT_MASK45             (0x2000)

+#define MCF_INTC_IMRH_INT_MASK46             (0x4000)

+#define MCF_INTC_IMRH_INT_MASK47             (0x8000)

+#define MCF_INTC_IMRH_INT_MASK48             (0x10000)

+#define MCF_INTC_IMRH_INT_MASK49             (0x20000)

+#define MCF_INTC_IMRH_INT_MASK50             (0x40000)

+#define MCF_INTC_IMRH_INT_MASK51             (0x80000)

+#define MCF_INTC_IMRH_INT_MASK52             (0x100000)

+#define MCF_INTC_IMRH_INT_MASK53             (0x200000)

+#define MCF_INTC_IMRH_INT_MASK54             (0x400000)

+#define MCF_INTC_IMRH_INT_MASK55             (0x800000)

+#define MCF_INTC_IMRH_INT_MASK56             (0x1000000)

+#define MCF_INTC_IMRH_INT_MASK57             (0x2000000)

+#define MCF_INTC_IMRH_INT_MASK58             (0x4000000)

+#define MCF_INTC_IMRH_INT_MASK59             (0x8000000)

+#define MCF_INTC_IMRH_INT_MASK60             (0x10000000)

+#define MCF_INTC_IMRH_INT_MASK61             (0x20000000)

+#define MCF_INTC_IMRH_INT_MASK62             (0x40000000)

+#define MCF_INTC_IMRH_INT_MASK63             (0x80000000)

+

+/* Bit definitions and macros for MCF_INTC_IMRL */

+#define MCF_INTC_IMRL_MASKALL                (0x1)

+#define MCF_INTC_IMRL_INT_MASK1              (0x2)

+#define MCF_INTC_IMRL_INT_MASK2              (0x4)

+#define MCF_INTC_IMRL_INT_MASK3              (0x8)

+#define MCF_INTC_IMRL_INT_MASK4              (0x10)

+#define MCF_INTC_IMRL_INT_MASK5              (0x20)

+#define MCF_INTC_IMRL_INT_MASK6              (0x40)

+#define MCF_INTC_IMRL_INT_MASK7              (0x80)

+#define MCF_INTC_IMRL_INT_MASK8              (0x100)

+#define MCF_INTC_IMRL_INT_MASK9              (0x200)

+#define MCF_INTC_IMRL_INT_MASK10             (0x400)

+#define MCF_INTC_IMRL_INT_MASK11             (0x800)

+#define MCF_INTC_IMRL_INT_MASK12             (0x1000)

+#define MCF_INTC_IMRL_INT_MASK13             (0x2000)

+#define MCF_INTC_IMRL_INT_MASK14             (0x4000)

+#define MCF_INTC_IMRL_INT_MASK15             (0x8000)

+#define MCF_INTC_IMRL_INT_MASK16             (0x10000)

+#define MCF_INTC_IMRL_INT_MASK17             (0x20000)

+#define MCF_INTC_IMRL_INT_MASK18             (0x40000)

+#define MCF_INTC_IMRL_INT_MASK19             (0x80000)

+#define MCF_INTC_IMRL_INT_MASK20             (0x100000)

+#define MCF_INTC_IMRL_INT_MASK21             (0x200000)

+#define MCF_INTC_IMRL_INT_MASK22             (0x400000)

+#define MCF_INTC_IMRL_INT_MASK23             (0x800000)

+#define MCF_INTC_IMRL_INT_MASK24             (0x1000000)

+#define MCF_INTC_IMRL_INT_MASK25             (0x2000000)

+#define MCF_INTC_IMRL_INT_MASK26             (0x4000000)

+#define MCF_INTC_IMRL_INT_MASK27             (0x8000000)

+#define MCF_INTC_IMRL_INT_MASK28             (0x10000000)

+#define MCF_INTC_IMRL_INT_MASK29             (0x20000000)

+#define MCF_INTC_IMRL_INT_MASK30             (0x40000000)

+#define MCF_INTC_IMRL_INT_MASK31             (0x80000000)

+

+/* Bit definitions and macros for MCF_INTC_INTFRCH */

+#define MCF_INTC_INTFRCH_INTFRC32            (0x1)

+#define MCF_INTC_INTFRCH_INTFRC33            (0x2)

+#define MCF_INTC_INTFRCH_INTFRC34            (0x4)

+#define MCF_INTC_INTFRCH_INTFRC35            (0x8)

+#define MCF_INTC_INTFRCH_INTFRC36            (0x10)

+#define MCF_INTC_INTFRCH_INTFRC37            (0x20)

+#define MCF_INTC_INTFRCH_INTFRC38            (0x40)

+#define MCF_INTC_INTFRCH_INTFRC39            (0x80)

+#define MCF_INTC_INTFRCH_INTFRC40            (0x100)

+#define MCF_INTC_INTFRCH_INTFRC41            (0x200)

+#define MCF_INTC_INTFRCH_INTFRC42            (0x400)

+#define MCF_INTC_INTFRCH_INTFRC43            (0x800)

+#define MCF_INTC_INTFRCH_INTFRC44            (0x1000)

+#define MCF_INTC_INTFRCH_INTFRC45            (0x2000)

+#define MCF_INTC_INTFRCH_INTFRC46            (0x4000)

+#define MCF_INTC_INTFRCH_INTFRC47            (0x8000)

+#define MCF_INTC_INTFRCH_INTFRC48            (0x10000)

+#define MCF_INTC_INTFRCH_INTFRC49            (0x20000)

+#define MCF_INTC_INTFRCH_INTFRC50            (0x40000)

+#define MCF_INTC_INTFRCH_INTFRC51            (0x80000)

+#define MCF_INTC_INTFRCH_INTFRC52            (0x100000)

+#define MCF_INTC_INTFRCH_INTFRC53            (0x200000)

+#define MCF_INTC_INTFRCH_INTFRC54            (0x400000)

+#define MCF_INTC_INTFRCH_INTFRC55            (0x800000)

+#define MCF_INTC_INTFRCH_INTFRC56            (0x1000000)

+#define MCF_INTC_INTFRCH_INTFRC57            (0x2000000)

+#define MCF_INTC_INTFRCH_INTFRC58            (0x4000000)

+#define MCF_INTC_INTFRCH_INTFRC59            (0x8000000)

+#define MCF_INTC_INTFRCH_INTFRC60            (0x10000000)

+#define MCF_INTC_INTFRCH_INTFRC61            (0x20000000)

+#define MCF_INTC_INTFRCH_INTFRC62            (0x40000000)

+#define MCF_INTC_INTFRCH_INTFRC63            (0x80000000)

+

+/* Bit definitions and macros for MCF_INTC_INTFRCL */

+#define MCF_INTC_INTFRCL_INTFRC1             (0x2)

+#define MCF_INTC_INTFRCL_INTFRC2             (0x4)

+#define MCF_INTC_INTFRCL_INTFRC3             (0x8)

+#define MCF_INTC_INTFRCL_INTFRC4             (0x10)

+#define MCF_INTC_INTFRCL_INTFRC5             (0x20)

+#define MCF_INTC_INTFRCL_INTFRC6             (0x40)

+#define MCF_INTC_INTFRCL_INTFRC7             (0x80)

+#define MCF_INTC_INTFRCL_INTFRC8             (0x100)

+#define MCF_INTC_INTFRCL_INTFRC9             (0x200)

+#define MCF_INTC_INTFRCL_INTFRC10            (0x400)

+#define MCF_INTC_INTFRCL_INTFRC11            (0x800)

+#define MCF_INTC_INTFRCL_INTFRC12            (0x1000)

+#define MCF_INTC_INTFRCL_INTFRC13            (0x2000)

+#define MCF_INTC_INTFRCL_INTFRC14            (0x4000)

+#define MCF_INTC_INTFRCL_INTFRC15            (0x8000)

+#define MCF_INTC_INTFRCL_INTFRC16            (0x10000)

+#define MCF_INTC_INTFRCL_INTFRC17            (0x20000)

+#define MCF_INTC_INTFRCL_INTFRC18            (0x40000)

+#define MCF_INTC_INTFRCL_INTFRC19            (0x80000)

+#define MCF_INTC_INTFRCL_INTFRC20            (0x100000)

+#define MCF_INTC_INTFRCL_INTFRC21            (0x200000)

+#define MCF_INTC_INTFRCL_INTFRC22            (0x400000)

+#define MCF_INTC_INTFRCL_INTFRC23            (0x800000)

+#define MCF_INTC_INTFRCL_INTFRC24            (0x1000000)

+#define MCF_INTC_INTFRCL_INTFRC25            (0x2000000)

+#define MCF_INTC_INTFRCL_INTFRC26            (0x4000000)

+#define MCF_INTC_INTFRCL_INTFRC27            (0x8000000)

+#define MCF_INTC_INTFRCL_INTFRC28            (0x10000000)

+#define MCF_INTC_INTFRCL_INTFRC29            (0x20000000)

+#define MCF_INTC_INTFRCL_INTFRC30            (0x40000000)

+#define MCF_INTC_INTFRCL_INTFRC31            (0x80000000)

+

+/* Bit definitions and macros for MCF_INTC_IRLR */

+#define MCF_INTC_IRLR_IRQ(x)                 (((x)&0x7F)<<0x1)

+

+/* Bit definitions and macros for MCF_INTC_IACKLPR */

+#define MCF_INTC_IACKLPR_PRI(x)              (((x)&0xF)<<0)

+#define MCF_INTC_IACKLPR_LEVEL(x)            (((x)&0x7)<<0x4)

+

+/* Bit definitions and macros for MCF_INTC_ICR */

+#define MCF_INTC_ICR_IP(x)                   (((x)&0x7)<<0)

+#define MCF_INTC_ICR_IL(x)                   (((x)&0x7)<<0x3)

+

+/* Bit definitions and macros for MCF_INTC_SWIACK */

+#define MCF_INTC_SWIACK_VECTOR(x)            (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_INTC_LIACK */

+#define MCF_INTC_LIACK_VECTOR(x)             (((x)&0xFF)<<0)

+

+

+#endif /* __MCF52235_INTC_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PAD.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PAD.h
new file mode 100644
index 00000000..3295613e
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PAD.h
@@ -0,0 +1,95 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_PAD_H__

+#define __MCF52235_PAD_H__

+

+

+/*********************************************************************

+*

+* Common GPIO Registers

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_PAD_PWOR                         (*(vuint16*)(&__IPSBAR[0x100078]))

+#define MCF_PAD_PDSR1                        (*(vuint16*)(&__IPSBAR[0x10007A]))

+#define MCF_PAD_PDSR0                        (*(vuint32*)(&__IPSBAR[0x10007C]))

+

+

+/* Bit definitions and macros for MCF_PAD_PWOR */

+#define MCF_PAD_PWOR_PWOR0                   (0x1)

+#define MCF_PAD_PWOR_PWOR1                   (0x2)

+#define MCF_PAD_PWOR_PWOR2                   (0x4)

+#define MCF_PAD_PWOR_PWOR3                   (0x8)

+#define MCF_PAD_PWOR_PWOR4                   (0x10)

+#define MCF_PAD_PWOR_PWOR5                   (0x20)

+#define MCF_PAD_PWOR_PWOR6                   (0x40)

+#define MCF_PAD_PWOR_PWOR7                   (0x80)

+#define MCF_PAD_PWOR_PWOR8                   (0x100)

+#define MCF_PAD_PWOR_PWOR9                   (0x200)

+#define MCF_PAD_PWOR_PWOR10                  (0x400)

+#define MCF_PAD_PWOR_PWOR11                  (0x800)

+#define MCF_PAD_PWOR_PWOR12                  (0x1000)

+#define MCF_PAD_PWOR_PWOR13                  (0x2000)

+#define MCF_PAD_PWOR_PWOR14                  (0x4000)

+#define MCF_PAD_PWOR_PWOR15                  (0x8000)

+

+/* Bit definitions and macros for MCF_PAD_PDSR1 */

+#define MCF_PAD_PDSR1_PDSR32                 (0x1)

+#define MCF_PAD_PDSR1_PDSR33                 (0x2)

+#define MCF_PAD_PDSR1_PDSR34                 (0x4)

+#define MCF_PAD_PDSR1_PDSR35                 (0x8)

+#define MCF_PAD_PDSR1_PDSR36                 (0x10)

+#define MCF_PAD_PDSR1_PDSR37                 (0x20)

+#define MCF_PAD_PDSR1_PDSR38                 (0x40)

+#define MCF_PAD_PDSR1_PDSR39                 (0x80)

+#define MCF_PAD_PDSR1_PDSR40                 (0x100)

+#define MCF_PAD_PDSR1_PDSR41                 (0x200)

+#define MCF_PAD_PDSR1_PDSR42                 (0x400)

+#define MCF_PAD_PDSR1_PDSR43                 (0x800)

+#define MCF_PAD_PDSR1_PDSR44                 (0x1000)

+#define MCF_PAD_PDSR1_PDSR45                 (0x2000)

+#define MCF_PAD_PDSR1_PDSR46                 (0x4000)

+#define MCF_PAD_PDSR1_PDSR47                 (0x8000)

+

+/* Bit definitions and macros for MCF_PAD_PDSR0 */

+#define MCF_PAD_PDSR0_PDSR0                  (0x1)

+#define MCF_PAD_PDSR0_PDSR1                  (0x2)

+#define MCF_PAD_PDSR0_PDSR2                  (0x4)

+#define MCF_PAD_PDSR0_PDSR3                  (0x8)

+#define MCF_PAD_PDSR0_PDSR4                  (0x10)

+#define MCF_PAD_PDSR0_PDSR5                  (0x20)

+#define MCF_PAD_PDSR0_PDSR6                  (0x40)

+#define MCF_PAD_PDSR0_PDSR7                  (0x80)

+#define MCF_PAD_PDSR0_PDSR8                  (0x100)

+#define MCF_PAD_PDSR0_PDSR9                  (0x200)

+#define MCF_PAD_PDSR0_PDSR10                 (0x400)

+#define MCF_PAD_PDSR0_PDSR11                 (0x800)

+#define MCF_PAD_PDSR0_PDSR12                 (0x1000)

+#define MCF_PAD_PDSR0_PDSR13                 (0x2000)

+#define MCF_PAD_PDSR0_PDSR14                 (0x4000)

+#define MCF_PAD_PDSR0_PDSR15                 (0x8000)

+#define MCF_PAD_PDSR0_PDSR16                 (0x10000)

+#define MCF_PAD_PDSR0_PDSR17                 (0x20000)

+#define MCF_PAD_PDSR0_PDSR18                 (0x40000)

+#define MCF_PAD_PDSR0_PDSR19                 (0x80000)

+#define MCF_PAD_PDSR0_PDSR20                 (0x100000)

+#define MCF_PAD_PDSR0_PDSR21                 (0x200000)

+#define MCF_PAD_PDSR0_PDSR22                 (0x400000)

+#define MCF_PAD_PDSR0_PDSR23                 (0x800000)

+#define MCF_PAD_PDSR0_PDSR24                 (0x1000000)

+#define MCF_PAD_PDSR0_PDSR25                 (0x2000000)

+#define MCF_PAD_PDSR0_PDSR26                 (0x4000000)

+#define MCF_PAD_PDSR0_PDSR27                 (0x8000000)

+#define MCF_PAD_PDSR0_PDSR28                 (0x10000000)

+#define MCF_PAD_PDSR0_PDSR29                 (0x20000000)

+#define MCF_PAD_PDSR0_PDSR30                 (0x40000000)

+#define MCF_PAD_PDSR0_PDSR31                 (0x80000000)

+

+

+#endif /* __MCF52235_PAD_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PIT.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PIT.h
new file mode 100644
index 00000000..ac598df4
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PIT.h
@@ -0,0 +1,49 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_PIT_H__

+#define __MCF52235_PIT_H__

+

+

+/*********************************************************************

+*

+* Programmable Interrupt Timer (PIT)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_PIT0_PCSR                        (*(vuint16*)(&__IPSBAR[0x150000]))

+#define MCF_PIT0_PMR                         (*(vuint16*)(&__IPSBAR[0x150002]))

+#define MCF_PIT0_PCNTR                       (*(vuint16*)(&__IPSBAR[0x150004]))

+

+#define MCF_PIT1_PCSR                        (*(vuint16*)(&__IPSBAR[0x160000]))

+#define MCF_PIT1_PMR                         (*(vuint16*)(&__IPSBAR[0x160002]))

+#define MCF_PIT1_PCNTR                       (*(vuint16*)(&__IPSBAR[0x160004]))

+

+#define MCF_PIT_PCSR(x)                      (*(vuint16*)(&__IPSBAR[0x150000 + ((x)*0x10000)]))

+#define MCF_PIT_PMR(x)                       (*(vuint16*)(&__IPSBAR[0x150002 + ((x)*0x10000)]))

+#define MCF_PIT_PCNTR(x)                     (*(vuint16*)(&__IPSBAR[0x150004 + ((x)*0x10000)]))

+

+

+/* Bit definitions and macros for MCF_PIT_PCSR */

+#define MCF_PIT_PCSR_EN                      (0x1)

+#define MCF_PIT_PCSR_RLD                     (0x2)

+#define MCF_PIT_PCSR_PIF                     (0x4)

+#define MCF_PIT_PCSR_PIE                     (0x8)

+#define MCF_PIT_PCSR_OVW                     (0x10)

+#define MCF_PIT_PCSR_DBG                     (0x20)

+#define MCF_PIT_PCSR_DOZE                    (0x40)

+#define MCF_PIT_PCSR_PRE(x)                  (((x)&0xF)<<0x8)

+

+/* Bit definitions and macros for MCF_PIT_PMR */

+#define MCF_PIT_PMR_PM(x)                    (((x)&0xFFFF)<<0)

+

+/* Bit definitions and macros for MCF_PIT_PCNTR */

+#define MCF_PIT_PCNTR_PC(x)                  (((x)&0xFFFF)<<0)

+

+

+#endif /* __MCF52235_PIT_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PMM.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PMM.h
new file mode 100644
index 00000000..65712dd1
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PMM.h
@@ -0,0 +1,41 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_PMM_H__

+#define __MCF52235_PMM_H__

+

+

+/*********************************************************************

+*

+* Power Management (PMM)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_PMM_LPICR                        (*(vuint8 *)(&__IPSBAR[0x12]))

+#define MCF_PMM_LPCR                         (*(vuint8 *)(&__IPSBAR[0x110007]))

+

+

+/* Bit definitions and macros for MCF_PMM_LPICR */

+#define MCF_PMM_LPICR_XLPM_IPL(x)            (((x)&0x7)<<0x4)

+#define MCF_PMM_LPICR_ENBSTOP                (0x80)

+

+/* Bit definitions and macros for MCF_PMM_LPCR */

+#define MCF_PMM_LPCR_LVDSE                   (0x2)

+#define MCF_PMM_LPCR_STPMD(x)                (((x)&0x3)<<0x3)

+#define MCF_PMM_LPCR_STPMD_SYS_DISABLED      (0)

+#define MCF_PMM_LPCR_STPMD_SYS_CLKOUT_DISABLED (0x8)

+#define MCF_PMM_LPCR_STPMD_ONLY_OSC_ENABLED  (0x10)

+#define MCF_PMM_LPCR_STPMD_ALL_DISABLED      (0x18)

+#define MCF_PMM_LPCR_LPMD(x)                 (((x)&0x3)<<0x6)

+#define MCF_PMM_LPCR_LPMD_RUN                (0)

+#define MCF_PMM_LPCR_LPMD_DOZE               (0x40)

+#define MCF_PMM_LPCR_LPMD_WAIT               (0x80)

+#define MCF_PMM_LPCR_LPMD_STOP               (0xC0)

+

+

+#endif /* __MCF52235_PMM_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PWM.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PWM.h
new file mode 100644
index 00000000..a4774e78
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_PWM.h
@@ -0,0 +1,134 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_PWM_H__

+#define __MCF52235_PWM_H__

+

+

+/*********************************************************************

+*

+* Pulse Width Modulation (PWM)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_PWM_PWME                         (*(vuint8 *)(&__IPSBAR[0x1B0000]))

+#define MCF_PWM_PWMPOL                       (*(vuint8 *)(&__IPSBAR[0x1B0001]))

+#define MCF_PWM_PWMCLK                       (*(vuint8 *)(&__IPSBAR[0x1B0002]))

+#define MCF_PWM_PWMPRCLK                     (*(vuint8 *)(&__IPSBAR[0x1B0003]))

+#define MCF_PWM_PWMCAE                       (*(vuint8 *)(&__IPSBAR[0x1B0004]))

+#define MCF_PWM_PWMCTL                       (*(vuint8 *)(&__IPSBAR[0x1B0005]))

+#define MCF_PWM_PWMSCLA                      (*(vuint8 *)(&__IPSBAR[0x1B0008]))

+#define MCF_PWM_PWMSCLB                      (*(vuint8 *)(&__IPSBAR[0x1B0009]))

+#define MCF_PWM_PWMCNT0                      (*(vuint8 *)(&__IPSBAR[0x1B000C]))

+#define MCF_PWM_PWMCNT1                      (*(vuint8 *)(&__IPSBAR[0x1B000D]))

+#define MCF_PWM_PWMCNT2                      (*(vuint8 *)(&__IPSBAR[0x1B000E]))

+#define MCF_PWM_PWMCNT3                      (*(vuint8 *)(&__IPSBAR[0x1B000F]))

+#define MCF_PWM_PWMCNT4                      (*(vuint8 *)(&__IPSBAR[0x1B0010]))

+#define MCF_PWM_PWMCNT5                      (*(vuint8 *)(&__IPSBAR[0x1B0011]))

+#define MCF_PWM_PWMCNT6                      (*(vuint8 *)(&__IPSBAR[0x1B0012]))

+#define MCF_PWM_PWMCNT7                      (*(vuint8 *)(&__IPSBAR[0x1B0013]))

+#define MCF_PWM_PWMPER0                      (*(vuint8 *)(&__IPSBAR[0x1B0014]))

+#define MCF_PWM_PWMPER1                      (*(vuint8 *)(&__IPSBAR[0x1B0015]))

+#define MCF_PWM_PWMPER2                      (*(vuint8 *)(&__IPSBAR[0x1B0016]))

+#define MCF_PWM_PWMPER3                      (*(vuint8 *)(&__IPSBAR[0x1B0017]))

+#define MCF_PWM_PWMPER4                      (*(vuint8 *)(&__IPSBAR[0x1B0018]))

+#define MCF_PWM_PWMPER5                      (*(vuint8 *)(&__IPSBAR[0x1B0019]))

+#define MCF_PWM_PWMPER6                      (*(vuint8 *)(&__IPSBAR[0x1B001A]))

+#define MCF_PWM_PWMPER7                      (*(vuint8 *)(&__IPSBAR[0x1B001B]))

+#define MCF_PWM_PWMDTY0                      (*(vuint8 *)(&__IPSBAR[0x1B001C]))

+#define MCF_PWM_PWMDTY1                      (*(vuint8 *)(&__IPSBAR[0x1B001D]))

+#define MCF_PWM_PWMDTY2                      (*(vuint8 *)(&__IPSBAR[0x1B001E]))

+#define MCF_PWM_PWMDTY3                      (*(vuint8 *)(&__IPSBAR[0x1B001F]))

+#define MCF_PWM_PWMDTY4                      (*(vuint8 *)(&__IPSBAR[0x1B0020]))

+#define MCF_PWM_PWMDTY5                      (*(vuint8 *)(&__IPSBAR[0x1B0021]))

+#define MCF_PWM_PWMDTY6                      (*(vuint8 *)(&__IPSBAR[0x1B0022]))

+#define MCF_PWM_PWMDTY7                      (*(vuint8 *)(&__IPSBAR[0x1B0023]))

+#define MCF_PWM_PWMSDN                       (*(vuint8 *)(&__IPSBAR[0x1B0024]))

+#define MCF_PWM_PWMCNT(x)                    (*(vuint8 *)(&__IPSBAR[0x1B000C + ((x)*0x1)]))

+#define MCF_PWM_PWMPER(x)                    (*(vuint8 *)(&__IPSBAR[0x1B0014 + ((x)*0x1)]))

+#define MCF_PWM_PWMDTY(x)                    (*(vuint8 *)(&__IPSBAR[0x1B001C + ((x)*0x1)]))

+

+

+/* Bit definitions and macros for MCF_PWM_PWME */

+#define MCF_PWM_PWME_PWME0                   (0x1)

+#define MCF_PWM_PWME_PWME1                   (0x2)

+#define MCF_PWM_PWME_PWME2                   (0x4)

+#define MCF_PWM_PWME_PWME3                   (0x8)

+#define MCF_PWM_PWME_PWME4                   (0x10)

+#define MCF_PWM_PWME_PWME5                   (0x20)

+#define MCF_PWM_PWME_PWME6                   (0x40)

+#define MCF_PWM_PWME_PWME7                   (0x80)

+

+/* Bit definitions and macros for MCF_PWM_PWMPOL */

+#define MCF_PWM_PWMPOL_PPOL0                 (0x1)

+#define MCF_PWM_PWMPOL_PPOL1                 (0x2)

+#define MCF_PWM_PWMPOL_PPOL2                 (0x4)

+#define MCF_PWM_PWMPOL_PPOL3                 (0x8)

+#define MCF_PWM_PWMPOL_PPOL4                 (0x10)

+#define MCF_PWM_PWMPOL_PPOL5                 (0x20)

+#define MCF_PWM_PWMPOL_PPOL6                 (0x40)

+#define MCF_PWM_PWMPOL_PPOL7                 (0x80)

+

+/* Bit definitions and macros for MCF_PWM_PWMCLK */

+#define MCF_PWM_PWMCLK_PCLK0                 (0x1)

+#define MCF_PWM_PWMCLK_PCLK1                 (0x2)

+#define MCF_PWM_PWMCLK_PCLK2                 (0x4)

+#define MCF_PWM_PWMCLK_PCLK3                 (0x8)

+#define MCF_PWM_PWMCLK_PCLK4                 (0x10)

+#define MCF_PWM_PWMCLK_PCLK5                 (0x20)

+#define MCF_PWM_PWMCLK_PCLK6                 (0x40)

+#define MCF_PWM_PWMCLK_PCLK7                 (0x80)

+

+/* Bit definitions and macros for MCF_PWM_PWMPRCLK */

+#define MCF_PWM_PWMPRCLK_PCKA(x)             (((x)&0x7)<<0)

+#define MCF_PWM_PWMPRCLK_PCKB(x)             (((x)&0x7)<<0x4)

+

+/* Bit definitions and macros for MCF_PWM_PWMCAE */

+#define MCF_PWM_PWMCAE_CAE0                  (0x1)

+#define MCF_PWM_PWMCAE_CAE1                  (0x2)

+#define MCF_PWM_PWMCAE_CAE2                  (0x4)

+#define MCF_PWM_PWMCAE_CAE3                  (0x8)

+#define MCF_PWM_PWMCAE_CAE4                  (0x10)

+#define MCF_PWM_PWMCAE_CAE5                  (0x20)

+#define MCF_PWM_PWMCAE_CAE6                  (0x40)

+#define MCF_PWM_PWMCAE_CAE7                  (0x80)

+

+/* Bit definitions and macros for MCF_PWM_PWMCTL */

+#define MCF_PWM_PWMCTL_PFRZ                  (0x4)

+#define MCF_PWM_PWMCTL_PSWAI                 (0x8)

+#define MCF_PWM_PWMCTL_CON01                 (0x10)

+#define MCF_PWM_PWMCTL_CON23                 (0x20)

+#define MCF_PWM_PWMCTL_CON45                 (0x40)

+#define MCF_PWM_PWMCTL_CON67                 (0x80)

+

+/* Bit definitions and macros for MCF_PWM_PWMSCLA */

+#define MCF_PWM_PWMSCLA_SCALEA(x)            (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_PWM_PWMSCLB */

+#define MCF_PWM_PWMSCLB_SCALEB(x)            (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_PWM_PWMCNT */

+#define MCF_PWM_PWMCNT_COUNT(x)              (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_PWM_PWMPER */

+#define MCF_PWM_PWMPER_PERIOD(x)             (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_PWM_PWMDTY */

+#define MCF_PWM_PWMDTY_DUTY(x)               (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_PWM_PWMSDN */

+#define MCF_PWM_PWMSDN_SDNEN                 (0x1)

+#define MCF_PWM_PWMSDN_PWM7IL                (0x2)

+#define MCF_PWM_PWMSDN_PWM7IN                (0x4)

+#define MCF_PWM_PWMSDN_LVL                   (0x10)

+#define MCF_PWM_PWMSDN_RESTART               (0x20)

+#define MCF_PWM_PWMSDN_IE                    (0x40)

+#define MCF_PWM_PWMSDN_IF                    (0x80)

+

+

+#endif /* __MCF52235_PWM_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_QSPI.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_QSPI.h
new file mode 100644
index 00000000..bb55e96a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_QSPI.h
@@ -0,0 +1,78 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_QSPI_H__

+#define __MCF52235_QSPI_H__

+

+

+/*********************************************************************

+*

+* Queued Serial Peripheral Interface (QSPI)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_QSPI_QMR                         (*(vuint16*)(&__IPSBAR[0x340]))

+#define MCF_QSPI_QDLYR                       (*(vuint16*)(&__IPSBAR[0x344]))

+#define MCF_QSPI_QWR                         (*(vuint16*)(&__IPSBAR[0x348]))

+#define MCF_QSPI_QIR                         (*(vuint16*)(&__IPSBAR[0x34C]))

+#define MCF_QSPI_QAR                         (*(vuint16*)(&__IPSBAR[0x350]))

+#define MCF_QSPI_QDR                         (*(vuint16*)(&__IPSBAR[0x354]))

+

+

+/* Bit definitions and macros for MCF_QSPI_QMR */

+#define MCF_QSPI_QMR_BAUD(x)                 (((x)&0xFF)<<0)

+#define MCF_QSPI_QMR_CPHA                    (0x100)

+#define MCF_QSPI_QMR_CPOL                    (0x200)

+#define MCF_QSPI_QMR_BITS(x)                 (((x)&0xF)<<0xA)

+#define MCF_QSPI_QMR_DOHIE                   (0x4000)

+#define MCF_QSPI_QMR_MSTR                    (0x8000)

+

+/* Bit definitions and macros for MCF_QSPI_QDLYR */

+#define MCF_QSPI_QDLYR_DTL(x)                (((x)&0xFF)<<0)

+#define MCF_QSPI_QDLYR_QCD(x)                (((x)&0x7F)<<0x8)

+#define MCF_QSPI_QDLYR_SPE                   (0x8000)

+

+/* Bit definitions and macros for MCF_QSPI_QWR */

+#define MCF_QSPI_QWR_NEWQP(x)                (((x)&0xF)<<0)

+#define MCF_QSPI_QWR_CPTQP(x)                (((x)&0xF)<<0x4)

+#define MCF_QSPI_QWR_ENDQP(x)                (((x)&0xF)<<0x8)

+#define MCF_QSPI_QWR_CSIV                    (0x1000)

+#define MCF_QSPI_QWR_WRTO                    (0x2000)

+#define MCF_QSPI_QWR_WREN                    (0x4000)

+#define MCF_QSPI_QWR_HALT                    (0x8000)

+

+/* Bit definitions and macros for MCF_QSPI_QIR */

+#define MCF_QSPI_QIR_SPIF                    (0x1)

+#define MCF_QSPI_QIR_ABRT                    (0x4)

+#define MCF_QSPI_QIR_WCEF                    (0x8)

+#define MCF_QSPI_QIR_SPIFE                   (0x100)

+#define MCF_QSPI_QIR_ABRTE                   (0x400)

+#define MCF_QSPI_QIR_WCEFE                   (0x800)

+#define MCF_QSPI_QIR_ABRTL                   (0x1000)

+#define MCF_QSPI_QIR_ABRTB                   (0x4000)

+#define MCF_QSPI_QIR_WCEFB                   (0x8000)

+

+/* Bit definitions and macros for MCF_QSPI_QAR */

+#define MCF_QSPI_QAR_ADDR(x)                 (((x)&0x3F)<<0)

+#define MCF_QSPI_QAR_TRANS                   (0)

+#define MCF_QSPI_QAR_RECV                    (0x10)

+#define MCF_QSPI_QAR_CMD                     (0x20)

+

+/* Bit definitions and macros for MCF_QSPI_QDR */

+#define MCF_QSPI_QDR_DATA(x)                 (((x)&0xFFFF)<<0)

+#define MCF_QSPI_QDR_CONT                    (0x8000)

+#define MCF_QSPI_QDR_BITSE                   (0x4000)

+#define MCF_QSPI_QDR_DT                      (0x2000)

+#define MCF_QSPI_QDR_DSCK                    (0x1000)

+#define MCF_QSPI_QDR_QSPI_CS3                (0x800)

+#define MCF_QSPI_QDR_QSPI_CS2                (0x400)

+#define MCF_QSPI_QDR_QSPI_CS1                (0x200)

+#define MCF_QSPI_QDR_QSPI_CS0                (0x100)

+

+

+#endif /* __MCF52235_QSPI_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RCM.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RCM.h
new file mode 100644
index 00000000..dda8e5f9
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RCM.h
@@ -0,0 +1,45 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_RCM_H__

+#define __MCF52235_RCM_H__

+

+

+/*********************************************************************

+*

+* Reset Controller Module (RCM)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_RCM_RCR                          (*(vuint8 *)(&__IPSBAR[0x110000]))

+#define MCF_RCM_RSR                          (*(vuint8 *)(&__IPSBAR[0x110001]))

+#define MCF_RCM_CCR 		             (*(vuint16*)(&__IPSBAR[0x110004]))

+#define MCF_RCM_CIR		             (*(vuint16*)(&__IPSBAR[0x11000A]))

+

+/* Bit definitions and macros for MCF_RCM_RCR */

+#define MCF_RCM_RCR_LVDE                     (0x1)

+#define MCF_RCM_RCR_LVDRE                    (0x4)

+#define MCF_RCM_RCR_LVDIE                    (0x8)

+#define MCF_RCM_RCR_LVDF                     (0x10)

+#define MCF_RCM_RCR_FRCRSTOUT                (0x40)

+#define MCF_RCM_RCR_SOFTRST                  (0x80)

+

+/* Bit definitions and macros for MCF_RCM_RSR */

+#define MCF_RCM_RSR_LOL                      (0x1)

+#define MCF_RCM_RSR_LOC                      (0x2)

+#define MCF_RCM_RSR_EXT                      (0x4)

+#define MCF_RCM_RSR_POR                      (0x8)

+#define MCF_RCM_RSR_WDR			     (0x10)

+#define MCF_RCM_RSR_SOFT                     (0x20)

+#define MCF_RCM_RSR_LVD                      (0x40)

+

+/* Bit definitions and macros for MCF_RCM_CCR */

+#define MCF_RCM_CCR_LOAD		     (0x8000)

+

+

+#endif /* __MCF52235_RCM_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RNGA.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RNGA.h
new file mode 100644
index 00000000..53c4d017
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RNGA.h
@@ -0,0 +1,48 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_RNGA_H__

+#define __MCF52235_RNGA_H__

+

+

+/*********************************************************************

+*

+* Random Number Generator (RNG)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_RNGA_RNGCR                       (*(vuint32*)(&__IPSBAR[0x1F0000]))

+#define MCF_RNGA_RNGSR                       (*(vuint32*)(&__IPSBAR[0x1F0004]))

+#define MCF_RNGA_RNGER                       (*(vuint32*)(&__IPSBAR[0x1F0008]))

+#define MCF_RNGA_RNGOUT                      (*(vuint32*)(&__IPSBAR[0x1F000C]))

+

+

+/* Bit definitions and macros for MCF_RNGA_RNGCR */

+#define MCF_RNGA_RNGCR_GO                    (0x1)

+#define MCF_RNGA_RNGCR_HA                    (0x2)

+#define MCF_RNGA_RNGCR_IM                    (0x4)

+#define MCF_RNGA_RNGCR_CI                    (0x8)

+#define MCF_RNGA_RNGCR_SLM                   (0x10)

+

+/* Bit definitions and macros for MCF_RNGA_RNGSR */

+#define MCF_RNGA_RNGSR_SV                    (0x1)

+#define MCF_RNGA_RNGSR_LRS                   (0x2)

+#define MCF_RNGA_RNGSR_OUF                   (0x4)

+#define MCF_RNGA_RNGSR_EI                    (0x8)

+#define MCF_RNGA_RNGSR_SLP                   (0x10)

+#define MCF_RNGA_RNGSR_ORL(x)                (((x)&0xFF)<<0x8)

+#define MCF_RNGA_RNGSR_ORS(x)                (((x)&0xFF)<<0x10)

+

+/* Bit definitions and macros for MCF_RNGA_RNGER */

+#define MCF_RNGA_RNGER_ENT(x)                (((x)&0xFFFFFFFF)<<0)

+

+/* Bit definitions and macros for MCF_RNGA_RNGOUT */

+#define MCF_RNGA_RNGOUT_RANDOM_OUTPUT(x)     (((x)&0xFFFFFFFF)<<0)

+

+

+#endif /* __MCF52235_RNGA_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RTC.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RTC.h
new file mode 100644
index 00000000..a984b24d
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_RTC.h
@@ -0,0 +1,75 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_RTC_H__

+#define __MCF52235_RTC_H__

+

+

+/*********************************************************************

+*

+* Real-Time Clock (RTC)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_RTC_HOURMIN                      (*(vuint32*)(&__IPSBAR[0x3C0]))

+#define MCF_RTC_SECONDS                      (*(vuint32*)(&__IPSBAR[0x3C4]))

+#define MCF_RTC_ALRM_HM                      (*(vuint32*)(&__IPSBAR[0x3C8]))

+#define MCF_RTC_ALRM_SEC                     (*(vuint32*)(&__IPSBAR[0x3CC]))

+#define MCF_RTC_RTCCTL                       (*(vuint32*)(&__IPSBAR[0x3D0]))

+#define MCF_RTC_RTCISR                       (*(vuint32*)(&__IPSBAR[0x3D4]))

+#define MCF_RTC_RTCIENR                      (*(vuint32*)(&__IPSBAR[0x3D8]))

+#define MCF_RTC_STPWCH                       (*(vuint32*)(&__IPSBAR[0x3DC]))

+#define MCF_RTC_DAYS                         (*(vuint32*)(&__IPSBAR[0x3E0]))

+#define MCF_RTC_ALRM_DAY                     (*(vuint32*)(&__IPSBAR[0x3E4]))

+

+

+/* Bit definitions and macros for MCF_RTC_HOURMIN */

+#define MCF_RTC_HOURMIN_MINUTES(x)           (((x)&0x3F)<<0)

+#define MCF_RTC_HOURMIN_HOURS(x)             (((x)&0x1F)<<0x8)

+

+/* Bit definitions and macros for MCF_RTC_SECONDS */

+#define MCF_RTC_SECONDS_SECONDS(x)           (((x)&0x3F)<<0)

+

+/* Bit definitions and macros for MCF_RTC_ALRM_HM */

+#define MCF_RTC_ALRM_HM_MINUTES(x)           (((x)&0x3F)<<0)

+#define MCF_RTC_ALRM_HM_HOURS(x)             (((x)&0x1F)<<0x8)

+

+/* Bit definitions and macros for MCF_RTC_ALRM_SEC */

+#define MCF_RTC_ALRM_SEC_SECONDS(x)          (((x)&0x3F)<<0)

+

+/* Bit definitions and macros for MCF_RTC_RTCCTL */

+#define MCF_RTC_RTCCTL_SWR                   (0x1)

+#define MCF_RTC_RTCCTL_EN                    (0x80)

+

+/* Bit definitions and macros for MCF_RTC_RTCISR */

+#define MCF_RTC_RTCISR_SW                    (0x1)

+#define MCF_RTC_RTCISR_MIN                   (0x2)

+#define MCF_RTC_RTCISR_ALM                   (0x4)

+#define MCF_RTC_RTCISR_DAY                   (0x8)

+#define MCF_RTC_RTCISR_1HZ                   (0x10)

+#define MCF_RTC_RTCISR_HR                    (0x20)

+

+/* Bit definitions and macros for MCF_RTC_RTCIENR */

+#define MCF_RTC_RTCIENR_SW                   (0x1)

+#define MCF_RTC_RTCIENR_MIN                  (0x2)

+#define MCF_RTC_RTCIENR_ALM                  (0x4)

+#define MCF_RTC_RTCIENR_DAY                  (0x8)

+#define MCF_RTC_RTCIENR_1HZ                  (0x10)

+#define MCF_RTC_RTCIENR_HR                   (0x20)

+

+/* Bit definitions and macros for MCF_RTC_STPWCH */

+#define MCF_RTC_STPWCH_CNT(x)                (((x)&0x3F)<<0)

+

+/* Bit definitions and macros for MCF_RTC_DAYS */

+#define MCF_RTC_DAYS_DAYS(x)                 (((x)&0xFFFF)<<0)

+

+/* Bit definitions and macros for MCF_RTC_ALRM_DAY */

+#define MCF_RTC_ALRM_DAY_DAYSAL(x)           (((x)&0xFFFF)<<0)

+

+

+#endif /* __MCF52235_RTC_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_SCM.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_SCM.h
new file mode 100644
index 00000000..b50dc30a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_SCM.h
@@ -0,0 +1,201 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_SCM_H__

+#define __MCF52235_SCM_H__

+

+

+/*********************************************************************

+*

+* System Control Module (SCM)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_SCM_RAMBAR                       (*(vuint32*)(&__IPSBAR[0x8]))

+#define MCF_SCM_PPMRH                        (*(vuint32*)(&__IPSBAR[0xC]))

+#define MCF_SCM_CRSR                         (*(vuint8 *)(&__IPSBAR[0x10]))

+#define MCF_SCM_CWCR                         (*(vuint8 *)(&__IPSBAR[0x11]))

+#define MCF_SCM_CWSR                         (*(vuint8 *)(&__IPSBAR[0x13]))

+#define MCF_SCM_DMAREQC                      (*(vuint32*)(&__IPSBAR[0x14]))

+#define MCF_SCM_PPMRL                        (*(vuint32*)(&__IPSBAR[0x18]))

+#define MCF_SCM_MPARK                        (*(vuint32*)(&__IPSBAR[0x1C]))

+#define MCF_SCM_MPR                          (*(vuint8 *)(&__IPSBAR[0x20]))

+#define MCF_SCM_PPMRS                        (*(vuint8 *)(&__IPSBAR[0x21]))

+#define MCF_SCM_PPMRC                        (*(vuint8 *)(&__IPSBAR[0x22]))

+#define MCF_SCM_IPSBMT                       (*(vuint8 *)(&__IPSBAR[0x23]))

+#define MCF_SCM_PACR0                        (*(vuint8 *)(&__IPSBAR[0x24]))

+#define MCF_SCM_PACR1                        (*(vuint8 *)(&__IPSBAR[0x25]))

+#define MCF_SCM_PACR2                        (*(vuint8 *)(&__IPSBAR[0x26]))

+#define MCF_SCM_PACR3                        (*(vuint8 *)(&__IPSBAR[0x27]))

+#define MCF_SCM_PACR4                        (*(vuint8 *)(&__IPSBAR[0x28]))

+#define MCF_SCM_PACR5                        (*(vuint8 *)(&__IPSBAR[0x29]))

+#define MCF_SCM_PACR6                        (*(vuint8 *)(&__IPSBAR[0x2A]))

+#define MCF_SCM_PACR7                        (*(vuint8 *)(&__IPSBAR[0x2B]))

+#define MCF_SCM_PACR8                        (*(vuint8 *)(&__IPSBAR[0x2C]))

+#define MCF_SCM_GPACR0                       (*(vuint8 *)(&__IPSBAR[0x30]))

+#define MCF_SCM_GPACR1                       (*(vuint8 *)(&__IPSBAR[0x31]))

+#define MCF_SCM_PACR(x)                      (*(vuint8 *)(&__IPSBAR[0x24 + ((x)*0x1)]))

+#define MCF_SCM_GPACR(x)                     (*(vuint8 *)(&__IPSBAR[0x30 + ((x)*0x1)]))

+

+/* Other macros */

+#define MCF_SCM_IPSBAR                       (*(vuint32*)(&__IPSBAR[0x0]))

+#define MCF_SCM_IPSBAR_V                     (0x1)

+#define MCF_SCM_IPSBAR_BA(x)                 ((x)&0xC0000000)

+

+

+/* Bit definitions and macros for MCF_SCM_RAMBAR */

+#define MCF_SCM_RAMBAR_BDE                   (0x200)

+#define MCF_SCM_RAMBAR_BA(x)                 ((x)&0xFFFF0000)

+

+/* Bit definitions and macros for MCF_SCM_PPMRH */

+#define MCF_SCM_PPMRH_CDPORTS                (0x1)

+#define MCF_SCM_PPMRH_CDEPORT                (0x2)

+#define MCF_SCM_PPMRH_CDPIT0                 (0x8)

+#define MCF_SCM_PPMRH_CDPIT1                 (0x10)

+#define MCF_SCM_PPMRH_CDADC                  (0x80)

+#define MCF_SCM_PPMRH_CDGPT                  (0x100)

+#define MCF_SCM_PPMRH_CDPWM                  (0x200)

+#define MCF_SCM_PPMRH_CDFCAN                 (0x400)

+#define MCF_SCM_PPMRH_CDCFM                  (0x800)

+#define MCF_SCM_PPMRH_CDEPHY                 (0x1000)

+#define MCF_SCM_PPMRH_CDRNGA                 (0x2000)

+

+/* Bit definitions and macros for MCF_SCM_CRSR */

+#define MCF_SCM_CRSR_CWDR  		     (0x20)

+#define MCF_SCM_CRSR_EXT                     (0x80)

+

+/* Bit definitions and macros for MCF_SCM_CWCR */

+#define MCF_SCM_CWCR_CWTIF                   (0x1)

+#define MCF_SCM_CWCR_CWTAVAL                 (0x2)

+#define MCF_SCM_CWCR_CWTA                    (0x4)

+#define MCF_SCM_CWCR_CWT(x)                  (((x)&0x7)<<0x3)

+#define MCF_SCM_CWCR_CWT_2_9                 (0)

+#define MCF_SCM_CWCR_CWT_2_11                (0x8)

+#define MCF_SCM_CWCR_CWT_2_13                (0x10)

+#define MCF_SCM_CWCR_CWT_2_15                (0x18)

+#define MCF_SCM_CWCR_CWT_2_19                (0x20)

+#define MCF_SCM_CWCR_CWT_2_23                (0x28)

+#define MCF_SCM_CWCR_CWT_2_27                (0x30)

+#define MCF_SCM_CWCR_CWT_2_31                (0x38)

+#define MCF_SCM_CWCR_CWRI                    (0x40)

+#define MCF_SCM_CWCR_CWE                     (0x80)

+

+/* Bit definitions and macros for MCF_SCM_CWSR */

+#define MCF_SCM_CWSR_CWSR(x)                 (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_SCM_DMAREQC */

+#define MCF_SCM_DMAREQC_DMAC0(x)             (((x)&0xF)<<0)

+#define MCF_SCM_DMAREQC_DMAC1(x)             (((x)&0xF)<<0x4)

+#define MCF_SCM_DMAREQC_DMAC2(x)             (((x)&0xF)<<0x8)

+#define MCF_SCM_DMAREQC_DMAC3(x)             (((x)&0xF)<<0xC)

+

+/* Bit definitions and macros for MCF_SCM_PPMRL */

+#define MCF_SCM_PPMRL_CDG                    (0x2)

+#define MCF_SCM_PPMRL_CDDMA                  (0x10)

+#define MCF_SCM_PPMRL_CDUART0                (0x20)

+#define MCF_SCM_PPMRL_CDUART1                (0x40)

+#define MCF_SCM_PPMRL_CDUART2                (0x80)

+#define MCF_SCM_PPMRL_CDI2C                  (0x200)

+#define MCF_SCM_PPMRL_CDQSPI                 (0x400)

+#define MCF_SCM_PPMRL_CDRTC                  (0x1000)

+#define MCF_SCM_PPMRL_CDTMR0                 (0x2000)

+#define MCF_SCM_PPMRL_CDTMR1                 (0x4000)

+#define MCF_SCM_PPMRL_CDTMR2                 (0x8000)

+#define MCF_SCM_PPMRL_CDTMR3                 (0x10000)

+#define MCF_SCM_PPMRL_CDINTC0                (0x20000)

+#define MCF_SCM_PPMRL_CDINTC1                (0x40000)

+#define MCF_SCM_PPMRL_CDFEC0                 (0x200000)

+

+/* Bit definitions and macros for MCF_SCM_MPARK */

+#define MCF_SCM_MPARK_LCKOUT_TIME(x)         (((x)&0xF)<<0x8)

+#define MCF_SCM_MPARK_PRKLAST                (0x1000)

+#define MCF_SCM_MPARK_TIMEOUT                (0x2000)

+#define MCF_SCM_MPARK_FIXED                  (0x4000)

+#define MCF_SCM_MPARK_M1_PRTY(x)             (((x)&0x3)<<0x10)

+#define MCF_SCM_MPARK_M0_PRTY(x)             (((x)&0x3)<<0x12)

+#define MCF_SCM_MPARK_M2_PRTY(x)             (((x)&0x3)<<0x14)

+#define MCF_SCM_MPARK_BCR24BIT               (0x1000000)

+#define MCF_SCM_MPARK_M2_P_EN                (0x2000000)

+

+/* Bit definitions and macros for MCF_SCM_MPR */

+#define MCF_SCM_MPR_MPR(x)                   (((x)&0xF)<<0)

+

+/* Bit definitions and macros for MCF_SCM_PPMRS */

+#define MCF_SCM_PPMRS_PPMRS(x)               (((x)&0x7F)<<0)

+#define MCF_SCM_PPMRS_DISABLE_ALL            (0x40)

+#define MCF_SCM_PPMRS_DISABLE_CFM            (0x2B)

+#define MCF_SCM_PPMRS_DISABLE_CAN            (0x2A)

+#define MCF_SCM_PPMRS_DISABLE_PWM            (0x29)

+#define MCF_SCM_PPMRS_DISABLE_GPT            (0x28)

+#define MCF_SCM_PPMRS_DISABLE_ADC            (0x27)

+#define MCF_SCM_PPMRS_DISABLE_PIT1           (0x24)

+#define MCF_SCM_PPMRS_DISABLE_PIT0           (0x23)

+#define MCF_SCM_PPMRS_DISABLE_EPORT          (0x21)

+#define MCF_SCM_PPMRS_DISABLE_PORTS          (0x20)

+#define MCF_SCM_PPMRS_DISABLE_INTC           (0x11)

+#define MCF_SCM_PPMRS_DISABLE_DTIM3          (0x10)

+#define MCF_SCM_PPMRS_DISABLE_DTIM2          (0xF)

+#define MCF_SCM_PPMRS_DISABLE_DTIM1          (0xE)

+#define MCF_SCM_PPMRS_DISABLE_DTIM0          (0xD)

+#define MCF_SCM_PPMRS_DISABLE_QSPI           (0xA)

+#define MCF_SCM_PPMRS_DISABLE_I2C            (0x9)

+#define MCF_SCM_PPMRS_DISABLE_UART2          (0x7)

+#define MCF_SCM_PPMRS_DISABLE_UART1          (0x6)

+#define MCF_SCM_PPMRS_DISABLE_UART0          (0x5)

+#define MCF_SCM_PPMRS_DISABLE_DMA            (0x4)

+#define MCF_SCM_PPMRS_SET_CDG                (0x1)

+

+/* Bit definitions and macros for MCF_SCM_PPMRC */

+#define MCF_SCM_PPMRC_PPMRC(x)               (((x)&0x7F)<<0)

+#define MCF_SCM_PPMRC_ENABLE_ALL             (0x40)

+#define MCF_SCM_PPMRC_ENABLE_CFM             (0x2B)

+#define MCF_SCM_PPMRC_ENABLE_CAN             (0x2A)

+#define MCF_SCM_PPMRC_ENABLE_PWM             (0x29)

+#define MCF_SCM_PPMRC_ENABLE_GPT             (0x28)

+#define MCF_SCM_PPMRC_ENABLE_ADC             (0x27)

+#define MCF_SCM_PPMRC_ENABLE_PIT1            (0x24)

+#define MCF_SCM_PPMRC_ENABLE_PIT0            (0x23)

+#define MCF_SCM_PPMRC_ENABLE_EPORT           (0x21)

+#define MCF_SCM_PPMRC_ENABLE_PORTS           (0x20)

+#define MCF_SCM_PPMRC_ENABLE_INTC            (0x11)

+#define MCF_SCM_PPMRC_ENABLE_DTIM3           (0x10)

+#define MCF_SCM_PPMRC_ENABLE_DTIM2           (0xF)

+#define MCF_SCM_PPMRC_ENABLE_DTIM1           (0xE)

+#define MCF_SCM_PPMRC_ENABLE_DTIM0           (0xD)

+#define MCF_SCM_PPMRC_ENABLE_QSPI            (0xA)

+#define MCF_SCM_PPMRC_ENABLE_I2C             (0x9)

+#define MCF_SCM_PPMRC_ENABLE_UART2           (0x7)

+#define MCF_SCM_PPMRC_ENABLE_UART1           (0x6)

+#define MCF_SCM_PPMRC_ENABLE_UART0           (0x5)

+#define MCF_SCM_PPMRC_ENABLE_DMA             (0x4)

+#define MCF_SCM_PPMRC_CLEAR_CDG              (0x1)

+

+/* Bit definitions and macros for MCF_SCM_IPSBMT */

+#define MCF_SCM_IPSBMT_BMT(x)                (((x)&0x7)<<0)

+#define MCF_SCM_IPSBMT_BMT_CYCLES_1024       (0)

+#define MCF_SCM_IPSBMT_BMT_CYCLES_512        (0x1)

+#define MCF_SCM_IPSBMT_BMT_CYCLES_256        (0x2)

+#define MCF_SCM_IPSBMT_BMT_CYCLES_128        (0x3)

+#define MCF_SCM_IPSBMT_BMT_CYCLES_64         (0x4)

+#define MCF_SCM_IPSBMT_BMT_CYCLES_32         (0x5)

+#define MCF_SCM_IPSBMT_BMT_CYCLES_16         (0x6)

+#define MCF_SCM_IPSBMT_BMT_CYCLES_8          (0x7)

+#define MCF_SCM_IPSBMT_BME                   (0x8)

+

+/* Bit definitions and macros for MCF_SCM_PACR */

+#define MCF_SCM_PACR_ACCESS_CTRL0(x)         (((x)&0x7)<<0)

+#define MCF_SCM_PACR_LOCK0                   (0x8)

+#define MCF_SCM_PACR_ACCESS_CTRL1(x)         (((x)&0x7)<<0x4)

+#define MCF_SCM_PACR_LOCK1                   (0x80)

+

+/* Bit definitions and macros for MCF_SCM_GPACR */

+#define MCF_SCM_GPACR_ACCESS_CTRL(x)         (((x)&0xF)<<0)

+#define MCF_SCM_GPACR_LOCK                   (0x80)

+

+

+#endif /* __MCF52235_SCM_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_UART.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_UART.h
new file mode 100644
index 00000000..40ae73ba
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/MCF5223x/MCF52235_UART.h
@@ -0,0 +1,194 @@
+/* Coldfire C Header File

+ * Copyright Freescale Semiconductor Inc

+ * All rights reserved.

+ *

+ * 2007/03/19 Revision: 0.91

+ */

+

+#ifndef __MCF52235_UART_H__

+#define __MCF52235_UART_H__

+

+

+/*********************************************************************

+*

+* Universal Asynchronous Receiver Transmitter (UART)

+*

+*********************************************************************/

+

+/* Register read/write macros */

+#define MCF_UART0_UMR1                       (*(vuint8 *)(&__IPSBAR[0x200]))

+#define MCF_UART0_UMR2                       (*(vuint8 *)(&__IPSBAR[0x200]))

+#define MCF_UART0_USR                        (*(vuint8 *)(&__IPSBAR[0x204]))

+#define MCF_UART0_UCSR                       (*(vuint8 *)(&__IPSBAR[0x204]))

+#define MCF_UART0_UCR                        (*(vuint8 *)(&__IPSBAR[0x208]))

+#define MCF_UART0_URB                        (*(vuint8 *)(&__IPSBAR[0x20C]))

+#define MCF_UART0_UTB                        (*(vuint8 *)(&__IPSBAR[0x20C]))

+#define MCF_UART0_UIPCR                      (*(vuint8 *)(&__IPSBAR[0x210]))

+#define MCF_UART0_UACR                       (*(vuint8 *)(&__IPSBAR[0x210]))

+#define MCF_UART0_UIMR                       (*(vuint8 *)(&__IPSBAR[0x214]))

+#define MCF_UART0_UISR                       (*(vuint8 *)(&__IPSBAR[0x214]))

+#define MCF_UART0_UBG1                       (*(vuint8 *)(&__IPSBAR[0x218]))

+#define MCF_UART0_UBG2                       (*(vuint8 *)(&__IPSBAR[0x21C]))

+#define MCF_UART0_UIP                        (*(vuint8 *)(&__IPSBAR[0x234]))

+#define MCF_UART0_UOP1                       (*(vuint8 *)(&__IPSBAR[0x238]))

+#define MCF_UART0_UOP0                       (*(vuint8 *)(&__IPSBAR[0x23C]))

+

+#define MCF_UART1_UMR1                       (*(vuint8 *)(&__IPSBAR[0x240]))

+#define MCF_UART1_UMR2                       (*(vuint8 *)(&__IPSBAR[0x240]))

+#define MCF_UART1_USR                        (*(vuint8 *)(&__IPSBAR[0x244]))

+#define MCF_UART1_UCSR                       (*(vuint8 *)(&__IPSBAR[0x244]))

+#define MCF_UART1_UCR                        (*(vuint8 *)(&__IPSBAR[0x248]))

+#define MCF_UART1_URB                        (*(vuint8 *)(&__IPSBAR[0x24C]))

+#define MCF_UART1_UTB                        (*(vuint8 *)(&__IPSBAR[0x24C]))

+#define MCF_UART1_UIPCR                      (*(vuint8 *)(&__IPSBAR[0x250]))

+#define MCF_UART1_UACR                       (*(vuint8 *)(&__IPSBAR[0x250]))

+#define MCF_UART1_UIMR                       (*(vuint8 *)(&__IPSBAR[0x254]))

+#define MCF_UART1_UISR                       (*(vuint8 *)(&__IPSBAR[0x254]))

+#define MCF_UART1_UBG1                       (*(vuint8 *)(&__IPSBAR[0x258]))

+#define MCF_UART1_UBG2                       (*(vuint8 *)(&__IPSBAR[0x25C]))

+#define MCF_UART1_UIP                        (*(vuint8 *)(&__IPSBAR[0x274]))

+#define MCF_UART1_UOP1                       (*(vuint8 *)(&__IPSBAR[0x278]))

+#define MCF_UART1_UOP0                       (*(vuint8 *)(&__IPSBAR[0x27C]))

+

+#define MCF_UART2_UMR1                       (*(vuint8 *)(&__IPSBAR[0x280]))

+#define MCF_UART2_UMR2                       (*(vuint8 *)(&__IPSBAR[0x280]))

+#define MCF_UART2_USR                        (*(vuint8 *)(&__IPSBAR[0x284]))

+#define MCF_UART2_UCSR                       (*(vuint8 *)(&__IPSBAR[0x284]))

+#define MCF_UART2_UCR                        (*(vuint8 *)(&__IPSBAR[0x288]))

+#define MCF_UART2_URB                        (*(vuint8 *)(&__IPSBAR[0x28C]))

+#define MCF_UART2_UTB                        (*(vuint8 *)(&__IPSBAR[0x28C]))

+#define MCF_UART2_UIPCR                      (*(vuint8 *)(&__IPSBAR[0x290]))

+#define MCF_UART2_UACR                       (*(vuint8 *)(&__IPSBAR[0x290]))

+#define MCF_UART2_UIMR                       (*(vuint8 *)(&__IPSBAR[0x294]))

+#define MCF_UART2_UISR                       (*(vuint8 *)(&__IPSBAR[0x294]))

+#define MCF_UART2_UBG1                       (*(vuint8 *)(&__IPSBAR[0x298]))

+#define MCF_UART2_UBG2                       (*(vuint8 *)(&__IPSBAR[0x29C]))

+#define MCF_UART2_UIP                        (*(vuint8 *)(&__IPSBAR[0x2B4]))

+#define MCF_UART2_UOP1                       (*(vuint8 *)(&__IPSBAR[0x2B8]))

+#define MCF_UART2_UOP0                       (*(vuint8 *)(&__IPSBAR[0x2BC]))

+

+#define MCF_UART_UMR(x)                      (*(vuint8 *)(&__IPSBAR[0x200 + ((x)*0x40)]))

+#define MCF_UART_USR(x)                      (*(vuint8 *)(&__IPSBAR[0x204 + ((x)*0x40)]))

+#define MCF_UART_UCSR(x)                     (*(vuint8 *)(&__IPSBAR[0x204 + ((x)*0x40)]))

+#define MCF_UART_UCR(x)                      (*(vuint8 *)(&__IPSBAR[0x208 + ((x)*0x40)]))

+#define MCF_UART_URB(x)                      (*(vuint8 *)(&__IPSBAR[0x20C + ((x)*0x40)]))

+#define MCF_UART_UTB(x)                      (*(vuint8 *)(&__IPSBAR[0x20C + ((x)*0x40)]))

+#define MCF_UART_UIPCR(x)                    (*(vuint8 *)(&__IPSBAR[0x210 + ((x)*0x40)]))

+#define MCF_UART_UACR(x)                     (*(vuint8 *)(&__IPSBAR[0x210 + ((x)*0x40)]))

+#define MCF_UART_UIMR(x)                     (*(vuint8 *)(&__IPSBAR[0x214 + ((x)*0x40)]))

+#define MCF_UART_UISR(x)                     (*(vuint8 *)(&__IPSBAR[0x214 + ((x)*0x40)]))

+#define MCF_UART_UBG1(x)                     (*(vuint8 *)(&__IPSBAR[0x218 + ((x)*0x40)]))

+#define MCF_UART_UBG2(x)                     (*(vuint8 *)(&__IPSBAR[0x21C + ((x)*0x40)]))

+#define MCF_UART_UIP(x)                      (*(vuint8 *)(&__IPSBAR[0x234 + ((x)*0x40)]))

+#define MCF_UART_UOP1(x)                     (*(vuint8 *)(&__IPSBAR[0x238 + ((x)*0x40)]))

+#define MCF_UART_UOP0(x)                     (*(vuint8 *)(&__IPSBAR[0x23C + ((x)*0x40)]))

+

+/* Bit definitions and macros for MCF_UART_UMR */

+#define MCF_UART_UMR_BC(x)                   (((x)&0x3)<<0)

+#define MCF_UART_UMR_BC_5                    (0)

+#define MCF_UART_UMR_BC_6                    (0x1)

+#define MCF_UART_UMR_BC_7                    (0x2)

+#define MCF_UART_UMR_BC_8                    (0x3)

+#define MCF_UART_UMR_PT                      (0x4)

+#define MCF_UART_UMR_PM(x)                   (((x)&0x3)<<0x3)

+#define MCF_UART_UMR_ERR                     (0x20)

+#define MCF_UART_UMR_RXIRQ                   (0x40)

+#define MCF_UART_UMR_RXRTS                   (0x80)

+#define MCF_UART_UMR_PM_MULTI_ADDR           (0x1C)

+#define MCF_UART_UMR_PM_MULTI_DATA           (0x18)

+#define MCF_UART_UMR_PM_NONE                 (0x10)

+#define MCF_UART_UMR_PM_FORCE_HI             (0xC)

+#define MCF_UART_UMR_PM_FORCE_LO             (0x8)

+#define MCF_UART_UMR_PM_ODD                  (0x4)

+#define MCF_UART_UMR_PM_EVEN                 (0)

+#define MCF_UART_UMR_SB(x)                   (((x)&0xF)<<0)

+#define MCF_UART_UMR_SB_STOP_BITS_1          (0x7)

+#define MCF_UART_UMR_SB_STOP_BITS_15         (0x8)

+#define MCF_UART_UMR_SB_STOP_BITS_2          (0xF)

+#define MCF_UART_UMR_TXCTS                   (0x10)

+#define MCF_UART_UMR_TXRTS                   (0x20)

+#define MCF_UART_UMR_CM(x)                   (((x)&0x3)<<0x6)

+#define MCF_UART_UMR_CM_NORMAL               (0)

+#define MCF_UART_UMR_CM_ECHO                 (0x40)

+#define MCF_UART_UMR_CM_LOCAL_LOOP           (0x80)

+#define MCF_UART_UMR_CM_REMOTE_LOOP          (0xC0)

+

+/* Bit definitions and macros for MCF_UART_USR */

+#define MCF_UART_USR_RXRDY                   (0x1)

+#define MCF_UART_USR_FFULL                   (0x2)

+#define MCF_UART_USR_TXRDY                   (0x4)

+#define MCF_UART_USR_TXEMP                   (0x8)

+#define MCF_UART_USR_OE                      (0x10)

+#define MCF_UART_USR_PE                      (0x20)

+#define MCF_UART_USR_FE                      (0x40)

+#define MCF_UART_USR_RB                      (0x80)

+

+/* Bit definitions and macros for MCF_UART_UCSR */

+#define MCF_UART_UCSR_TCS(x)                 (((x)&0xF)<<0)

+#define MCF_UART_UCSR_TCS_SYS_CLK            (0xD)

+#define MCF_UART_UCSR_TCS_CTM16              (0xE)

+#define MCF_UART_UCSR_TCS_CTM                (0xF)

+#define MCF_UART_UCSR_RCS(x)                 (((x)&0xF)<<0x4)

+#define MCF_UART_UCSR_RCS_SYS_CLK            (0xD0)

+#define MCF_UART_UCSR_RCS_CTM16              (0xE0)

+#define MCF_UART_UCSR_RCS_CTM                (0xF0)

+

+/* Bit definitions and macros for MCF_UART_UCR */

+#define MCF_UART_UCR_RC(x)                   (((x)&0x3)<<0)

+#define MCF_UART_UCR_RX_ENABLED              (0x1)

+#define MCF_UART_UCR_RX_DISABLED             (0x2)

+#define MCF_UART_UCR_TC(x)                   (((x)&0x3)<<0x2)

+#define MCF_UART_UCR_TX_ENABLED              (0x4)

+#define MCF_UART_UCR_TX_DISABLED             (0x8)

+#define MCF_UART_UCR_MISC(x)                 (((x)&0x7)<<0x4)

+#define MCF_UART_UCR_NONE                    (0)

+#define MCF_UART_UCR_RESET_MR                (0x10)

+#define MCF_UART_UCR_RESET_RX                (0x20)

+#define MCF_UART_UCR_RESET_TX                (0x30)

+#define MCF_UART_UCR_RESET_ERROR             (0x40)

+#define MCF_UART_UCR_RESET_BKCHGINT          (0x50)

+#define MCF_UART_UCR_START_BREAK             (0x60)

+#define MCF_UART_UCR_STOP_BREAK              (0x70)

+

+/* Bit definitions and macros for MCF_UART_URB */

+#define MCF_UART_URB_RB(x)                   (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_UART_UTB */

+#define MCF_UART_UTB_TB(x)                   (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_UART_UIPCR */

+#define MCF_UART_UIPCR_CTS                   (0x1)

+#define MCF_UART_UIPCR_COS                   (0x10)

+

+/* Bit definitions and macros for MCF_UART_UACR */

+#define MCF_UART_UACR_IEC                    (0x1)

+

+/* Bit definitions and macros for MCF_UART_UIMR */

+#define MCF_UART_UIMR_TXRDY                  (0x1)

+#define MCF_UART_UIMR_FFULL_RXRDY            (0x2)

+#define MCF_UART_UIMR_DB                     (0x4)

+#define MCF_UART_UIMR_COS                    (0x80)

+

+/* Bit definitions and macros for MCF_UART_UISR */

+#define MCF_UART_UISR_TXRDY                  (0x1)

+#define MCF_UART_UISR_FFULL_RXRDY            (0x2)

+#define MCF_UART_UISR_DB                     (0x4)

+#define MCF_UART_UISR_COS                    (0x80)

+

+/* Bit definitions and macros for MCF_UART_UBG1 */

+#define MCF_UART_UBG1_Divider_MSB(x)         (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_UART_UBG2 */

+#define MCF_UART_UBG2_Divider_LSB(x)         (((x)&0xFF)<<0)

+

+/* Bit definitions and macros for MCF_UART_UIP */

+#define MCF_UART_UIP_CTS                     (0x1)

+

+/* Bit definitions and macros for MCF_UART_UOP1 */

+#define MCF_UART_UOP1_RTS                    (0x1)

+

+/* Bit definitions and macros for MCF_UART_UOP0 */

+#define MCF_UART_UOP0_RTS                    (0x1)

+

+

+#endif /* __MCF52235_UART_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/Makefile b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/Makefile
new file mode 100644
index 00000000..1bf02513
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/Makefile
@@ -0,0 +1,162 @@
+RM := rm -rf

+

+# Set the optimisation level - this should be set to 0, 1, 2, 3 or s (s for size).

+OPTIM=0

+

+###############################################################################

+# List the directories that contain files to be built.

+###############################################################################

+

+# These two directories contain the FreeRTOS.org kernel source files.

+FREERTOS_SOURCE_DIR=./../../../Source

+PORT_SOURCE_DIR=./../../../Source/portable/GCC/ColdFire_V2

+

+# This directory contains the standard demo files that get included in every

+# FreeRTOS.org demo.  They define tasks that demonstrate the API usage and 

+# test the FreeRTOS.org port.

+COMMON_DEMO_SOURCE_DIR=./../../Common/Minimal

+

+# This directory contains the modified uIP code

+FREERTOS_uIP_DIR=./../../Common/ethernet/FreeRTOS-uIP

+

+VPATH=		$(FREERTOS_SOURCE_DIR) : \

+			$(PORT_SOURCE_DIR) : \

+			$(COMMON_DEMO_SOURCE_DIR) : \

+			$(FREERTOS_SOURCE_DIR)/portable/MemMang : \

+			$(FREERTOS_uIP_DIR) : \

+			. : \

+			./webserver : \

+			./ParTest : \

+			./serial

+

+

+###############################################################################

+# Define a few constants to be used during the build.

+###############################################################################

+

+OUTPUT_DIR=./bin

+CPU=52235

+LINKER_SCRIPT=m52235evb-rom-hosted.ld

+SREC_FILENAME=RTOSDemo.s19

+ELF_FILENAME=RTOSDemo.elf

+CC=m68k-elf-gcc

+AS=m68K-elf-as

+OBJCOPY=m68K-elf-objcopy

+

+

+###############################################################################

+# List the files to include in the build.  These files will be located from the

+# VPATH defined above.

+###############################################################################

+

+# The FreeRTOS.org source files.

+FreeRTOS_OBJS=			$(OUTPUT_DIR)/portasm.o \

+						$(OUTPUT_DIR)/port.o \

+						$(OUTPUT_DIR)/list.o \

+						$(OUTPUT_DIR)/tasks.o \

+						$(OUTPUT_DIR)/queue.o \

+						$(OUTPUT_DIR)/heap_1.o

+

+# The demo app source files, including the basic WEB server.

+Demo_OBJS=				$(OUTPUT_DIR)/main.o \

+						$(OUTPUT_DIR)/ParTest.o \

+						$(OUTPUT_DIR)/flash.o \

+						$(OUTPUT_DIR)/FreeRTOS_Tick_Setup.o \

+						$(OUTPUT_DIR)/BlockQ.o \

+						$(OUTPUT_DIR)/PollQ.o \

+						$(OUTPUT_DIR)/semtest.o \

+						$(OUTPUT_DIR)/GenQTest.o \

+						$(OUTPUT_DIR)/QPeek.o \

+						$(OUTPUT_DIR)/FEC.o

+

+HTTP_OBJS=				$(OUTPUT_DIR)/uIP_Task.o \

+						$(OUTPUT_DIR)/httpd.o \

+						$(OUTPUT_DIR)/httpd-cgi.o \

+						$(OUTPUT_DIR)/httpd-fs.o \

+						$(OUTPUT_DIR)/http-strings.o

+

+# uIP source files

+uIP_OBJS=				$(OUTPUT_DIR)/timer.o \

+						$(OUTPUT_DIR)/uip.o \

+						$(OUTPUT_DIR)/uip_arp.o \

+						$(OUTPUT_DIR)/uiplib.o \

+						$(OUTPUT_DIR)/uip-split.o \

+						$(OUTPUT_DIR)/psock.o

+

+OBJS = $(FreeRTOS_OBJS) $(Demo_OBJS) $(uIP_OBJS) $(HTTP_OBJS)

+			

+C_DEPS = $(OBJS:.o=.d)

+

+INCLUDE_PATHS=	-I./webserver \

+				-I"$(FREERTOS_uIP_DIR)" \

+				-I"$(FREERTOS_SOURCE_DIR)/include" \

+				-I"include" \

+				-I"$(COMMON_DEMO_SOURCE_DIR)/../include" \

+				-I"$(PORT_SOURCE_DIR)" \

+				-I./MCF5223x \

+				-I.

+

+CFLAGS=		$(INCLUDE_PATHS) \

+			-D COLDFIRE_V2_GCC \

+			-D PACK_STRUCT_END=__attribute\(\(packed\)\) \

+			-D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) \

+			-O$(OPTIM) \

+			-fno-strict-aliasing \

+			-g3 \

+			-gdwarf-2 \

+			-Wall \

+			-Wextra \

+			-c \

+			-ffunction-sections \

+			-fdata-sections \

+			-fmessage-length=0 \

+			-funsigned-char \

+			-Wextra \

+			-mcpu=$(CPU) \

+			-MMD \

+			-MP \

+			-MF"$(@:%.o=%.d)" \

+			-MT"$(@:%.o=%.d)"

+

+ASFLAGS= 	-m52235 \

+			-g3 \

+			--register-prefix-optional \

+            --bitwise-or

+

+LIBS=

+

+# Add inputs and outputs from these tool invocations to the build variables 

+

+# All Target

+all: $(OUTPUT_DIR)/$(SREC_FILENAME)

+

+# Tool invocations 

+$(OUTPUT_DIR)/$(SREC_FILENAME): $(OUTPUT_DIR)/$(ELF_FILENAME)

+	$(OBJCOPY) $(OUTPUT_DIR)/$(ELF_FILENAME) -O srec $(OUTPUT_DIR)/$(SREC_FILENAME)

+

+$(OUTPUT_DIR)/$(ELF_FILENAME): $(OBJS)

+	$(CC) -nostartfiles --gc-sections -Xlinker -Map=$(OUTPUT_DIR)/output.map -mcpu=$(CPU) -T $(LINKER_SCRIPT) -o"$(OUTPUT_DIR)/$(ELF_FILENAME)"  $(OBJS) $(USER_OBJS) $(LIBS)

+

+$(OUTPUT_DIR)/%.o: %.c Makefile

+	$(CC) $(CFLAGS)	-o"$@" "$<"

+

+$(OUTPUT_DIR)/%.o: %.S

+	$(AS) $(ASFLAGS) -o"$@" "$<"

+

+# Other Targets

+clean:

+	-$(RM) $(OBJS) $(C_DEPS) $(EXECUTABLES) $(OUTPUT_DIR)/$(ELF_FILENAME) $(OUTPUT_DIR)/$(SREC_FILENAME)

+	-@echo ' '

+

+#

+# The rule to create the target directory

+#

+$(OUTPUT_DIR):

+	@mkdir $(OUTPUT_DIR)

+

+

+.PHONY: all clean dependents

+.SECONDARY: post-build

+

+-include $(wildcard $(OUTPUT_DIR)/*.d) __dummy__

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/ParTest/ParTest.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/ParTest/ParTest.c
new file mode 100644
index 00000000..b9b9a99d
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/ParTest/ParTest.c
@@ -0,0 +1,112 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+    ***************************************************************************

+    ***************************************************************************

+    *                                                                         *

+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *

+    * and even write all or part of your application on your behalf.          *

+    * See http://www.OpenRTOS.com for details of the services we provide to   *

+    * expedite your project.                                                  *

+    *                                                                         *

+    ***************************************************************************

+    ***************************************************************************

+

+	Please ensure to read the configuration and relevant port sections of the

+	online documentation.

+

+	http://www.FreeRTOS.org - Documentation, latest information, license and

+	contact details.

+

+	http://www.SafeRTOS.com - A version that is certified for use in safety

+	critical systems.

+

+	http://www.OpenRTOS.com - Commercial support, development, porting,

+	licensing and training services.

+*/

+

+#include "FreeRTOS.h"

+#include "task.h"

+#include "partest.h"

+

+#define partstNUM_LEDs	4

+

+/*-----------------------------------------------------------

+ * Simple parallel port IO routines.

+ *-----------------------------------------------------------*/

+

+void vParTestInitialise( void )

+{

+    /* Ensure LED outputs are set to GPIO */

+    MCF_GPIO_PTCPAR = MCF_GPIO_PTCPAR_DTIN3_GPIO | MCF_GPIO_PTCPAR_DTIN2_GPIO | MCF_GPIO_PTCPAR_DTIN1_GPIO | MCF_GPIO_PTCPAR_DTIN0_GPIO;

+

+    /* Set GPIO to outputs. */

+    MCF_GPIO_DDRTC = MCF_GPIO_DDRTC_DDRTC3 | MCF_GPIO_DDRTC_DDRTC2 | MCF_GPIO_DDRTC_DDRTC1 | MCF_GPIO_DDRTC_DDRTC0;

+

+    /* Start with all LEDs off. */

+	MCF_GPIO_PORTTC = 0x00;

+}

+/*-----------------------------------------------------------*/

+

+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )

+{

+	if( uxLED < partstNUM_LEDs )

+	{

+		if( xValue != 0 )

+		{

+			taskENTER_CRITICAL();

+				MCF_GPIO_PORTTC |= ( 1 << uxLED );

+			taskEXIT_CRITICAL();

+		}

+		else

+		{

+			taskENTER_CRITICAL();

+				MCF_GPIO_PORTTC &= ~( 1 << uxLED );

+			taskEXIT_CRITICAL();

+		}

+	}

+}

+/*-----------------------------------------------------------*/

+

+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )

+{

+	if( uxLED < partstNUM_LEDs )

+	{

+		taskENTER_CRITICAL();

+		{

+			if( ( MCF_GPIO_PORTTC & ( 1 << uxLED ) ) == ( unsigned portCHAR ) 0 )

+			{

+				MCF_GPIO_PORTTC |= ( 1 << uxLED );

+			}

+			else

+			{

+				MCF_GPIO_PORTTC &= ~( 1 << uxLED );

+			}

+		}

+		taskEXIT_CRITICAL();

+	}

+}

+/*-----------------------------------------------------------*/

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/heap_2_modified.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/heap_2_modified.c
new file mode 100644
index 00000000..283f089c
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/heap_2_modified.c
@@ -0,0 +1,277 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+    ***************************************************************************

+    ***************************************************************************

+    *                                                                         *

+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *

+    * and even write all or part of your application on your behalf.          *

+    * See http://www.OpenRTOS.com for details of the services we provide to   *

+    * expedite your project.                                                  *

+    *                                                                         *

+    ***************************************************************************

+    ***************************************************************************

+

+	Please ensure to read the configuration and relevant port sections of the

+	online documentation.

+

+	http://www.FreeRTOS.org - Documentation, latest information, license and

+	contact details.

+

+	http://www.SafeRTOS.com - A version that is certified for use in safety

+	critical systems.

+

+	http://www.OpenRTOS.com - Commercial support, development, porting,

+	licensing and training services.

+*/

+

+/*

+ * A sample implementation of pvPortMalloc() and vPortFree() that permits

+ * allocated blocks to be freed, but does not combine adjacent free blocks

+ * into a single larger block.

+ *

+ * See heap_1.c and heap_3.c for alternative implementations, and the memory

+ * management pages of http://www.FreeRTOS.org for more information.

+ */

+#include <stdlib.h>

+

+#include "FreeRTOS.h"

+#include "task.h"

+

+/* Setup the correct byte alignment mask for the defined byte alignment. */

+

+#if portBYTE_ALIGNMENT == 8

+	#define heapBYTE_ALIGNMENT_MASK ( ( size_t ) 0x0007 )

+#endif

+

+#if portBYTE_ALIGNMENT == 4

+	#define heapBYTE_ALIGNMENT_MASK	( ( size_t ) 0x0003 )

+#endif

+

+#if portBYTE_ALIGNMENT == 2

+	#define heapBYTE_ALIGNMENT_MASK	( ( size_t ) 0x0001 )

+#endif

+

+#if portBYTE_ALIGNMENT == 1

+	#define heapBYTE_ALIGNMENT_MASK	( ( size_t ) 0x0000 )

+#endif

+

+#ifndef heapBYTE_ALIGNMENT_MASK

+	#error "Invalid portBYTE_ALIGNMENT definition"

+#endif

+

+/* Definitions from linker file. */

+extern far unsigned portCHAR __SP_INIT[];

+extern far unsigned portCHAR __RAM_ADDRESS[];

+extern far unsigned portCHAR __RAM_SIZE[];

+extern far unsigned portCHAR __stack_size[];

+

+#define heapTOP_OF_RAM				( ( (unsigned portLONG) __RAM_ADDRESS + (unsigned portLONG ) __RAM_SIZE ) - 4 )

+#define heapTOTAL_SIZE				( (heapTOP_OF_RAM - (unsigned portLONG)__SP_INIT ) + 4 )

+

+/* Allocate the memory for the heap.  The struct is used to force byte

+alignment without using any non-portable code. */

+typedef struct xRTOS_HEAP_t

+{

+	unsigned portLONG ulDummy;

+	unsigned portCHAR *ucHeap;

+} xHeapStruct;

+

+/* Define the linked list structure.  This is used to link free blocks in order

+of their size. */

+typedef struct A_BLOCK_LINK

+{

+	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */

+	size_t xBlockSize;						/*<< The size of the free block. */

+} xBlockLink;

+

+

+static const unsigned portSHORT  heapSTRUCT_SIZE	= ( sizeof( xBlockLink ) + ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) );

+#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )

+

+/* Create a couple of list links to mark the start and end of the list. */

+static xBlockLink xStart, xEnd;

+static xHeapStruct *xHeap = NULL;

+	

+/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */

+

+/*

+ * Insert a block into the list of free blocks - which is ordered by size of

+ * the block.  Small blocks at the start of the list and large blocks at the end

+ * of the list.

+ */

+#define prvInsertBlockIntoFreeList( pxBlockToInsert )								\

+{																					\

+xBlockLink *pxIterator;																\

+size_t xBlockSize;																	\

+																					\

+	xBlockSize = pxBlockToInsert->xBlockSize;										\

+																					\

+	/* Iterate through the list until a block is found that has a larger size */	\

+	/* than the block we are inserting. */											\

+	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock )	\

+	{																				\

+		/* There is nothing to do here - just iterate to the correct position. */	\

+	}																				\

+																					\

+	/* Update the list to include the block being inserted in the correct */		\

+	/* position. */																	\

+	pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;					\

+	pxIterator->pxNextFreeBlock = pxBlockToInsert;									\

+}

+/*-----------------------------------------------------------*/

+

+#define prvHeapInit()																\

+{																					\

+xBlockLink *pxFirstFreeBlock;														\

+																					\

+	/* Point to the start of the heap. */											\

+	xHeap = ( void * ) ( ( unsigned portLONG ) __SP_INIT + 4UL );					\

+	xHeap->ucHeap = ( void * ) xHeap;												\

+																					\

+	/* xStart is used to hold a pointer to the first item in the list of free */	\

+	/* blocks.  The void cast is used to prevent compiler warnings. */				\

+	xStart.pxNextFreeBlock = ( void * ) xHeap->ucHeap;								\

+	xStart.xBlockSize = ( size_t ) 0;												\

+																					\

+	/* xEnd is used to mark the end of the list of free blocks. */					\

+	xEnd.xBlockSize = heapTOTAL_SIZE;												\

+	xEnd.pxNextFreeBlock = NULL;													\

+																					\

+	/* To start with there is a single free block that is sized to take up the		\

+	entire heap space. */															\

+	pxFirstFreeBlock = ( void * ) xHeap->ucHeap;									\

+	pxFirstFreeBlock->xBlockSize = heapTOTAL_SIZE;									\

+	pxFirstFreeBlock->pxNextFreeBlock = &xEnd;										\

+}

+/*-----------------------------------------------------------*/

+

+void *pvPortMalloc( size_t xWantedSize )

+{

+xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink;

+static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE;

+void *pvReturn = NULL;

+

+	vTaskSuspendAll();

+	{

+		/* If this is the first call to malloc then the heap will require

+		initialisation to setup the list of free blocks. */

+		if( xHeapHasBeenInitialised == pdFALSE )

+		{

+			prvHeapInit();

+			xHeapHasBeenInitialised = pdTRUE;

+		}

+

+		/* The wanted size is increased so it can contain a xBlockLink

+		structure in addition to the requested amount of bytes. */

+		if( xWantedSize > 0 )

+		{

+			xWantedSize += heapSTRUCT_SIZE;

+

+			/* Ensure that blocks are always aligned to the required number of bytes. */

+			if( xWantedSize & heapBYTE_ALIGNMENT_MASK )

+			{

+				/* Byte alignment required. */

+				xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & heapBYTE_ALIGNMENT_MASK ) );

+			}

+		}

+

+		if( ( xWantedSize > 0 ) && ( xWantedSize < heapTOTAL_SIZE ) )

+		{

+			/* Blocks are stored in byte order - traverse the list from the start

+			(smallest) block until one of adequate size is found. */

+			pxPreviousBlock = &xStart;

+			pxBlock = xStart.pxNextFreeBlock;

+			while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) )

+			{

+				pxPreviousBlock = pxBlock;

+				pxBlock = pxBlock->pxNextFreeBlock;

+			}

+

+			/* If we found the end marker then a block of adequate size was not found. */

+			if( pxBlock != &xEnd )

+			{

+				/* Return the memory space - jumping over the xBlockLink structure

+				at its start. */

+				pvReturn = ( void * ) ( ( ( unsigned portCHAR * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );

+

+				/* This block is being returned for use so must be taken our of the

+				list of free blocks. */

+				pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;

+

+				/* If the block is larger than required it can be split into two. */

+				if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )

+				{

+					/* This block is to be split into two.  Create a new block

+					following the number of bytes requested. The void cast is

+					used to prevent byte alignment warnings from the compiler. */

+					pxNewBlockLink = ( void * ) ( ( ( unsigned portCHAR * ) pxBlock ) + xWantedSize );

+

+					/* Calculate the sizes of two blocks split from the single

+					block. */

+					pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;

+					pxBlock->xBlockSize = xWantedSize;

+

+					/* Insert the new block into the list of free blocks. */

+					prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );

+				}

+			}

+		}

+	}

+	xTaskResumeAll();

+

+	if( pvReturn == NULL )

+	{

+		asm volatile ("NOP");

+	}

+

+	return pvReturn;

+}

+/*-----------------------------------------------------------*/

+

+void vPortFree( void *pv )

+{

+unsigned portCHAR *puc = ( unsigned portCHAR * ) pv;

+xBlockLink *pxLink;

+

+	if( pv )

+	{

+		/* The memory being freed will have an xBlockLink structure immediately

+		before it. */

+		puc -= heapSTRUCT_SIZE;

+

+		/* This casting is to keep the compiler from issuing warnings. */

+		pxLink = ( void * ) puc;

+

+		vTaskSuspendAll();

+		{

+			/* Add this block to the list of free blocks. */

+			prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) );

+		}

+		xTaskResumeAll();

+	}

+}

+/*-----------------------------------------------------------*/

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/m52233-rom.ld b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/m52233-rom.ld
new file mode 100644
index 00000000..8042aea2
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/m52233-rom.ld
@@ -0,0 +1,214 @@
+/* Linker script for m52235evb
+ *
+ * Version:Sourcery G++ Lite 4.2-125
+ * BugURL:https://support.codesourcery.com/GNUToolchain/
+ *
+ *  Copyright 2007, 2008 CodeSourcery.
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply. */
+
+OUTPUT_ARCH(m68k)
+ENTRY(_start)
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3coldfire)
+
+MEMORY
+{
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
+  rom (rx) : ORIGIN = 0x00000000, LENGTH = 256K
+  ipsbar (rw) : ORIGIN = 0x40000000, LENGTH = 2M
+}
+
+/* These force the linker to search for particular symbols from
+ * the start of the link process and thus ensure the user's
+ * overrides are picked up
+ */
+EXTERN(__cs3_reset_m52235evb)
+INCLUDE coldfire-names.inc
+EXTERN(__cs3_interrupt_vector_coldfire)
+EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
+EXTERN(_start)
+
+PROVIDE(__cs3_heap_start = _end);
+PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
+PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
+PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
+
+SECTIONS
+{
+
+  .text :
+  {
+    CREATE_OBJECT_SYMBOLS
+    __cs3_region_start_rom = .;
+    *(.cs3.region-head.rom)
+    ASSERT (. == __cs3_region_start_rom, ".cs3.region-head.rom not permitted");
+    __cs3_interrupt_vector = __cs3_interrupt_vector_coldfire;
+    *(.cs3.interrupt_vector)
+    /* Make sure we pulled in an interrupt vector.  */
+    ASSERT (. != __cs3_interrupt_vector_coldfire, "No interrupt vector");
+
+    PROVIDE(__cs3_reset_m52235evb = _start);
+    __cs3_reset = __cs3_reset_m52235evb;
+    *(.cs3.reset)
+
+    *(.text .text.* .gnu.linkonce.t.*)
+
+    . = ALIGN(0x4);
+    KEEP (*crtbegin.o(.jcr))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .jcr))
+    KEEP (*crtend.o(.jcr))
+
+    . = ALIGN(0x4);
+    *(.gcc_except_table .gcc_except_table.*)
+  } >rom
+  .eh_frame_hdr : ALIGN (4)
+  {
+    KEEP (*(.eh_frame_hdr))
+  } >rom
+  .eh_frame : ALIGN (4)
+  {
+    KEEP (*(.eh_frame))
+  } >rom
+  .rodata : ALIGN (4)
+  {
+    *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+    . = ALIGN(4);
+    _init = .;
+    LONG (0x4e560000)	/* linkw %fp,#0 */
+    KEEP(*(.init))
+    SHORT (0x4e5e)	/* unlk %fp */
+    SHORT (0x4e75)	/* rts */
+
+    . = ALIGN(4);
+    __preinit_array_start = .;
+    KEEP (*(.preinit_array))
+    __preinit_array_end = .;
+
+    . = ALIGN(4);
+    __init_array_start = .;
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array))
+    __init_array_end = .;
+
+    . = ALIGN(4);
+    _fini = .;
+    LONG (0x4e560000)	/* linkw %fp,#0 */
+    KEEP(*(.fini))
+    SHORT (0x4e5e)	/* unlk %fp */
+    SHORT (0x4e75)	/* rts */
+
+    . = ALIGN(4);
+    __fini_array_start = .;
+    KEEP (*(.fini_array))
+    KEEP (*(SORT(.fini_array.*)))
+    __fini_array_end = .;
+
+    . = ALIGN(0x4);
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+
+    . = ALIGN(0x4);
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+
+    *(.lit)
+
+    . = ALIGN(4);
+    __cs3_regions = .;
+    LONG (0)
+    LONG (__cs3_region_init_ram)
+    LONG (__cs3_region_start_ram)
+    LONG (__cs3_region_init_size_ram)
+    LONG (__cs3_region_zero_size_ram)
+    __cs3_regions_end = .;
+
+    . = ALIGN (8);
+    . = ALIGN (8);
+    *(.rom)
+    *(.rom.b)
+    _etext = .;
+  } >rom
+  /* __cs3_region_end_rom is deprecated */
+  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
+  __cs3_region_size_rom = LENGTH(rom);
+
+  .cs3.ipsbar :
+  {
+    __cs3_region_start_ipsbar = .;
+    *(.cs3.region-head.ipsbar)
+    . = ALIGN (8);
+  } >ipsbar
+  /* __cs3_region_end_ipsbar is deprecated */
+  __cs3_region_end_ipsbar = __cs3_region_start_ipsbar + LENGTH(ipsbar);
+  __cs3_region_size_ipsbar = LENGTH(ipsbar);
+
+  .data : ALIGN (8)
+  {
+    __cs3_region_start_ram = .;
+    *(.cs3.region-head.ram)
+    *(.got.plt) *(.got)
+    *(.shdata)
+    *(.data .data.* .gnu.linkonce.d.*)
+    . = ALIGN (8);
+    *(.ram)
+    _edata = .;
+  } >ram AT>rom
+  .bss :
+  {
+    *(.shbss)
+    *(.bss .bss.* .gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN (8);
+    *(.ram.b)
+    _end = .;
+    __end = .;
+  } >ram AT>rom
+  /* __cs3_region_end_ram is deprecated */
+  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
+  __cs3_region_size_ram = LENGTH(ram);
+  __cs3_region_init_ram = LOADADDR (.data);
+  __cs3_region_init_size_ram = _edata - ADDR (.data);
+  __cs3_region_zero_size_ram = _end - _edata;
+
+  .stab 0 (NOLOAD) : { *(.stab) }
+  .stabstr 0 (NOLOAD) : { *(.stabstr) }
+  /* DWARF debug sections.
+   * Symbols in the DWARF debugging sections are relative to the beginning
+   * of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+}
diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/m52235evb-rom-hosted.ld b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/m52235evb-rom-hosted.ld
new file mode 100644
index 00000000..8142e27f
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/m52235evb-rom-hosted.ld
@@ -0,0 +1,229 @@
+/* Linker script for m52235evb
+ *
+ * Version:Sourcery G++ Lite 4.2-125
+ * BugURL:https://support.codesourcery.com/GNUToolchain/
+ *
+ *  Copyright 2007, 2008 CodeSourcery.
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply. */
+
+OUTPUT_ARCH(m68k)
+ENTRY(_start)
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lcs3 -lcs3hosted -lcs3coldfire)
+
+MEMORY
+{
+  ram (rw) : ORIGIN = 0x20000000, LENGTH = 32K

+  vectorrom   (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000400

+  cfmprotrom  (RX)  : ORIGIN = 0x00000400, LENGTH = 0x00000020   
+  rom (rx) : ORIGIN = 0x00000420, LENGTH = 256K - 0x400 - 0x20
+  ipsbar (rw) : ORIGIN = 0x40000000, LENGTH = 2M
+}
+
+/* These force the linker to search for particular symbols from
+ * the start of the link process and thus ensure the user's
+ * overrides are picked up
+ */
+EXTERN(__cs3_reset_m52235evb)
+INCLUDE coldfire-names.inc
+EXTERN(__cs3_interrupt_vector_coldfire)
+EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
+EXTERN(_start)
+/* force exit to be picked up in a hosted or os environment */
+EXTERN(exit atexit)
+
+PROVIDE(__cs3_heap_start = _end);
+PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
+PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
+PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
+
+SECTIONS
+{
+

+	.vectors_table :

+	{

+		CREATE_OBJECT_SYMBOLS

+		__cs3_region_start_rom = .;

+		*(.cs3.region-head.rom)

+		ASSERT (. == __cs3_region_start_rom, ".cs3.region-head.rom not permitted");

+		__cs3_interrupt_vector = __cs3_interrupt_vector_coldfire;

+		*(.cs3.interrupt_vector)

+		/* Make sure we pulled in an interrupt vector.  */

+		ASSERT (. != __cs3_interrupt_vector_coldfire, "No interrupt vector");

+	} > vectorrom

+

+	.cfmprotect :

+	{

+		*(.cfmconfig)

+		. = ALIGN (0x4);

+	} > cfmprotrom

+

+
+  .text :
+  {
+
+    PROVIDE(__cs3_reset_m52235evb = _start);
+    __cs3_reset = __cs3_reset_m52235evb;
+    *(.cs3.reset)
+
+    *(.text .text.* .gnu.linkonce.t.*)
+
+    . = ALIGN(0x4);
+    KEEP (*crtbegin.o(.jcr))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .jcr))
+    KEEP (*crtend.o(.jcr))
+
+    . = ALIGN(0x4);
+    *(.gcc_except_table .gcc_except_table.*)
+  } >rom
+  .eh_frame_hdr : ALIGN (4)
+  {
+    KEEP (*(.eh_frame_hdr))
+  } >rom
+  .eh_frame : ALIGN (4)
+  {
+    KEEP (*(.eh_frame))
+  } >rom
+  .rodata : ALIGN (4)
+  {
+    *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+    . = ALIGN(4);
+    _init = .;
+    LONG (0x4e560000)	/* linkw %fp,#0 */
+    KEEP(*(.init))
+    SHORT (0x4e5e)	/* unlk %fp */
+    SHORT (0x4e75)	/* rts */
+
+    . = ALIGN(4);
+    __preinit_array_start = .;
+    KEEP (*(.preinit_array))
+    __preinit_array_end = .;
+
+    . = ALIGN(4);
+    __init_array_start = .;
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array))
+    __init_array_end = .;
+
+    . = ALIGN(4);
+    _fini = .;
+    LONG (0x4e560000)	/* linkw %fp,#0 */
+    KEEP(*(.fini))
+    SHORT (0x4e5e)	/* unlk %fp */
+    SHORT (0x4e75)	/* rts */
+
+    . = ALIGN(4);
+    __fini_array_start = .;
+    KEEP (*(.fini_array))
+    KEEP (*(SORT(.fini_array.*)))
+    __fini_array_end = .;
+
+    . = ALIGN(0x4);
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+
+    . = ALIGN(0x4);
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+
+    *(.lit)
+
+    . = ALIGN(4);
+    __cs3_regions = .;
+    LONG (0)
+    LONG (__cs3_region_init_ram)
+    LONG (__cs3_region_start_ram)
+    LONG (__cs3_region_init_size_ram)
+    LONG (__cs3_region_zero_size_ram)
+    __cs3_regions_end = .;
+
+    . = ALIGN (8);
+    . = ALIGN (8);
+    *(.rom)
+    *(.rom.b)
+    _etext = .;
+  } >rom
+  /* __cs3_region_end_rom is deprecated */
+  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
+  __cs3_region_size_rom = LENGTH(rom);
+
+  .cs3.ipsbar :
+  {
+    __cs3_region_start_ipsbar = .;
+    *(.cs3.region-head.ipsbar)
+    . = ALIGN (8);
+  } >ipsbar
+  /* __cs3_region_end_ipsbar is deprecated */
+  __cs3_region_end_ipsbar = __cs3_region_start_ipsbar + LENGTH(ipsbar);
+  __cs3_region_size_ipsbar = LENGTH(ipsbar);
+
+  .data : ALIGN (8)
+  {
+    __cs3_region_start_ram = .;
+    *(.cs3.region-head.ram)
+    *(.got.plt) *(.got)
+    *(.shdata)
+    *(.data .data.* .gnu.linkonce.d.*)
+    . = ALIGN (8);
+    *(.ram)
+    _edata = .;
+  } >ram AT>rom
+  .bss :
+  {
+    *(.shbss)
+    *(.bss .bss.* .gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN (8);
+    *(.ram.b)
+    _end = .;
+    __end = .;
+  } >ram AT>rom
+  /* __cs3_region_end_ram is deprecated */
+  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
+  __cs3_region_size_ram = LENGTH(ram);
+  __cs3_region_init_ram = LOADADDR (.data);
+  __cs3_region_init_size_ram = _edata - ADDR (.data);
+  __cs3_region_zero_size_ram = _end - _edata;
+
+  .stab 0 (NOLOAD) : { *(.stab) }
+  .stabstr 0 (NOLOAD) : { *(.stabstr) }
+  /* DWARF debug sections.
+   * Symbols in the DWARF debugging sections are relative to the beginning
+   * of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+}
diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/main.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/main.c
new file mode 100644
index 00000000..fbecc17f
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/main.c
@@ -0,0 +1,290 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+    ***************************************************************************

+    ***************************************************************************

+    *                                                                         *

+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *

+    * and even write all or part of your application on your behalf.          *

+    * See http://www.OpenRTOS.com for details of the services we provide to   *

+    * expedite your project.                                                  *

+    *                                                                         *

+    ***************************************************************************

+    ***************************************************************************

+

+	Please ensure to read the configuration and relevant port sections of the

+	online documentation.

+

+	http://www.FreeRTOS.org - Documentation, latest information, license and

+	contact details.

+

+	http://www.SafeRTOS.com - A version that is certified for use in safety

+	critical systems.

+

+	http://www.OpenRTOS.com - Commercial support, development, porting,

+	licensing and training services.

+*/

+

+

+unsigned char *uip_buf;

+

+

+/*

+ * Creates all the demo application tasks, then starts the scheduler.  The WEB

+ * documentation provides more details of the standard demo application tasks.

+ * In addition to the standard demo tasks, the following tasks and tests are

+ * defined and/or created within this file:

+ *

+ * "Check" task -  This only executes every five seconds but has a high priority

+ * to ensure it gets processor time.  Its main function is to check that all the

+ * standard demo tasks are still operational.  While no errors have been

+ * discovered the check task will toggle an LED every 5 seconds - the toggle

+ * rate increasing to 500ms being a visual indication that at least one task has

+ * reported unexpected behaviour.

+ *

+ * "Reg test" tasks - These fill the registers with known values, then check

+ * that each register still contains its expected value.  Each task uses

+ * different values.  The tasks run with very low priority so get preempted very

+ * frequently.  A register containing an unexpected value is indicative of an

+ * error in the context switching mechanism.

+ *

+ */

+

+/* Standard includes. */

+#include <stdio.h>

+

+/* Scheduler includes. */

+#include "FreeRTOS.h"

+#include "task.h"

+#include "queue.h"

+#include "semphr.h"

+

+/* Demo app includes. */

+#include "BlockQ.h"

+#include "death.h"

+#include "flash.h"

+#include "partest.h"

+#include "semtest.h"

+#include "PollQ.h"

+#include "GenQTest.h"

+#include "QPeek.h"

+#include "IntQueue.h"

+#include "comtest2.h"

+

+/*-----------------------------------------------------------*/

+

+/* The time between cycles of the 'check' functionality - as described at the

+top of this file. */

+#define mainNO_ERROR_PERIOD					( ( portTickType ) 5000 / portTICK_RATE_MS )

+

+/* The rate at which the LED controlled by the 'check' task will flash should an

+error have been detected. */

+#define mainERROR_PERIOD 					( ( portTickType ) 500 / portTICK_RATE_MS )

+

+/* The LED controlled by the 'check' task. */

+#define mainCHECK_LED						( 3 )

+

+/* ComTest constants - there is no free LED for the comtest tasks. */

+#define mainCOM_TEST_BAUD_RATE				( ( unsigned portLONG ) 19200 )

+#define mainCOM_TEST_LED					( 5 )

+

+/* Task priorities. */

+#define mainCOM_TEST_PRIORITY				( tskIDLE_PRIORITY + 2 )

+#define mainQUEUE_POLL_PRIORITY				( tskIDLE_PRIORITY + 2 )

+#define mainCHECK_TASK_PRIORITY				( tskIDLE_PRIORITY + 3 )

+#define mainSEM_TEST_PRIORITY				( tskIDLE_PRIORITY + 1 )

+#define mainBLOCK_Q_PRIORITY				( tskIDLE_PRIORITY + 2 )

+#define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )

+#define mainGEN_QUEUE_TASK_PRIORITY			( tskIDLE_PRIORITY )

+

+/* The WEB server task uses more stack than most other tasks because of its

+reliance on using sprintf(). */
+#define mainBASIC_WEB_STACK_SIZE			( configMINIMAL_STACK_SIZE * 2 )

+

+/*

+ * Configure the hardware for the demo.

+ */

+static void prvSetupHardware( void );

+

+/*

+ * Implements the 'check' task functionality as described at the top of this

+ * file.

+ */

+static void prvCheckTask( void *pvParameters );

+

+/*

+ * The task that implements the WEB server.
+ */

+extern void vuIP_Task( void *pvParameters );

+

+/*-----------------------------------------------------------*/

+

+int main( void )

+{

+	/* Setup the hardware ready for this demo. */

+	prvSetupHardware();

+

+	/* Create the WEB server task. */

+	xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );

+

+	/* Start the standard demo tasks. */

+	vStartLEDFlashTasks( tskIDLE_PRIORITY );

+	vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );

+	vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );

+	vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );

+	vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );

+	vStartQueuePeekTasks();

+

+	/* Create the check task. */

+	xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );

+

+	/* Start the scheduler. */

+	vTaskStartScheduler();

+

+    /* Will only get here if there was insufficient memory to create the idle

+    task. */

+	for( ;; );

+}

+/*-----------------------------------------------------------*/

+

+static void prvCheckTask( void *pvParameters )

+{

+unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0;

+portTickType xLastExecutionTime;

+

+	( void ) pvParameters;

+

+	/* Initialise the variable used to control our iteration rate prior to

+	its first use. */

+	xLastExecutionTime = xTaskGetTickCount();

+

+	for( ;; )

+	{

+		/* Wait until it is time to run the tests again. */

+		vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );

+

+		/* Has an error been found in any task? */

+		if( xAreGenericQueueTasksStillRunning() != pdTRUE )

+		{

+			ulError |= 0x01UL;

+		}

+

+		if( xAreQueuePeekTasksStillRunning() != pdTRUE )

+		{

+			ulError |= 0x02UL;

+		}

+

+		if( xAreBlockingQueuesStillRunning() != pdTRUE )

+		{

+			ulError |= 0x04UL;

+		}

+

+		if( xAreSemaphoreTasksStillRunning() != pdTRUE )

+	    {

+	    	ulError |= 0x20UL;

+	    }

+

+		if( xArePollingQueuesStillRunning() != pdTRUE )

+	    {

+	    	ulError |= 0x40UL;

+	    }

+

+		/* If an error has been found then increase our cycle rate, and in so

+		going increase the rate at which the check task LED toggles. */

+		if( ulError != 0 )

+		{

+	    	ulTicksToWait = mainERROR_PERIOD;

+		}

+

+		/* Toggle the LED each itteration. */

+		vParTestToggleLED( mainCHECK_LED );

+	}

+}

+/*-----------------------------------------------------------*/

+

+void prvSetupHardware( void )

+{

+__attribute__ ((section(".cfmconfig")))

+static const unsigned long _cfm[6] = {

+	0, /* KEY_UPPER 0x00000400 */

+	0, /* KEY_LOWER 0x00000404 */

+	0, /* CFMPROT 0x00000408 */

+	0, /* CFMSACC 0x0000040C */

+	0, /* CFMDACC 0x00000410 */

+	0, /* CFMSEC 0x00000414 */

+};

+

+	/* Just to stop compiler warnings. */

+	( void ) _cfm;

+

+	/* Ensure the watchdog is disabled. */

+	MCF_SCM_CWCR = 0;

+

+    /* Initialize IPSBAR (0x40000000). */

+	asm volatile(

+		"move.l  #0x40000000,%d0	\n"

+		"andi.l  #0xC0000000,%d0	\n"

+		"add.l   #0x1,%d0			\n"

+		"move.l  %d0,0x40000000		"

+	);

+

+    /* Initialize FLASHBAR (0x00) */

+	asm volatile(

+		"move.l  #0x00,%d0			\n"

+		"andi.l  #0xFFF80000,%d0	\n"

+		"add.l   #0x41,%d0			\n"

+		"movec   %d0,%FLASHBAR		"

+	);

+

+	portDISABLE_INTERRUPTS();

+

+	/* RAMBAR. */

+	MCF_SCM_RAMBAR = MCF_SCM_RAMBAR_BA( RAMBAR_ADDRESS ) | MCF_SCM_RAMBAR_BDE;

+

+	/* Multiply 25MHz crystal by 12 to get 60MHz clock. */

+	MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(4) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;

+	while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))

+	{

+	}

+

+	/* Setup the port used to toggle LEDs. */

+	vParTestInitialise();

+}

+/*-----------------------------------------------------------*/

+

+void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )

+{

+	/* This will get called if a stack overflow is detected during the context

+	switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack

+	problems within nested interrupts, but only do this for debug purposes as

+	it will increase the context switch time. */

+

+	( void ) pxTask;

+	( void ) pcTaskName;

+

+	for( ;; );

+}

+/*-----------------------------------------------------------*/

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/serial/serial.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/serial/serial.c
new file mode 100644
index 00000000..13c75750
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/serial/serial.c
@@ -0,0 +1,230 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+    ***************************************************************************

+    ***************************************************************************

+    *                                                                         *

+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *

+    * and even write all or part of your application on your behalf.          *

+    * See http://www.OpenRTOS.com for details of the services we provide to   *

+    * expedite your project.                                                  *

+    *                                                                         *

+    ***************************************************************************

+    ***************************************************************************

+

+	Please ensure to read the configuration and relevant port sections of the

+	online documentation.

+

+	http://www.FreeRTOS.org - Documentation, latest information, license and

+	contact details.

+

+	http://www.SafeRTOS.com - A version that is certified for use in safety

+	critical systems.

+

+	http://www.OpenRTOS.com - Commercial support, development, porting,

+	licensing and training services.

+*/

+

+

+/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.

+

+NOTE:  This driver is primarily to test the scheduler functionality.  It does

+not effectively use the buffers or DMA and is therefore not intended to be

+an example of an efficient driver. */

+

+/* Standard include file. */

+#include <stdlib.h>

+

+/* Scheduler include files. */

+#include "FreeRTOS.h"

+#include "queue.h"

+#include "task.h"

+

+/* Demo app include files. */

+#include "serial.h"

+

+/* Hardware definitions. */

+#define serNO_PARITY		( ( unsigned portCHAR ) 0x02 << 3 )

+#define ser8DATA_BITS		( ( unsigned portCHAR ) 0x03 )

+#define ser1STOP_BIT		( ( unsigned portCHAR ) 0x07 )

+#define serSYSTEM_CLOCK		( ( unsigned portCHAR ) 0xdd )

+#define serTX_OUTPUT		( ( unsigned portCHAR ) 0x04 )

+#define serRX_INPUT			( ( unsigned portCHAR ) 0x08 )

+#define serTX_ENABLE		( ( unsigned portCHAR ) 0x04 )

+#define serRX_ENABLE		( ( unsigned portCHAR ) 0x01 )

+#define serTX_INT			( ( unsigned portCHAR ) 0x01 )

+#define serRX_INT			( ( unsigned portCHAR ) 0x02 )

+

+

+/* The queues used to communicate between tasks and ISR's. */

+static xQueueHandle xRxedChars;

+static xQueueHandle xCharsForTx;

+

+/* Flag used to indicate the tx status. */

+static portBASE_TYPE xTxHasEnded = pdTRUE;

+

+/*-----------------------------------------------------------*/

+

+/* The UART interrupt handler. */

+void __attribute__( ( interrupt ) ) __cs3_isr_interrupt_78( void );

+

+/*-----------------------------------------------------------*/

+

+xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )

+{

+const unsigned portLONG ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWantedBaud ) );

+

+	/* Create the queues used by the com test task. */

+	xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );

+	xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );

+

+	xTxHasEnded = pdTRUE;

+

+	/* Set the pins to UART mode. */

+//_RB_	MCF_PAD_PUASAR |= ( serTX_OUTPUT | serRX_INPUT );

+

+	/* Reset the peripheral. */

+	MCF_UART1_UCR = MCF_UART_UCR_RESET_RX;

+	MCF_UART1_UCR = MCF_UART_UCR_RESET_TX;

+	MCF_UART1_UCR = MCF_UART_UCR_RESET_ERROR;

+	MCF_UART1_UCR = MCF_UART_UCR_RESET_BKCHGINT;

+	MCF_UART1_UCR = MCF_UART_UCR_RESET_MR | MCF_UART_UCR_RX_DISABLED | MCF_UART_UCR_TX_DISABLED;

+

+	/* Configure the UART. */

+	MCF_UART1_UMR1 = serNO_PARITY | ser8DATA_BITS;

+	MCF_UART1_UMR2 = ser1STOP_BIT;

+	MCF_UART1_UCSR = serSYSTEM_CLOCK;

+

+	MCF_UART1_UBG1 = ( unsigned portCHAR ) ( ( ulBaudRateDivisor >> 8UL ) & 0xffUL );

+	MCF_UART1_UBG2 = ( unsigned portCHAR ) ( ulBaudRateDivisor & 0xffUL );

+

+	/* Turn it on. */

+	MCF_UART1_UCR = serTX_ENABLE | serRX_ENABLE;

+

+	/* Configure the interrupt controller.  Run the UARTs above the kernel

+	interrupt priority for demo purposes. */

+    MCF_INTC0_ICR14 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2  ) << 3 );

+    MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK14 | 0x01 );

+

+	/* The Tx interrupt is not enabled until there is data to send. */

+	MCF_UART1_UIMR = serRX_INT;

+

+	/* Only a single port is implemented so we don't need to return anything. */

+	return NULL;

+}

+/*-----------------------------------------------------------*/

+

+signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )

+{

+	/* Only one port is supported. */

+	( void ) pxPort;

+

+	/* Get the next character from the buffer.  Return false if no characters

+	are available or arrive before xBlockTime expires. */

+	if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )

+	{

+		return pdTRUE;

+	}

+	else

+	{

+		return pdFALSE;

+	}

+}

+/*-----------------------------------------------------------*/

+

+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )

+{

+	/* Only one port is supported. */

+	( void ) pxPort;

+

+	/* Return false if after the block time there is no room on the Tx queue. */

+	if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )

+	{

+		return pdFAIL;

+	}

+

+	/* A critical section should not be required as xTxHasEnded will not be

+	written to by the ISR if it is already 0 (is this correct?). */

+	if( xTxHasEnded != pdFALSE )

+	{

+		xTxHasEnded = pdFALSE;

+		MCF_UART1_UIMR = serRX_INT | serTX_INT;

+	}

+

+	return pdPASS;

+}

+/*-----------------------------------------------------------*/

+

+void vSerialClose( xComPortHandle xPort )

+{

+	( void ) xPort;

+}

+/*-----------------------------------------------------------*/

+

+void __cs3_isr_interrupt_78( void )

+{

+unsigned portCHAR ucChar;

+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xDoneSomething = pdTRUE;

+

+	while( xDoneSomething != pdFALSE )

+	{

+		xDoneSomething = pdFALSE;

+

+		/* Does the tx buffer contain space? */

+		if( ( MCF_UART1_USR & MCF_UART_USR_TXRDY ) != 0x00 )

+		{

+			/* Are there any characters queued to be sent? */

+			if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )

+			{

+				/* Send the next char. */

+				MCF_UART1_UTB = ucChar;

+				xDoneSomething = pdTRUE;

+			}

+			else

+			{

+				/* Turn off the Tx interrupt until such time as another character

+				is being transmitted. */

+				MCF_UART1_UIMR = serRX_INT;

+				xTxHasEnded = pdTRUE;

+			}

+		}

+

+		if( MCF_UART1_USR & MCF_UART_USR_RXRDY )

+		{

+			ucChar = MCF_UART1_URB;

+			xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );

+			xDoneSomething = pdTRUE;

+		}

+	}

+

+    portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );

+}

+

+

+

+

+

+

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/FEC.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/FEC.c
new file mode 100644
index 00000000..cd704ed0
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/FEC.c
@@ -0,0 +1,655 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+	***************************************************************************

+	See http://www.FreeRTOS.org for documentation, latest information, license

+	and contact details.  Please ensure to read the configuration and relevant

+	port sections of the online documentation.

+	***************************************************************************

+*/

+

+/* Kernel includes. */

+#include "FreeRTOS.h"

+#include "semphr.h"

+#include "task.h"

+

+/* Demo includes. */

+#include "fecbd.h"

+#include "mii.h"

+#include "eth_phy.h"

+#include "eth.h"

+

+/* uIP includes. */

+#include "uip.h"

+#include "uip_arp.h"

+

+#define MCF_FEC_MSCR_MII_SPEED(x)            	(((x)&0x3F)<<0x1)

+#define MCF_FEC_RCR_MAX_FL(x)                	(((x)&0x7FF)<<0x10)

+

+/* Delay between polling the PHY to see if a link has been established. */

+#define fecLINK_DELAY							( 500 / portTICK_RATE_MS )

+

+/* Delay to wait for an MII access. */

+#define fecMII_DELAY							( 10 / portTICK_RATE_MS )

+#define fecMAX_POLLS							( 20 )

+

+/* Delay between looking for incoming packets.  In ideal world this would be

+infinite. */

+#define netifBLOCK_TIME_WAITING_FOR_INPUT		fecLINK_DELAY

+

+/* Constants used to delay while waiting for a tx descriptor to be free. */

+#define fecMAX_TX_WAIT_ATTEMPTS					4

+#define fecTX_BUFFER_WAIT						( 10 / portTICK_RATE_MS )

+

+/*-----------------------------------------------------------*/

+

+/* The semaphore used to wake the uIP task when data arrives. */

+xSemaphoreHandle xFECSemaphore = NULL;

+

+/* The buffer used by the uIP stack.  In this case the pointer is used to

+point to one of the Rx buffers. */

+unsigned portCHAR *uip_buf;

+

+/* The DMA descriptors.  This is a char array to allow us to align it correctly. */

+static unsigned portCHAR xFECTxDescriptors_unaligned[ ( configNUM_FEC_TX_BUFFERS * sizeof( FECBD ) ) + 16 ];

+static unsigned portCHAR xFECRxDescriptors_unaligned[ ( configNUM_FEC_RX_BUFFERS * sizeof( FECBD ) ) + 16 ];

+static FECBD *xFECTxDescriptors;

+static FECBD *xFECRxDescriptors;

+

+/* The DMA buffers.  These are char arrays to allow them to be alligned correctly. */

+static unsigned portCHAR ucFECRxBuffers[ ( configNUM_FEC_RX_BUFFERS * configFEC_BUFFER_SIZE ) + 16 ];

+static unsigned portBASE_TYPE uxNextRxBuffer = 0, uxNextTxBuffer = 0, uxIndexToBufferOwner = 0;

+

+/*-----------------------------------------------------------*/

+

+static void prvEnableFECInterrupts( void );

+

+/********************************************************************/

+/*

+ * Write a value to a PHY's MII register.

+ *

+ * Parameters:

+ *  ch          FEC channel

+ *  phy_addr    Address of the PHY.

+ *  reg_addr    Address of the register in the PHY.

+ *  data        Data to be written to the PHY register.

+ *

+ * Return Values:

+ *  0 on failure

+ *  1 on success.

+ *

+ * Please refer to your PHY manual for registers and their meanings.

+ * mii_write() polls for the FEC's MII interrupt event and clears it.

+ * If after a suitable amount of time the event isn't triggered, a

+ * value of 0 is returned.

+ */

+static int fec_mii_write( int phy_addr, int reg_addr, int data )

+{

+int timeout, iReturn;

+uint32 eimr;

+

+    /* Clear the MII interrupt bit */

+    MCF_FEC_EIR = MCF_FEC_EIR_MII;

+

+    /* Mask the MII interrupt */

+    eimr = MCF_FEC_EIMR;

+    MCF_FEC_EIMR &= ~MCF_FEC_EIMR_MII;

+

+    /* Write to the MII Management Frame Register to kick-off the MII write */

+    MCF_FEC_MMFR = MCF_FEC_MMFR_ST_01 | MCF_FEC_MMFR_OP_WRITE | MCF_FEC_MMFR_PA(phy_addr) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10 | MCF_FEC_MMFR_DATA( data );

+

+    /* Poll for the MII interrupt (interrupt should be masked) */

+    for( timeout = 0; timeout < fecMAX_POLLS; timeout++ )

+    {

+        if( MCF_FEC_EIR & MCF_FEC_EIR_MII )

+        {

+			break;

+        }

+        else

+        {

+        	vTaskDelay( fecMII_DELAY );

+        }

+    }

+

+    if( timeout == fecMAX_POLLS )

+    {

+        iReturn = 0;

+    }

+    else

+    {

+		iReturn = 1;

+    }

+

+	/* Clear the MII interrupt bit */

+	MCF_FEC_EIR = MCF_FEC_EIR_MII;

+

+	/* Restore the EIMR */

+	MCF_FEC_EIMR = eimr;

+

+    return iReturn;

+}

+

+/********************************************************************/

+/*

+ * Read a value from a PHY's MII register.

+ *

+ * Parameters:

+ *  ch          FEC channel

+ *  phy_addr    Address of the PHY.

+ *  reg_addr    Address of the register in the PHY.

+ *  data        Pointer to storage for the Data to be read

+ *              from the PHY register (passed by reference)

+ *

+ * Return Values:

+ *  0 on failure

+ *  1 on success.

+ *

+ * Please refer to your PHY manual for registers and their meanings.

+ * mii_read() polls for the FEC's MII interrupt event and clears it.

+ * If after a suitable amount of time the event isn't triggered, a

+ * value of 0 is returned.

+ */

+static int fec_mii_read( int phy_addr, int reg_addr, unsigned portSHORT* data )

+{

+int timeout, iReturn;

+uint32 eimr;

+

+    /* Clear the MII interrupt bit */

+    MCF_FEC_EIR = MCF_FEC_EIR_MII;

+

+    /* Mask the MII interrupt */

+    eimr = MCF_FEC_EIMR;

+    MCF_FEC_EIMR &= ~MCF_FEC_EIMR_MII;

+

+    /* Write to the MII Management Frame Register to kick-off the MII read */

+    MCF_FEC_MMFR = MCF_FEC_MMFR_ST_01 | MCF_FEC_MMFR_OP_READ | MCF_FEC_MMFR_PA(phy_addr) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10;

+

+    /* Poll for the MII interrupt (interrupt should be masked) */

+    for( timeout = 0; timeout < fecMAX_POLLS; timeout++ )

+    {

+        if (MCF_FEC_EIR & MCF_FEC_EIR_MII)

+        {

+            break;

+        }

+        else

+        {

+        	vTaskDelay( fecMII_DELAY );

+        }

+    }

+

+    if( timeout == fecMAX_POLLS )

+    {

+        iReturn = 0;

+    }

+    else

+    {

+		*data = (uint16)(MCF_FEC_MMFR & 0x0000FFFF);

+		iReturn = 1;

+    }

+

+	/* Clear the MII interrupt bit */

+	MCF_FEC_EIR = MCF_FEC_EIR_MII;

+

+	/* Restore the EIMR */

+	MCF_FEC_EIMR = eimr;

+

+    return iReturn;

+}

+

+

+/********************************************************************/

+/*

+ * Generate the hash table settings for the given address

+ *

+ * Parameters:

+ *  addr    48-bit (6 byte) Address to generate the hash for

+ *

+ * Return Value:

+ *  The 6 most significant bits of the 32-bit CRC result

+ */

+static unsigned portCHAR fec_hash_address( const unsigned portCHAR* addr )

+{

+unsigned portLONG crc;

+unsigned portCHAR byte;

+int i, j;

+

+	crc = 0xFFFFFFFF;

+	for(i=0; i<6; ++i)

+	{

+		byte = addr[i];

+		for(j=0; j<8; ++j)

+		{

+			if((byte & 0x01)^(crc & 0x01))

+			{

+				crc >>= 1;

+				crc = crc ^ 0xEDB88320;

+			}

+			else

+			{

+				crc >>= 1;

+			}

+

+			byte >>= 1;

+		}

+	}

+

+	return (unsigned portCHAR)(crc >> 26);

+}

+

+/********************************************************************/

+/*

+ * Set the Physical (Hardware) Address and the Individual Address

+ * Hash in the selected FEC

+ *

+ * Parameters:

+ *  ch  FEC channel

+ *  pa  Physical (Hardware) Address for the selected FEC

+ */

+static void fec_set_address( const unsigned portCHAR *pa )

+{

+	unsigned portCHAR crc;

+

+	/*

+	* Set the Physical Address

+	*/

+	/* Set the source address for the controller */

+	MCF_FEC_PALR = ( pa[ 0 ] << 24 ) | ( pa[ 1 ] << 16 ) | ( pa[ 2 ] << 8 ) | ( pa[ 3 ] << 0 );

+	MCF_FEC_PAUR = ( pa[ 4 ] << 24 ) | ( pa[ 5 ] << 16 );

+

+	/*

+	* Calculate and set the hash for given Physical Address

+	* in the  Individual Address Hash registers

+	*/

+	crc = fec_hash_address( pa );

+	if( crc >= 32 )

+	{

+		MCF_FEC_IAUR |= (unsigned portLONG)(1 << (crc - 32));

+	}

+	else

+	{

+		MCF_FEC_IALR |= (unsigned portLONG)(1 << crc);

+	}

+}

+/*-----------------------------------------------------------*/

+

+static void prvInitialiseFECBuffers( void )

+{

+unsigned portBASE_TYPE ux;

+unsigned portCHAR *pcBufPointer;

+

+	pcBufPointer = &( xFECTxDescriptors_unaligned[ 0 ] );

+	while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )

+	{

+		pcBufPointer++;

+	}

+

+	xFECTxDescriptors = ( FECBD * ) pcBufPointer;

+

+	pcBufPointer = &( xFECRxDescriptors_unaligned[ 0 ] );

+	while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )

+	{

+		pcBufPointer++;

+	}

+

+	xFECRxDescriptors = ( FECBD * ) pcBufPointer;

+

+

+	/* Setup the buffers and descriptors.  The data member does not point

+	anywhere yet as there is not yet anything to send and a zero copy policy

+	is used. */
+	for( ux = 0; ux < configNUM_FEC_TX_BUFFERS; ux++ )

+	{

+		xFECTxDescriptors[ ux ].status = TX_BD_TC;

+		xFECTxDescriptors[ ux ].data = NULL;

+		xFECTxDescriptors[ ux ].length = 0;

+	}

+

+	pcBufPointer = &( ucFECRxBuffers[ 0 ] );

+	while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )

+	{

+		pcBufPointer++;

+	}

+

+	for( ux = 0; ux < configNUM_FEC_RX_BUFFERS; ux++ )

+	{

+	    xFECRxDescriptors[ ux ].status = RX_BD_E;

+	    xFECRxDescriptors[ ux ].length = configFEC_BUFFER_SIZE;

+	    xFECRxDescriptors[ ux ].data = pcBufPointer;

+	    pcBufPointer += configFEC_BUFFER_SIZE;

+	}

+

+	/* Set the wrap bit in the last descriptors to form a ring. */

+	xFECTxDescriptors[ configNUM_FEC_TX_BUFFERS - 1 ].status |= TX_BD_W;

+	xFECRxDescriptors[ configNUM_FEC_RX_BUFFERS - 1 ].status |= RX_BD_W;

+

+	uxNextRxBuffer = 0;

+	uxNextTxBuffer = 0;

+}

+/*-----------------------------------------------------------*/

+

+void vInitFEC( void )

+{

+unsigned portSHORT usData;

+struct uip_eth_addr xAddr;

+const unsigned portCHAR ucMACAddress[6] =

+{

+	configMAC_0, configMAC_1,configMAC_2, configMAC_3, configMAC_4, configMAC_5

+};

+

+	/* Create the semaphore used by the ISR to wake the uIP task. */

+	vSemaphoreCreateBinary( xFECSemaphore );

+

+	prvInitialiseFECBuffers();

+

+	for( usData = 0; usData < 6; usData++ )

+	{

+		xAddr.addr[ usData ] = ucMACAddress[ usData ];

+	}

+	uip_setethaddr( xAddr );

+

+	/* Set the Reset bit and clear the Enable bit */

+	MCF_FEC_ECR = MCF_FEC_ECR_RESET;

+

+	/* Wait at least 8 clock cycles */

+	for( usData = 0; usData < 10; usData++ )

+	{

+		asm( "NOP" );

+	}

+

+	/* Set MII speed to 2.5MHz. */

+	MCF_FEC_MSCR = MCF_FEC_MSCR_MII_SPEED( ( ( ( configCPU_CLOCK_HZ / 1000000 ) / 5 ) + 1 ) );

+

+	/* Initialize PLDPAR to enable Ethernet LEDs. */

+	MCF_GPIO_PLDPAR =  MCF_GPIO_PLDPAR_ACTLED_ACTLED | MCF_GPIO_PLDPAR_LINKLED_LINKLED | MCF_GPIO_PLDPAR_SPDLED_SPDLED

+					 | MCF_GPIO_PLDPAR_DUPLED_DUPLED | MCF_GPIO_PLDPAR_COLLED_COLLED | MCF_GPIO_PLDPAR_RXLED_RXLED

+					 | MCF_GPIO_PLDPAR_TXLED_TXLED;

+

+	/* Initialize Port TA to enable Axcel control. */

+	MCF_GPIO_PTAPAR = 0x00;

+	MCF_GPIO_DDRTA  = 0x0F;

+	MCF_GPIO_PORTTA = 0x04;

+

+	/* Set phy address to zero. */

+	MCF_EPHY_EPHYCTL1 = MCF_EPHY_EPHYCTL1_PHYADD( 0 );

+

+	/* Enable EPHY module with PHY clocks disabled.  Do not turn on PHY clocks

+	until both FEC and EPHY are completely setup (see Below). */

+	MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0_DIS100 | MCF_EPHY_EPHYCTL0_DIS10);

+

+	/* Enable auto_neg at start-up */

+	MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0 & (MCF_EPHY_EPHYCTL0_ANDIS));

+

+	/* Enable EPHY module. */

+	MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0_EPHYEN | MCF_EPHY_EPHYCTL0);

+

+	/* Let PHY PLLs be determined by PHY. */

+	MCF_EPHY_EPHYCTL0 = (uint8)(MCF_EPHY_EPHYCTL0  & ~(MCF_EPHY_EPHYCTL0_DIS100 | MCF_EPHY_EPHYCTL0_DIS10));

+

+	/* Settle. */

+	vTaskDelay( fecLINK_DELAY );

+

+	/* Can we talk to the PHY? */

+	do

+	{

+		vTaskDelay( fecLINK_DELAY );

+		usData = 0;

+		fec_mii_read( configPHY_ADDRESS, PHY_PHYIDR1, &usData );

+

+	} while( usData == 0xffff );

+

+	do

+	{

+		/* Start auto negotiate. */

+		fec_mii_write( configPHY_ADDRESS, PHY_BMCR, ( PHY_BMCR_AN_RESTART | PHY_BMCR_AN_ENABLE ) );

+

+		/* Wait for auto negotiate to complete. */

+		do

+		{

+			vTaskDelay( fecLINK_DELAY );

+			fec_mii_read( configPHY_ADDRESS, PHY_BMSR, &usData );

+

+		} while( !( usData & PHY_BMSR_AN_COMPLETE ) );

+

+	} while( 0 ); //while( !( usData & PHY_BMSR_LINK ) );

+

+	/* When we get here we have a link - find out what has been negotiated. */

+	fec_mii_read( configPHY_ADDRESS, PHY_ANLPAR, &usData );

+

+	if( ( usData & PHY_ANLPAR_100BTX_FDX ) || ( usData & PHY_ANLPAR_100BTX ) )

+	{

+		/* Speed is 100. */

+	}

+	else

+	{

+		/* Speed is 10. */

+	}

+

+	if( ( usData & PHY_ANLPAR_100BTX_FDX ) || ( usData & PHY_ANLPAR_10BTX_FDX ) )

+	{

+		MCF_FEC_RCR &= (unsigned portLONG)~MCF_FEC_RCR_DRT;

+		MCF_FEC_TCR |= MCF_FEC_TCR_FDEN;

+	}

+	else

+	{

+		MCF_FEC_RCR |= MCF_FEC_RCR_DRT;

+		MCF_FEC_TCR &= (unsigned portLONG)~MCF_FEC_TCR_FDEN;

+	}

+

+	/* Clear the Individual and Group Address Hash registers */

+	MCF_FEC_IALR = 0;

+	MCF_FEC_IAUR = 0;

+	MCF_FEC_GALR = 0;

+	MCF_FEC_GAUR = 0;

+

+	/* Set the Physical Address for the selected FEC */

+	fec_set_address( ucMACAddress );

+

+	/* Set Rx Buffer Size */

+	MCF_FEC_EMRBR = (unsigned portSHORT)configFEC_BUFFER_SIZE;

+

+	/* Point to the start of the circular Rx buffer descriptor queue */

+	MCF_FEC_ERDSR = ( volatile unsigned portLONG ) &( xFECRxDescriptors[ 0 ] );

+

+	/* Point to the start of the circular Tx buffer descriptor queue */

+	MCF_FEC_ETSDR = ( volatile unsigned portLONG ) &( xFECTxDescriptors[ 0 ] );

+

+	/* Mask all FEC interrupts */

+	MCF_FEC_EIMR = ( unsigned portLONG ) -1;

+

+	/* Clear all FEC interrupt events */

+	MCF_FEC_EIR = ( unsigned portLONG ) -1;

+

+	/* Initialize the Receive Control Register */

+	MCF_FEC_RCR = MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM) | MCF_FEC_RCR_FCE;

+

+	MCF_FEC_RCR |= MCF_FEC_RCR_MII_MODE;

+

+	#if( configUSE_PROMISCUOUS_MODE == 1 )

+	{

+		MCF_FEC_RCR |= MCF_FEC_RCR_PROM;

+	}

+	#endif

+

+	prvEnableFECInterrupts();

+

+	MCF_FEC_ECR = MCF_FEC_ECR_ETHER_EN;

+	MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;

+}

+/*-----------------------------------------------------------*/

+

+static void prvEnableFECInterrupts( void )

+{

+const unsigned portBASE_TYPE uxFirstFECVector = 23, uxLastFECVector = 35;

+unsigned portBASE_TYPE ux;

+

+#if configFEC_INTERRUPT_PRIORITY > configMAX_SYSCALL_INTERRUPT_PRIORITY

+	#error configFEC_INTERRUPT_PRIORITY must be less than or equal to configMAX_SYSCALL_INTERRUPT_PRIORITY

+#endif

+

+	for( ux = uxFirstFECVector; ux <= uxLastFECVector; ux++ )

+	{

+		MCF_INTC0_ICR( ux ) = MCF_INTC_ICR_IL( configFEC_INTERRUPT_PRIORITY );

+	}

+

+	/* Enable the FEC interrupts in the mask register */

+	MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK33 | MCF_INTC_IMRH_INT_MASK34 | MCF_INTC_IMRH_INT_MASK35 );

+	MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK25 | MCF_INTC_IMRL_INT_MASK26 | MCF_INTC_IMRL_INT_MASK27

+						| MCF_INTC_IMRL_INT_MASK28 | MCF_INTC_IMRL_INT_MASK29 | MCF_INTC_IMRL_INT_MASK30

+						| MCF_INTC_IMRL_INT_MASK31 | MCF_INTC_IMRL_MASKALL );

+

+	/* Clear any pending FEC interrupt events */

+	MCF_FEC_EIR = MCF_FEC_EIR_CLEAR_ALL;

+

+	/* Unmask all FEC interrupts */

+	MCF_FEC_EIMR = MCF_FEC_EIMR_UNMASK_ALL;

+}

+/*-----------------------------------------------------------*/

+

+unsigned short usGetFECRxData( void )

+{

+unsigned portSHORT usLen;

+

+	/* Obtain the size of the packet and put it into the "len" variable. */

+	usLen = xFECRxDescriptors[ uxNextRxBuffer ].length;

+

+	if( ( usLen != 0 ) && ( ( xFECRxDescriptors[ uxNextRxBuffer ].status & RX_BD_E ) == 0 ) )

+	{

+		uip_buf = xFECRxDescriptors[ uxNextRxBuffer ].data;

+	}

+	else

+	{

+		usLen = 0;

+	}

+

+	return usLen;

+}

+/*-----------------------------------------------------------*/

+

+void vDiscardRxData( void )

+{

+	/* Free the descriptor as the buffer it points to is no longer in use. */

+	xFECRxDescriptors[ uxNextRxBuffer ].status |= RX_BD_E;

+	MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;

+	uxNextRxBuffer++;

+	if( uxNextRxBuffer >= configNUM_FEC_RX_BUFFERS )

+	{

+		uxNextRxBuffer = 0;

+	}

+}

+/*-----------------------------------------------------------*/

+

+void vSendBufferToFEC( void )

+{

+portLONG l;

+

+	/* Get a DMA buffer into which we can write the data to send. */

+	for( l = 0; l < fecMAX_TX_WAIT_ATTEMPTS; l++ )

+	{

+		if( xFECTxDescriptors[ uxNextTxBuffer ].status & TX_BD_R )

+		{

+			/* Wait for the buffer to become available. */

+			vTaskDelay( fecTX_BUFFER_WAIT );

+		}

+		else

+		{

+			/* Setup the buffer descriptor for transmission.  The data being

+			sent is actually stored in one of the Rx descripter buffers,

+			pointed to by uip_buf. */

+			xFECTxDescriptors[ uxNextTxBuffer ].length = uip_len;

+			xFECTxDescriptors[ uxNextTxBuffer ].status |= (TX_BD_R | TX_BD_L);

+			xFECTxDescriptors[ uxNextTxBuffer ].data = uip_buf;

+

+			/* Continue the Tx DMA (in case it was waiting for a new TxBD) */

+			MCF_FEC_TDAR = MCF_FEC_TDAR_X_DES_ACTIVE;

+

+			/* Remember which Rx descriptor owns the buffer we are sending. */

+			uxIndexToBufferOwner = uxNextRxBuffer;

+

+			uxNextTxBuffer++;

+			if( uxNextTxBuffer >= configNUM_FEC_TX_BUFFERS )

+			{

+				uxNextTxBuffer = 0;

+			}

+

+			/* We have finished with this Rx descriptor now. */

+			uxNextRxBuffer++;

+			if( uxNextRxBuffer >= configNUM_FEC_RX_BUFFERS )

+			{

+				uxNextRxBuffer = 0;

+			}

+

+			break;

+		}

+	}

+}

+/*-----------------------------------------------------------*/

+

+void vFEC_ISR( void )

+{

+unsigned portLONG ulEvent;

+portBASE_TYPE xHighPriorityTaskWoken = pdFALSE;

+

+	ulEvent = MCF_FEC_EIR & MCF_FEC_EIMR;

+	MCF_FEC_EIR = ulEvent;

+

+	if( ( ulEvent & MCF_FEC_EIR_RXB ) || ( ulEvent & MCF_FEC_EIR_RXF ) )

+	{

+		/* A packet has been received.  Wake the handler task. */

+		xSemaphoreGiveFromISR( xFECSemaphore, &xHighPriorityTaskWoken );

+	}

+

+	if( ulEvent & ( MCF_FEC_EIR_UN | MCF_FEC_EIR_RL | MCF_FEC_EIR_LC | MCF_FEC_EIR_EBERR | MCF_FEC_EIR_BABT | MCF_FEC_EIR_BABR | MCF_FEC_EIR_HBERR ) )

+	{

+		/* Sledge hammer error handling. */

+		prvInitialiseFECBuffers();

+		MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;

+	}

+

+	if( ( ulEvent & MCF_FEC_EIR_TXF ) || ( ulEvent & MCF_FEC_EIR_TXB ) )

+	{

+		/* The buffer being sent is pointed to by an Rx descriptor, now the

+		buffer has been sent we can mark the Rx descriptor as free again. */

+		xFECRxDescriptors[ uxIndexToBufferOwner ].status |= RX_BD_E;

+		MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;

+	}

+

+	portEND_SWITCHING_ISR( xHighPriorityTaskWoken );

+}

+/*-----------------------------------------------------------*/

+

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_88( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_89( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_90( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_91( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_92( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_93( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_94( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_95( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_96( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_97( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_98( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_99( void ) { vFEC_ISR(); }

+void __attribute__ ((interrupt)) __cs3_isr_interrupt_100( void ) { vFEC_ISR(); }

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/FEC.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/FEC.h
new file mode 100644
index 00000000..1a956b36
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/FEC.h
@@ -0,0 +1,80 @@
+/*

+ * File:    fec.h

+ * Purpose: Driver for the Fast Ethernet Controller (FEC)

+ *

+ * Notes:

+ */

+

+#ifndef _FEC_H_

+#define _FEC_H_

+

+#include "eth.h"

+#include "fecbd.h"

+#include "mii.h"

+#include "eth_phy.h"

+

+/********************************************************************/

+

+/* External Interface Modes */

+#define FEC_MODE_7WIRE          0   /* Old 7-wire (AMD) mode */

+#define FEC_MODE_MII            1   /* Media Independent Interface */

+#define FEC_MODE_RMII           2   /* Reduced MII */

+#define FEC_MODE_LOOPBACK       3   /* Internal Loopback */

+

+#define INTC_LVL_FEC			3

+/*

+ * FEC Configuration Parameters

+ */

+typedef struct

+{

+    uint8      ch;       /* FEC channel              */

+    uint8      mode;     /* Transceiver mode         */

+    MII_SPEED  speed;    /* Ethernet Speed           */

+    MII_DUPLEX duplex;   /* Ethernet Duplex          */

+    uint8      prom;     /* Promiscuous Mode?        */

+    uint8      mac[6];   /* Ethernet Address         */

+    uint8      phyaddr;  /* PHY address              */

+    uint8      initphy;  /* Init PHY?                */

+    int        nrxbd;    /* Number of RxBDs          */

+    int        ntxbd;    /* Number of TxBDs          */

+} FEC_CONFIG;

+#define YES 1

+#define NO 0

+/*

+ * FEC Event Log

+ */

+typedef struct {

+    int errors;     /* total count of errors   */

+    int hberr;      /* heartbeat error         */

+    int babr;       /* babbling receiver       */

+    int babt;       /* babbling transmitter    */

+    int gra;        /* graceful stop complete  */

+    int txf;        /* transmit frame          */

+    int txb;        /* transmit buffer         */

+    int rxf;        /* receive frame           */

+    int rxb;        /* received buffer         */

+    int mii;        /* MII                     */

+    int eberr;      /* FEC/DMA fatal bus error */

+    int lc;         /* late collision          */

+    int rl;         /* collision retry limit   */

+    int un;         /* Tx FIFO underflow       */

+    int rfsw_inv;   /* Invalid bit in RFSW     */

+    int rfsw_l;     /* RFSW Last in Frame      */

+    int rfsw_m;     /* RFSW Miss               */

+    int rfsw_bc;    /* RFSW Broadcast          */

+    int rfsw_mc;    /* RFSW Multicast          */

+    int rfsw_lg;    /* RFSW Length Violation   */

+    int rfsw_no;    /* RFSW Non-octet          */

+    int rfsw_cr;    /* RFSW Bad CRC            */

+    int rfsw_ov;    /* RFSW Overflow           */

+    int rfsw_tr;    /* RFSW Truncated          */

+} FEC_EVENT_LOG;

+

+void vInitFEC( void );

+unsigned short usGetFECRxData( void );

+void vSendBufferToFEC( void );

+void vDiscardRxData( void );

+

+/********************************************************************/

+

+#endif /* _FEC_H_ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/eth.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/eth.h
new file mode 100644
index 00000000..6b0b664b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/eth.h
@@ -0,0 +1,55 @@
+/*! 

+ * \file    eth.h

+ * \brief   Definitinos for Ethernet Frames

+ * \version $Revision: 1.2 $

+ * \author  Michael Norman

+ */

+

+#ifndef _ETH_H

+#define _ETH_H

+

+/*******************************************************************/

+

+/* Ethernet standard lengths in bytes*/

+#define ETH_ADDR_LEN    (6)

+#define ETH_TYPE_LEN    (2)

+#define ETH_CRC_LEN     (4)

+#define ETH_MAX_DATA    (1500)

+#define ETH_MIN_DATA    (46)

+#define ETH_HDR_LEN     (ETH_ADDR_LEN * 2 + ETH_TYPE_LEN)

+

+/* Defined Ethernet Frame Types */

+#define ETH_FRM_IP      (0x0800)

+#define ETH_FRM_ARP     (0x0806)

+#define ETH_FRM_RARP    (0x8035)

+#define ETH_FRM_TEST    (0xA5A5)

+

+/* Maximum and Minimum Ethernet Frame Sizes */

+#define ETH_MAX_FRM     (ETH_HDR_LEN + ETH_MAX_DATA + ETH_CRC_LEN)

+#define ETH_MIN_FRM     (ETH_HDR_LEN + ETH_MIN_DATA + ETH_CRC_LEN)

+#define ETH_MTU         (ETH_HDR_LEN + ETH_MAX_DATA)

+

+/* Ethernet Addresses */

+typedef uint8 ETH_ADDR[ETH_ADDR_LEN];

+

+/* 16-bit Ethernet Frame Type, ie. Protocol */

+typedef uint16 ETH_FRM_TYPE;

+

+/* Ethernet Frame Header definition */

+typedef struct

+{

+    ETH_ADDR     dest;

+    ETH_ADDR     src;

+    ETH_FRM_TYPE type;

+} ETH_HDR;

+

+/* Ethernet Frame definition */

+typedef struct

+{

+    ETH_HDR head;

+    uint8*  data;

+} ETH_FRAME;

+

+/*******************************************************************/

+

+#endif  /* _ETH_H */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/eth_phy.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/eth_phy.h
new file mode 100644
index 00000000..9242e10b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/eth_phy.h
@@ -0,0 +1,87 @@
+/*!

+ * \file    eth.h

+ * \brief   Definitions for Ethernet Physical Layer Interface

+ * \version $Revision: 1.3 $

+ * \author  Michael Norman

+ */

+

+#ifndef _ETH_PHY_H

+#define _ETH_PHY_H

+

+/*******************************************************************/

+

+int

+eth_phy_autoneg(int phy_addr, MII_SPEED speed, MII_DUPLEX duplex);

+

+int 

+eth_phy_manual(int phy_addr, MII_SPEED speed, MII_DUPLEX duplex, int loop);

+

+int 

+eth_phy_get_speed(int, int*);

+

+int 

+eth_phy_get_duplex(int, int*);

+

+int 

+eth_phy_reg_dump(int);

+

+/*******************************************************************/

+

+/* MII Register Addresses */

+#define PHY_BMCR				    (0x00)

+#define PHY_BMSR                    (0x01)

+#define PHY_PHYIDR1				    (0x02)

+#define PHY_PHYIDR2				    (0x03)

+#define PHY_ANAR				    (0x04)

+#define PHY_ANLPAR		            (0x05)

+

+/* Bit definitions and macros for PHY_CTRL */

+#define PHY_BMCR_RESET		        (0x8000)

+#define PHY_BMCR_LOOP   		    (0x4000)

+#define PHY_BMCR_SPEED		        (0x2000)

+#define PHY_BMCR_AN_ENABLE		    (0x1000)

+#define PHY_BMCR_POWERDOWN  	    (0x0800)

+#define PHY_BMCR_ISOLATE	        (0x0400)

+#define PHY_BMCR_AN_RESTART	        (0x0200)

+#define PHY_BMCR_FDX			    (0x0100)

+#define PHY_BMCR_COL_TEST	        (0x0080)

+

+/* Bit definitions and macros for PHY_STAT */

+#define PHY_BMSR_100BT4             (0x8000)

+#define PHY_BMSR_100BTX_FDX         (0x4000)

+#define PHY_BMSR_100BTX             (0x2000)

+#define PHY_BMSR_10BT_FDX           (0x1000)

+#define PHY_BMSR_10BT               (0x0800)

+#define PHY_BMSR_NO_PREAMBLE        (0x0040)

+#define PHY_BMSR_AN_COMPLETE        (0x0020)

+#define PHY_BMSR_REMOTE_FAULT       (0x0010)

+#define PHY_BMSR_AN_ABILITY         (0x0008)

+#define PHY_BMSR_LINK               (0x0004)

+#define PHY_BMSR_JABBER             (0x0002)

+#define PHY_BMSR_EXTENDED           (0x0001)

+

+/* Bit definitions and macros for PHY_AN_ADV */

+#define PHY_ANAR_NEXT_PAGE          (0x8001)

+#define PHY_ANAR_REM_FAULT	        (0x2001)

+#define PHY_ANAR_PAUSE		        (0x0401)

+#define PHY_ANAR_100BT4		        (0x0201)

+#define PHY_ANAR_100BTX_FDX	        (0x0101)

+#define PHY_ANAR_100BTX		        (0x0081)

+#define PHY_ANAR_10BT_FDX		    (0x0041)

+#define PHY_ANAR_10BT		        (0x0021)

+#define PHY_ANAR_802_3		        (0x0001)

+

+/* Bit definitions and macros for PHY_AN_LINK_PAR */

+#define PHY_ANLPAR_NEXT_PAGE        (0x8000)

+#define PHY_ANLPAR_ACK              (0x4000)

+#define PHY_ANLPAR_REM_FAULT	    (0x2000)

+#define PHY_ANLPAR_PAUSE		    (0x0400)

+#define PHY_ANLPAR_100BT4		    (0x0200)

+#define PHY_ANLPAR_100BTX_FDX	    (0x0100)

+#define PHY_ANLPAR_100BTX		    (0x0080)

+#define PHY_ANLPAR_10BTX_FDX        (0x0040)

+#define PHY_ANLPAR_10BT		        (0x0020)

+

+/*******************************************************************/

+

+#endif  /* _ETH_PHY_H */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/fecbd.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/fecbd.h
new file mode 100644
index 00000000..f9857823
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/fecbd.h
@@ -0,0 +1,100 @@
+/*

+ * File:    fecbd.h

+ * Purpose:

+ *

+ * Purpose: Provide a simple buffer management driver

+ */

+

+#ifndef _FECBD_H_

+#define _FECBD_H_

+

+/********************************************************************/

+

+#define Rx  1

+#define Tx  0

+

+/*

+ * Buffer sizes in bytes

+ */

+#ifndef RX_BUF_SZ

+#define RX_BUF_SZ  1520 //2048

+#endif

+#ifndef TX_BUF_SZ

+#define TX_BUF_SZ  1520

+#endif

+

+/*

+ * Buffer Descriptor Format

+ */

+typedef struct

+{

+    uint16 status;  /* control and status */

+    uint16 length;  /* transfer length */

+    uint8  *data;   /* buffer address */

+} FECBD;

+

+/*

+ * Bit level definitions for status field of buffer descriptors

+ */

+#define TX_BD_R         0x8000

+#define TX_BD_TO1       0x4000

+#define TX_BD_W         0x2000

+#define TX_BD_TO2       0x1000

+#define TX_BD_INTERRUPT 0x1000  /* MCF547x/8x Only */

+#define TX_BD_L         0x0800

+#define TX_BD_TC        0x0400

+#define TX_BD_DEF       0x0200  /* MCF5272 Only */

+#define TX_BD_ABC       0x0200

+#define TX_BD_HB        0x0100  /* MCF5272 Only */

+#define TX_BD_LC        0x0080  /* MCF5272 Only */

+#define TX_BD_RL        0x0040  /* MCF5272 Only */

+#define TX_BD_UN        0x0002  /* MCF5272 Only */

+#define TX_BD_CSL       0x0001  /* MCF5272 Only */

+

+#define RX_BD_E         0x8000

+#define RX_BD_R01       0x4000

+#define RX_BD_W         0x2000

+#define RX_BD_R02       0x1000

+#define RX_BD_INTERRUPT 0x1000  /* MCF547x/8x Only */

+#define RX_BD_L         0x0800

+#define RX_BD_M         0x0100

+#define RX_BD_BC        0x0080

+#define RX_BD_MC        0x0040

+#define RX_BD_LG        0x0020

+#define RX_BD_NO        0x0010

+#define RX_BD_CR        0x0004

+#define RX_BD_OV        0x0002

+#define RX_BD_TR        0x0001

+#define RX_BD_ERROR     (RX_BD_NO | RX_BD_CR | RX_BD_OV | RX_BD_TR)

+

+/*

+ * The following defines are provided by the MCF547x/8x

+ * DMA API.  These are shown here to show their correlation

+ * to the other FEC buffer descriptor status bits

+ *

+ * #define MCD_FEC_BUF_READY   0x8000

+ * #define MCD_FEC_WRAP        0x2000

+ * #define MCD_FEC_INTERRUPT   0x1000

+ * #define MCD_FEC_END_FRAME   0x0800

+ */

+

+/*

+ * Functions provided in fec_bd.c

+ */

+int     fecbd_init(int, int, int);

+void    fecbd_flush(int);

+void    fecbd_dump( void );

+uint32  fecbd_get_start(int, int);

+FECBD*  fecbd_rx_alloc(int);

+FECBD*  fecbd_tx_alloc(int);

+FECBD*  fecbd_tx_free(int);

+

+/*

+ * Error codes

+ */

+#define ERR_MALLOC      (-1)

+#define ERR_NBUFALLOC   (-2)

+

+/*******************************************************************/

+

+#endif /* _FECBD_H_ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/http-strings.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/http-strings.c
new file mode 100644
index 00000000..ef7a41c7
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/http-strings.c
@@ -0,0 +1,102 @@
+const char http_http[8] = 

+/* "http://" */

+{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };

+const char http_200[5] = 

+/* "200 " */

+{0x32, 0x30, 0x30, 0x20, };

+const char http_301[5] = 

+/* "301 " */

+{0x33, 0x30, 0x31, 0x20, };

+const char http_302[5] = 

+/* "302 " */

+{0x33, 0x30, 0x32, 0x20, };

+const char http_get[5] = 

+/* "GET " */

+{0x47, 0x45, 0x54, 0x20, };

+const char http_10[9] = 

+/* "HTTP/1.0" */

+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };

+const char http_11[9] = 

+/* "HTTP/1.1" */

+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };

+const char http_content_type[15] = 

+/* "content-type: " */

+{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };

+const char http_texthtml[10] = 

+/* "text/html" */

+{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };

+const char http_location[11] = 

+/* "location: " */

+{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };

+const char http_host[7] = 

+/* "host: " */

+{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };

+const char http_crnl[3] = 

+/* "\r\n" */

+{0xd, 0xa, };

+const char http_index_html[12] = 

+/* "/index.html" */

+{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };

+const char http_404_html[10] = 

+/* "/404.html" */

+{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };

+const char http_referer[9] = 

+/* "Referer:" */

+{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };

+const char http_header_200[84] = 

+/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */

+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };

+const char http_header_404[91] = 

+/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */

+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };

+const char http_content_type_plain[29] = 

+/* "Content-type: text/plain\r\n\r\n" */

+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };

+const char http_content_type_html[28] = 

+/* "Content-type: text/html\r\n\r\n" */

+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };

+const char http_content_type_css [27] = 

+/* "Content-type: text/css\r\n\r\n" */

+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };

+const char http_content_type_text[28] = 

+/* "Content-type: text/text\r\n\r\n" */

+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };

+const char http_content_type_png [28] = 

+/* "Content-type: image/png\r\n\r\n" */

+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };

+const char http_content_type_gif [28] = 

+/* "Content-type: image/gif\r\n\r\n" */

+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };

+const char http_content_type_jpg [29] = 

+/* "Content-type: image/jpeg\r\n\r\n" */

+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };

+const char http_content_type_binary[43] = 

+/* "Content-type: application/octet-stream\r\n\r\n" */

+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };

+const char http_html[6] = 

+/* ".html" */

+{0x2e, 0x68, 0x74, 0x6d, 0x6c, };

+const char http_shtml[7] = 

+/* ".shtml" */

+{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };

+const char http_htm[5] = 

+/* ".htm" */

+{0x2e, 0x68, 0x74, 0x6d, };

+const char http_css[5] = 

+/* ".css" */

+{0x2e, 0x63, 0x73, 0x73, };

+const char http_png[5] = 

+/* ".png" */

+{0x2e, 0x70, 0x6e, 0x67, };

+const char http_gif[5] = 

+/* ".gif" */

+{0x2e, 0x67, 0x69, 0x66, };

+const char http_jpg[5] = 

+/* ".jpg" */

+{0x2e, 0x6a, 0x70, 0x67, };

+const char http_text[5] = 

+/* ".txt" */

+{0x2e, 0x74, 0x78, 0x74, };

+const char http_txt[5] = 

+/* ".txt" */

+{0x2e, 0x74, 0x78, 0x74, };

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/http-strings.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/http-strings.h
new file mode 100644
index 00000000..acbe7e17
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/http-strings.h
@@ -0,0 +1,34 @@
+extern const char http_http[8];

+extern const char http_200[5];

+extern const char http_301[5];

+extern const char http_302[5];

+extern const char http_get[5];

+extern const char http_10[9];

+extern const char http_11[9];

+extern const char http_content_type[15];

+extern const char http_texthtml[10];

+extern const char http_location[11];

+extern const char http_host[7];

+extern const char http_crnl[3];

+extern const char http_index_html[12];

+extern const char http_404_html[10];

+extern const char http_referer[9];

+extern const char http_header_200[84];

+extern const char http_header_404[91];

+extern const char http_content_type_plain[29];

+extern const char http_content_type_html[28];

+extern const char http_content_type_css [27];

+extern const char http_content_type_text[28];

+extern const char http_content_type_png [28];

+extern const char http_content_type_gif [28];

+extern const char http_content_type_jpg [29];

+extern const char http_content_type_binary[43];

+extern const char http_html[6];

+extern const char http_shtml[7];

+extern const char http_htm[5];

+extern const char http_css[5];

+extern const char http_png[5];

+extern const char http_gif[5];

+extern const char http_jpg[5];

+extern const char http_text[5];

+extern const char http_txt[5];

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-cgi.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-cgi.c
new file mode 100644
index 00000000..4339d040
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-cgi.c
@@ -0,0 +1,151 @@
+/**

+ * \addtogroup httpd

+ * @{

+ */

+

+/**

+ * \file

+ *         Web server script interface

+ * \author

+ *         Adam Dunkels <adam@sics.se>

+ *

+ */

+

+/*

+ * Copyright (c) 2001-2006, Adam Dunkels.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. The name of the author may not be used to endorse or promote

+ *    products derived from this software without specific prior

+ *    written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS

+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY

+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE

+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,

+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING

+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+ *

+ * This file is part of the uIP TCP/IP stack.

+ *

+ * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $

+ *

+ */

+

+#include "uip.h"

+#include "psock.h"

+#include "httpd.h"

+#include "httpd-cgi.h"

+#include "httpd-fs.h"

+

+#include <stdio.h>

+#include <string.h>

+

+

+HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );

+

+static const struct httpd_cgi_call *calls[] = { &rtos, NULL };

+

+/*---------------------------------------------------------------------------*/

+static

+PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))

+{

+  PSOCK_BEGIN(&s->sout);

+  ( void ) ptr;

+  PSOCK_END(&s->sout);

+}

+/*---------------------------------------------------------------------------*/

+httpd_cgifunction

+httpd_cgi(char *name)

+{

+  const struct httpd_cgi_call **f;

+

+  /* Find the matching name in the table, return the function. */

+  for(f = calls; *f != NULL; ++f) {

+    if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {

+      return (*f)->function;

+    }

+  }

+  return nullfunction;

+}

+/*---------------------------------------------------------------------------*/

+static const char closed[] =   /*  "CLOSED",*/

+{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};

+static const char syn_rcvd[] = /*  "SYN-RCVD",*/

+{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,

+ 0x44,  0};

+static const char syn_sent[] = /*  "SYN-SENT",*/

+{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,

+ 0x54,  0};

+static const char established[] = /*  "ESTABLISHED",*/

+{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,

+ 0x45, 0x44, 0};

+static const char fin_wait_1[] = /*  "FIN-WAIT-1",*/

+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,

+ 0x54, 0x2d, 0x31, 0};

+static const char fin_wait_2[] = /*  "FIN-WAIT-2",*/

+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,

+ 0x54, 0x2d, 0x32, 0};

+static const char closing[] = /*  "CLOSING",*/

+{0x43, 0x4c, 0x4f, 0x53, 0x49,

+ 0x4e, 0x47, 0};

+static const char time_wait[] = /*  "TIME-WAIT,"*/

+{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,

+ 0x49, 0x54, 0};

+static const char last_ack[] = /*  "LAST-ACK"*/

+{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,

+ 0x4b, 0};

+

+

+/*---------------------------------------------------------------------------*/

+

+extern void vTaskList( signed char *pcWriteBuffer );

+static char cCountBuf[ 32 ];

+long lRefreshCount = 0;

+

+static unsigned short

+generate_rtos_stats(void *arg)

+{

+	( void ) arg;

+

+	lRefreshCount++;

+	sprintf( cCountBuf, "<p><br>Refresh count = %d", (int) lRefreshCount );

+    vTaskList( uip_appdata );

+	strcat( uip_appdata, cCountBuf );

+

+	return strlen( uip_appdata );

+}

+/*---------------------------------------------------------------------------*/

+

+

+static

+PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))

+{

+  PSOCK_BEGIN(&s->sout);

+  ( void ) ptr;

+  PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);

+  PSOCK_END(&s->sout);

+}

+/*---------------------------------------------------------------------------*/

+

+

+/** @} */

+

+

+

+

+

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-cgi.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-cgi.h
new file mode 100644
index 00000000..7ae92832
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-cgi.h
@@ -0,0 +1,84 @@
+/**

+ * \addtogroup httpd

+ * @{

+ */

+

+/**

+ * \file

+ *         Web server script interface header file

+ * \author

+ *         Adam Dunkels <adam@sics.se>

+ *

+ */

+

+

+

+/*

+ * Copyright (c) 2001, Adam Dunkels.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. The name of the author may not be used to endorse or promote

+ *    products derived from this software without specific prior

+ *    written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS

+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY

+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE

+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,

+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING

+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+ *

+ * This file is part of the uIP TCP/IP stack.

+ *

+ * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $

+ *

+ */

+

+#ifndef __HTTPD_CGI_H__

+#define __HTTPD_CGI_H__

+

+#include "psock.h"

+#include "httpd.h"

+

+typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));

+

+httpd_cgifunction httpd_cgi(char *name);

+

+struct httpd_cgi_call {

+  const char *name;

+  const httpd_cgifunction function;

+};

+

+/**

+ * \brief      HTTPD CGI function declaration

+ * \param name The C variable name of the function

+ * \param str  The string name of the function, used in the script file

+ * \param function A pointer to the function that implements it

+ *

+ *             This macro is used for declaring a HTTPD CGI

+ *             function. This function is then added to the list of

+ *             HTTPD CGI functions with the httpd_cgi_add() function.

+ *

+ * \hideinitializer

+ */

+#define HTTPD_CGI_CALL(name, str, function) \

+static PT_THREAD(function(struct httpd_state *, char *)); \

+static const struct httpd_cgi_call name = {str, function}

+

+void httpd_cgi_init(void);

+#endif /* __HTTPD_CGI_H__ */

+

+/** @} */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs.c
new file mode 100644
index 00000000..dc4aef01
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs.c
@@ -0,0 +1,132 @@
+/*

+ * Copyright (c) 2001, Swedish Institute of Computer Science.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. Neither the name of the Institute nor the names of its contributors

+ *    may be used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND

+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE

+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

+ * SUCH DAMAGE.

+ *

+ * This file is part of the lwIP TCP/IP stack.

+ *

+ * Author: Adam Dunkels <adam@sics.se>

+ *

+ * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $

+ */

+

+#include "httpd.h"

+#include "httpd-fs.h"

+#include "httpd-fsdata.h"

+

+#ifndef NULL

+#define NULL 0

+#endif /* NULL */

+

+#include "httpd-fsdata.c"

+

+#if HTTPD_FS_STATISTICS

+static u16_t count[HTTPD_FS_NUMFILES];

+#endif /* HTTPD_FS_STATISTICS */

+

+/*-----------------------------------------------------------------------------------*/

+static u8_t

+httpd_fs_strcmp(const char *str1, const char *str2)

+{

+  u8_t i;

+  i = 0;

+ loop:

+

+  if(str2[i] == 0 ||

+     str1[i] == '\r' ||

+     str1[i] == '\n') {

+    return 0;

+  }

+

+  if(str1[i] != str2[i]) {

+    return 1;

+  }

+

+

+  ++i;

+  goto loop;

+}

+/*-----------------------------------------------------------------------------------*/

+int

+httpd_fs_open(const char *name, struct httpd_fs_file *file)

+{

+#if HTTPD_FS_STATISTICS

+  u16_t i = 0;

+#endif /* HTTPD_FS_STATISTICS */

+  struct httpd_fsdata_file_noconst *f;

+

+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;

+      f != NULL;

+      f = (struct httpd_fsdata_file_noconst *)f->next) {

+

+    if(httpd_fs_strcmp(name, f->name) == 0) {

+      file->data = f->data;

+      file->len = f->len;

+#if HTTPD_FS_STATISTICS

+      ++count[i];

+#endif /* HTTPD_FS_STATISTICS */

+      return 1;

+    }

+#if HTTPD_FS_STATISTICS

+    ++i;

+#endif /* HTTPD_FS_STATISTICS */

+

+  }

+  return 0;

+}

+/*-----------------------------------------------------------------------------------*/

+void

+httpd_fs_init(void)

+{

+#if HTTPD_FS_STATISTICS

+  u16_t i;

+  for(i = 0; i < HTTPD_FS_NUMFILES; i++) {

+    count[i] = 0;

+  }

+#endif /* HTTPD_FS_STATISTICS */

+}

+/*-----------------------------------------------------------------------------------*/

+#if HTTPD_FS_STATISTICS

+u16_t httpd_fs_count

+(char *name)

+{

+  struct httpd_fsdata_file_noconst *f;

+  u16_t i;

+

+  i = 0;

+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;

+      f != NULL;

+      f = (struct httpd_fsdata_file_noconst *)f->next) {

+

+    if(httpd_fs_strcmp(name, f->name) == 0) {

+      return count[i];

+    }

+    ++i;

+  }

+  return 0;

+}

+#endif /* HTTPD_FS_STATISTICS */

+/*-----------------------------------------------------------------------------------*/

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs.h
new file mode 100644
index 00000000..b5fd1c1a
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs.h
@@ -0,0 +1,57 @@
+/*

+ * Copyright (c) 2001, Swedish Institute of Computer Science.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. Neither the name of the Institute nor the names of its contributors

+ *    may be used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND

+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE

+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

+ * SUCH DAMAGE.

+ *

+ * This file is part of the lwIP TCP/IP stack.

+ *

+ * Author: Adam Dunkels <adam@sics.se>

+ *

+ * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $

+ */

+#ifndef __HTTPD_FS_H__

+#define __HTTPD_FS_H__

+

+#define HTTPD_FS_STATISTICS 0

+

+struct httpd_fs_file {

+  char *data;

+  int len;

+};

+

+/* file must be allocated by caller and will be filled in

+   by the function. */

+int httpd_fs_open(const char *name, struct httpd_fs_file *file);

+

+#ifdef HTTPD_FS_STATISTICS

+#if HTTPD_FS_STATISTICS == 1

+u16_t httpd_fs_count(char *name);

+#endif /* HTTPD_FS_STATISTICS */

+#endif /* HTTPD_FS_STATISTICS */

+

+void httpd_fs_init(void);

+

+#endif /* __HTTPD_FS_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs/index.html b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs/index.html
new file mode 100644
index 00000000..1d3bbeee
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs/index.html
@@ -0,0 +1,13 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

+<html>

+  <head>

+    <title>FreeRTOS.org uIP WEB server demo</title>

+  </head>

+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,100)"bgcolor="#CCCCff">

+<font face="arial">

+Loading index.shtml.  Click <a href="index.shtml">here</a> if not automatically redirected.

+</font>

+</font>

+</body>

+</html>

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml
new file mode 100644
index 00000000..02b7c26f
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fs/index.shtml
@@ -0,0 +1,17 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

+<html>

+  <head>

+    <title>FreeRTOS.org uIP WEB server demo</title>

+  </head>

+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,2000)"bgcolor="#CCCCff">

+<font face="arial">

+<br><p>

+<h2>Task statistics</h2>

+Page will refresh every 2 seconds.<p>

+<font face="courier"><pre>Task          State  Priority  Stack	#<br>************************************************<br>

+%! rtos-stats

+</pre></font>

+</font>

+</body>

+</html>

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fsdata.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fsdata.c
new file mode 100644
index 00000000..bb4c592e
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fsdata.c
@@ -0,0 +1,116 @@
+static const unsigned char data_index_html[] = {
+	/* /index.html */
+	0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,
+	0x3c, 0x21, 0x44, 0x4f, 0x43, 0x54, 0x59, 0x50, 0x45, 0x20,
+	0x48, 0x54, 0x4d, 0x4c, 0x20, 0x50, 0x55, 0x42, 0x4c, 0x49,
+	0x43, 0x20, 0x22, 0x2d, 0x2f, 0x2f, 0x57, 0x33, 0x43, 0x2f,
+	0x2f, 0x44, 0x54, 0x44, 0x20, 0x48, 0x54, 0x4d, 0x4c, 0x20,
+	0x34, 0x2e, 0x30, 0x31, 0x20, 0x54, 0x72, 0x61, 0x6e, 0x73,
+	0x69, 0x74, 0x69, 0x6f, 0x6e, 0x61, 0x6c, 0x2f, 0x2f, 0x45,
+	0x4e, 0x22, 0x20, 0x22, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f,
+	0x2f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x33, 0x2e, 0x6f, 0x72,
+	0x67, 0x2f, 0x54, 0x52, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x34,
+	0x2f, 0x6c, 0x6f, 0x6f, 0x73, 0x65, 0x2e, 0x64, 0x74, 0x64,
+	0x22, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e,
+	0xd, 0xa, 0x20, 0x20, 0x3c, 0x68, 0x65, 0x61, 0x64, 0x3e,
+	0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x74, 0x69, 0x74,
+	0x6c, 0x65, 0x3e, 0x46, 0x72, 0x65, 0x65, 0x52, 0x54, 0x4f,
+	0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x75, 0x49, 0x50, 0x20,
+	0x57, 0x45, 0x42, 0x20, 0x73, 0x65, 0x72, 0x76, 0x65, 0x72,
+	0x20, 0x64, 0x65, 0x6d, 0x6f, 0x3c, 0x2f, 0x74, 0x69, 0x74,
+	0x6c, 0x65, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x3c, 0x2f, 0x68,
+	0x65, 0x61, 0x64, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x3c, 0x42,
+	0x4f, 0x44, 0x59, 0x20, 0x6f, 0x6e, 0x4c, 0x6f, 0x61, 0x64,
+	0x3d, 0x22, 0x77, 0x69, 0x6e, 0x64, 0x6f, 0x77, 0x2e, 0x73,
+	0x65, 0x74, 0x54, 0x69, 0x6d, 0x65, 0x6f, 0x75, 0x74, 0x28,
+	0x26, 0x71, 0x75, 0x6f, 0x74, 0x3b, 0x6c, 0x6f, 0x63, 0x61,
+	0x74, 0x69, 0x6f, 0x6e, 0x2e, 0x68, 0x72, 0x65, 0x66, 0x3d,
+	0x27, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x73, 0x68, 0x74,
+	0x6d, 0x6c, 0x27, 0x26, 0x71, 0x75, 0x6f, 0x74, 0x3b, 0x2c,
+	0x31, 0x30, 0x30, 0x29, 0x22, 0x62, 0x67, 0x63, 0x6f, 0x6c,
+	0x6f, 0x72, 0x3d, 0x22, 0x23, 0x43, 0x43, 0x43, 0x43, 0x66,
+	0x66, 0x22, 0x3e, 0xd, 0xa, 0x3c, 0x66, 0x6f, 0x6e, 0x74,
+	0x20, 0x66, 0x61, 0x63, 0x65, 0x3d, 0x22, 0x61, 0x72, 0x69,
+	0x61, 0x6c, 0x22, 0x3e, 0xd, 0xa, 0x4c, 0x6f, 0x61, 0x64,
+	0x69, 0x6e, 0x67, 0x20, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e,
+	0x73, 0x68, 0x74, 0x6d, 0x6c, 0x2e, 0x20, 0x20, 0x43, 0x6c,
+	0x69, 0x63, 0x6b, 0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65,
+	0x66, 0x3d, 0x22, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x73,
+	0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, 0x68, 0x65, 0x72, 0x65,
+	0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69, 0x66, 0x20, 0x6e, 0x6f,
+	0x74, 0x20, 0x61, 0x75, 0x74, 0x6f, 0x6d, 0x61, 0x74, 0x69,
+	0x63, 0x61, 0x6c, 0x6c, 0x79, 0x20, 0x72, 0x65, 0x64, 0x69,
+	0x72, 0x65, 0x63, 0x74, 0x65, 0x64, 0x2e, 0xd, 0xa, 0x3c,
+	0x2f, 0x66, 0x6f, 0x6e, 0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f,
+	0x66, 0x6f, 0x6e, 0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x62,
+	0x6f, 0x64, 0x79, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74,
+	0x6d, 0x6c, 0x3e, 0xd, 0xa, 0xd, 0xa, 0};
+
+static const unsigned char data_index_shtml[] = {
+	/* /index.shtml */
+	0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0,
+	0x3c, 0x21, 0x44, 0x4f, 0x43, 0x54, 0x59, 0x50, 0x45, 0x20,
+	0x48, 0x54, 0x4d, 0x4c, 0x20, 0x50, 0x55, 0x42, 0x4c, 0x49,
+	0x43, 0x20, 0x22, 0x2d, 0x2f, 0x2f, 0x57, 0x33, 0x43, 0x2f,
+	0x2f, 0x44, 0x54, 0x44, 0x20, 0x48, 0x54, 0x4d, 0x4c, 0x20,
+	0x34, 0x2e, 0x30, 0x31, 0x20, 0x54, 0x72, 0x61, 0x6e, 0x73,
+	0x69, 0x74, 0x69, 0x6f, 0x6e, 0x61, 0x6c, 0x2f, 0x2f, 0x45,
+	0x4e, 0x22, 0x20, 0x22, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f,
+	0x2f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x33, 0x2e, 0x6f, 0x72,
+	0x67, 0x2f, 0x54, 0x52, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x34,
+	0x2f, 0x6c, 0x6f, 0x6f, 0x73, 0x65, 0x2e, 0x64, 0x74, 0x64,
+	0x22, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e,
+	0xd, 0xa, 0x20, 0x20, 0x3c, 0x68, 0x65, 0x61, 0x64, 0x3e,
+	0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x74, 0x69, 0x74,
+	0x6c, 0x65, 0x3e, 0x46, 0x72, 0x65, 0x65, 0x52, 0x54, 0x4f,
+	0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x75, 0x49, 0x50, 0x20,
+	0x57, 0x45, 0x42, 0x20, 0x73, 0x65, 0x72, 0x76, 0x65, 0x72,
+	0x20, 0x64, 0x65, 0x6d, 0x6f, 0x3c, 0x2f, 0x74, 0x69, 0x74,
+	0x6c, 0x65, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x3c, 0x2f, 0x68,
+	0x65, 0x61, 0x64, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x3c, 0x42,
+	0x4f, 0x44, 0x59, 0x20, 0x6f, 0x6e, 0x4c, 0x6f, 0x61, 0x64,
+	0x3d, 0x22, 0x77, 0x69, 0x6e, 0x64, 0x6f, 0x77, 0x2e, 0x73,
+	0x65, 0x74, 0x54, 0x69, 0x6d, 0x65, 0x6f, 0x75, 0x74, 0x28,
+	0x26, 0x71, 0x75, 0x6f, 0x74, 0x3b, 0x6c, 0x6f, 0x63, 0x61,
+	0x74, 0x69, 0x6f, 0x6e, 0x2e, 0x68, 0x72, 0x65, 0x66, 0x3d,
+	0x27, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x73, 0x68, 0x74,
+	0x6d, 0x6c, 0x27, 0x26, 0x71, 0x75, 0x6f, 0x74, 0x3b, 0x2c,
+	0x32, 0x30, 0x30, 0x30, 0x29, 0x22, 0x62, 0x67, 0x63, 0x6f,
+	0x6c, 0x6f, 0x72, 0x3d, 0x22, 0x23, 0x43, 0x43, 0x43, 0x43,
+	0x66, 0x66, 0x22, 0x3e, 0xd, 0xa, 0x3c, 0x66, 0x6f, 0x6e,
+	0x74, 0x20, 0x66, 0x61, 0x63, 0x65, 0x3d, 0x22, 0x61, 0x72,
+	0x69, 0x61, 0x6c, 0x22, 0x3e, 0xd, 0xa, 0x3c, 0x62, 0x72,
+	0x3e, 0x3c, 0x70, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x32, 0x3e,
+	0x54, 0x61, 0x73, 0x6b, 0x20, 0x73, 0x74, 0x61, 0x74, 0x69,
+	0x73, 0x74, 0x69, 0x63, 0x73, 0x3c, 0x2f, 0x68, 0x32, 0x3e,
+	0xd, 0xa, 0x50, 0x61, 0x67, 0x65, 0x20, 0x77, 0x69, 0x6c,
+	0x6c, 0x20, 0x72, 0x65, 0x66, 0x72, 0x65, 0x73, 0x68, 0x20,
+	0x65, 0x76, 0x65, 0x72, 0x79, 0x20, 0x32, 0x20, 0x73, 0x65,
+	0x63, 0x6f, 0x6e, 0x64, 0x73, 0x2e, 0x3c, 0x70, 0x3e, 0xd,
+	0xa, 0x3c, 0x66, 0x6f, 0x6e, 0x74, 0x20, 0x66, 0x61, 0x63,
+	0x65, 0x3d, 0x22, 0x63, 0x6f, 0x75, 0x72, 0x69, 0x65, 0x72,
+	0x22, 0x3e, 0x3c, 0x70, 0x72, 0x65, 0x3e, 0x54, 0x61, 0x73,
+	0x6b, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+	0x20, 0x53, 0x74, 0x61, 0x74, 0x65, 0x20, 0x20, 0x50, 0x72,
+	0x69, 0x6f, 0x72, 0x69, 0x74, 0x79, 0x20, 0x20, 0x53, 0x74,
+	0x61, 0x63, 0x6b, 0x9, 0x23, 0x3c, 0x62, 0x72, 0x3e, 0x2a,
+	0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
+	0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
+	0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
+	0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
+	0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x3c, 0x62, 0x72,
+	0x3e, 0xd, 0xa, 0x25, 0x21, 0x20, 0x72, 0x74, 0x6f, 0x73,
+	0x2d, 0x73, 0x74, 0x61, 0x74, 0x73, 0xd, 0xa, 0x3c, 0x2f,
+	0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 0x74,
+	0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 0x74, 0x3e,
+	0xd, 0xa, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, 0xd,
+	0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 0xa,
+	0xd, 0xa, 0};
+
+const struct httpd_fsdata_file file_index_html[] = {{NULL, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};
+
+const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};
+
+#define HTTPD_FS_ROOT file_index_shtml
+
+#define HTTPD_FS_NUMFILES 2
diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fsdata.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fsdata.h
new file mode 100644
index 00000000..73a9994d
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd-fsdata.h
@@ -0,0 +1,64 @@
+/*

+ * Copyright (c) 2001, Swedish Institute of Computer Science.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. Neither the name of the Institute nor the names of its contributors

+ *    may be used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND

+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE

+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

+ * SUCH DAMAGE.

+ *

+ * This file is part of the lwIP TCP/IP stack.

+ *

+ * Author: Adam Dunkels <adam@sics.se>

+ *

+ * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $

+ */

+#ifndef __HTTPD_FSDATA_H__

+#define __HTTPD_FSDATA_H__

+

+#include "uip.h"

+

+struct httpd_fsdata_file {

+  const struct httpd_fsdata_file *next;

+  const unsigned char *name;

+  const unsigned char *data;

+  const int len;

+#ifdef HTTPD_FS_STATISTICS

+#if HTTPD_FS_STATISTICS == 1

+  u16_t count;

+#endif /* HTTPD_FS_STATISTICS */

+#endif /* HTTPD_FS_STATISTICS */

+};

+

+struct httpd_fsdata_file_noconst {

+  struct httpd_fsdata_file *next;

+  char *name;

+  char *data;

+  int len;

+#ifdef HTTPD_FS_STATISTICS

+#if HTTPD_FS_STATISTICS == 1

+  u16_t count;

+#endif /* HTTPD_FS_STATISTICS */

+#endif /* HTTPD_FS_STATISTICS */

+};

+

+#endif /* __HTTPD_FSDATA_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd.c
new file mode 100644
index 00000000..3cf6855b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd.c
@@ -0,0 +1,340 @@
+/**

+ * \addtogroup apps

+ * @{

+ */

+

+/**

+ * \defgroup httpd Web server

+ * @{

+ * The uIP web server is a very simplistic implementation of an HTTP

+ * server. It can serve web pages and files from a read-only ROM

+ * filesystem, and provides a very small scripting language.

+

+ */

+

+/**

+ * \file

+ *         Web server

+ * \author

+ *         Adam Dunkels <adam@sics.se>

+ */

+

+

+/*

+ * Copyright (c) 2004, Adam Dunkels.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. Neither the name of the Institute nor the names of its contributors

+ *    may be used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND

+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE

+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

+ * SUCH DAMAGE.

+ *

+ * This file is part of the uIP TCP/IP stack.

+ *

+ * Author: Adam Dunkels <adam@sics.se>

+ *

+ * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $

+ */

+

+#include "uip.h"

+#include "httpd.h"

+#include "httpd-fs.h"

+#include "httpd-cgi.h"

+#include "http-strings.h"

+

+#include <string.h>

+

+#define STATE_WAITING 0

+#define STATE_OUTPUT  1

+

+#define ISO_nl      0x0a

+#define ISO_space   0x20

+#define ISO_bang    0x21

+#define ISO_percent 0x25

+#define ISO_period  0x2e

+#define ISO_slash   0x2f

+#define ISO_colon   0x3a

+

+

+/*---------------------------------------------------------------------------*/

+static unsigned short

+generate_part_of_file(void *state)

+{

+  struct httpd_state *s = (struct httpd_state *)state;

+

+  if(s->file.len > uip_mss()) {

+    s->len = uip_mss();

+  } else {

+    s->len = s->file.len;

+  }

+  memcpy(uip_appdata, s->file.data, s->len);

+

+  return s->len;

+}

+/*---------------------------------------------------------------------------*/

+static

+PT_THREAD(send_file(struct httpd_state *s))

+{

+  PSOCK_BEGIN(&s->sout);

+

+  do {

+    PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);

+    s->file.len -= s->len;

+    s->file.data += s->len;

+  } while(s->file.len > 0);

+

+  PSOCK_END(&s->sout);

+}

+/*---------------------------------------------------------------------------*/

+static

+PT_THREAD(send_part_of_file(struct httpd_state *s))

+{

+  PSOCK_BEGIN(&s->sout);

+

+  PSOCK_SEND(&s->sout, s->file.data, s->len);

+

+  PSOCK_END(&s->sout);

+}

+/*---------------------------------------------------------------------------*/

+static void

+next_scriptstate(struct httpd_state *s)

+{

+  char *p;

+  p = strchr(s->scriptptr, ISO_nl) + 1;

+  s->scriptlen -= (unsigned short)(p - s->scriptptr);

+  s->scriptptr = p;

+}

+/*---------------------------------------------------------------------------*/

+static

+PT_THREAD(handle_script(struct httpd_state *s))

+{

+  char *ptr;

+

+  PT_BEGIN(&s->scriptpt);

+

+

+  while(s->file.len > 0) {

+

+    /* Check if we should start executing a script. */

+    if(*s->file.data == ISO_percent &&

+       *(s->file.data + 1) == ISO_bang) {

+      s->scriptptr = s->file.data + 3;

+      s->scriptlen = s->file.len - 3;

+      if(*(s->scriptptr - 1) == ISO_colon) {

+	httpd_fs_open(s->scriptptr + 1, &s->file);

+	PT_WAIT_THREAD(&s->scriptpt, send_file(s));

+      } else {

+	PT_WAIT_THREAD(&s->scriptpt,

+		       httpd_cgi(s->scriptptr)(s, s->scriptptr));

+      }

+      next_scriptstate(s);

+

+      /* The script is over, so we reset the pointers and continue

+	 sending the rest of the file. */

+      s->file.data = s->scriptptr;

+      s->file.len = s->scriptlen;

+    } else {

+      /* See if we find the start of script marker in the block of HTML

+	 to be sent. */

+

+      if(s->file.len > uip_mss()) {

+	s->len = uip_mss();

+      } else {

+	s->len = s->file.len;

+      }

+

+      if(*s->file.data == ISO_percent) {

+	ptr = strchr(s->file.data + 1, ISO_percent);

+      } else {

+	ptr = strchr(s->file.data, ISO_percent);

+      }

+      if(ptr != NULL &&

+	 ptr != s->file.data) {

+	s->len = (int)(ptr - s->file.data);

+	if(s->len >= uip_mss()) {

+	  s->len = uip_mss();

+	}

+      }

+      PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));

+      s->file.data += s->len;

+      s->file.len -= s->len;

+

+    }

+  }

+

+  PT_END(&s->scriptpt);

+}

+/*---------------------------------------------------------------------------*/

+static

+PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))

+{

+  char *ptr;

+

+  PSOCK_BEGIN(&s->sout);

+

+  PSOCK_SEND_STR(&s->sout, statushdr);

+

+  ptr = strrchr(s->filename, ISO_period);

+  if(ptr == NULL) {

+    PSOCK_SEND_STR(&s->sout, http_content_type_binary);

+  } else if(strncmp(http_html, ptr, 5) == 0 ||

+	    strncmp(http_shtml, ptr, 6) == 0) {

+    PSOCK_SEND_STR(&s->sout, http_content_type_html);

+  } else if(strncmp(http_css, ptr, 4) == 0) {

+    PSOCK_SEND_STR(&s->sout, http_content_type_css);

+  } else if(strncmp(http_png, ptr, 4) == 0) {

+    PSOCK_SEND_STR(&s->sout, http_content_type_png);

+  } else if(strncmp(http_gif, ptr, 4) == 0) {

+    PSOCK_SEND_STR(&s->sout, http_content_type_gif);

+  } else if(strncmp(http_jpg, ptr, 4) == 0) {

+    PSOCK_SEND_STR(&s->sout, http_content_type_jpg);

+  } else {

+    PSOCK_SEND_STR(&s->sout, http_content_type_plain);

+  }

+  PSOCK_END(&s->sout);

+}

+/*---------------------------------------------------------------------------*/

+static

+PT_THREAD(handle_output(struct httpd_state *s))

+{

+  char *ptr;

+

+  PT_BEGIN(&s->outputpt);

+

+  if(!httpd_fs_open(s->filename, &s->file)) {

+    httpd_fs_open(http_404_html, &s->file);

+    strcpy(s->filename, http_404_html);

+    PT_WAIT_THREAD(&s->outputpt,

+		   send_headers(s,

+		   http_header_404));

+    PT_WAIT_THREAD(&s->outputpt,

+		   send_file(s));

+  } else {

+    PT_WAIT_THREAD(&s->outputpt,

+		   send_headers(s,

+		   http_header_200));

+    ptr = strchr(s->filename, ISO_period);

+    if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {

+      PT_INIT(&s->scriptpt);

+      PT_WAIT_THREAD(&s->outputpt, handle_script(s));

+    } else {

+      PT_WAIT_THREAD(&s->outputpt,

+		     send_file(s));

+    }

+  }

+  PSOCK_CLOSE(&s->sout);

+  PT_END(&s->outputpt);

+}

+/*---------------------------------------------------------------------------*/

+static

+PT_THREAD(handle_input(struct httpd_state *s))

+{

+  PSOCK_BEGIN(&s->sin);

+

+  PSOCK_READTO(&s->sin, ISO_space);

+

+

+  if(strncmp(s->inputbuf, http_get, 4) != 0) {

+    PSOCK_CLOSE_EXIT(&s->sin);

+  }

+  PSOCK_READTO(&s->sin, ISO_space);

+

+  if(s->inputbuf[0] != ISO_slash) {

+    PSOCK_CLOSE_EXIT(&s->sin);

+  }

+

+  if(s->inputbuf[1] == ISO_space) {

+    strncpy(s->filename, http_index_html, sizeof(s->filename));

+  } else {

+

+    s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;

+

+    strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));

+  }

+

+  /*  httpd_log_file(uip_conn->ripaddr, s->filename);*/

+

+  s->state = STATE_OUTPUT;

+

+  while(1) {

+    PSOCK_READTO(&s->sin, ISO_nl);

+

+    if(strncmp(s->inputbuf, http_referer, 8) == 0) {

+      s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;

+      /*      httpd_log(&s->inputbuf[9]);*/

+    }

+  }

+

+  PSOCK_END(&s->sin);

+}

+/*---------------------------------------------------------------------------*/

+static void

+handle_connection(struct httpd_state *s)

+{

+  handle_input(s);

+  if(s->state == STATE_OUTPUT) {

+    handle_output(s);

+  }

+}

+/*---------------------------------------------------------------------------*/

+void

+httpd_appcall(void)

+{

+  struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);

+

+  if(uip_closed() || uip_aborted() || uip_timedout()) {

+  } else if(uip_connected()) {

+    PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);

+    PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);

+    PT_INIT(&s->outputpt);

+    s->state = STATE_WAITING;

+    /*    timer_set(&s->timer, CLOCK_SECOND * 100);*/

+    s->timer = 0;

+    handle_connection(s);

+  } else if(s != NULL) {

+    if(uip_poll()) {

+      ++s->timer;

+      if(s->timer >= 20) {

+	uip_abort();

+      }

+    } else {

+      s->timer = 0;

+    }

+    handle_connection(s);

+  } else {

+    uip_abort();

+  }

+}

+/*---------------------------------------------------------------------------*/

+/**

+ * \brief      Initialize the web server

+ *

+ *             This function initializes the web server and should be

+ *             called at system boot-up.

+ */

+void

+httpd_init(void)

+{

+  uip_listen(HTONS(80));

+}

+/*---------------------------------------------------------------------------*/

+/** @} */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd.h
new file mode 100644
index 00000000..7f7a6666
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/httpd.h
@@ -0,0 +1,62 @@
+/*

+ * Copyright (c) 2001-2005, Adam Dunkels.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. The name of the author may not be used to endorse or promote

+ *    products derived from this software without specific prior

+ *    written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS

+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY

+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE

+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,

+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING

+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+ *

+ * This file is part of the uIP TCP/IP stack.

+ *

+ * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $

+ *

+ */

+

+#ifndef __HTTPD_H__

+#define __HTTPD_H__

+

+#include "psock.h"

+#include "httpd-fs.h"

+

+struct httpd_state {

+  unsigned char timer;

+  struct psock sin, sout;

+  struct pt outputpt, scriptpt;

+  char inputbuf[50];

+  char filename[20];

+  char state;

+  struct httpd_fs_file file;

+  int len;

+  char *scriptptr;

+  int scriptlen;

+  

+  unsigned short count;

+};

+

+void httpd_init(void);

+void httpd_appcall(void);

+

+void httpd_log(char *msg);

+void httpd_log_file(u16_t *requester, char *file);

+

+#endif /* __HTTPD_H__ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/makefsdata b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/makefsdata
new file mode 100644
index 00000000..8d2715a8
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/makefsdata
@@ -0,0 +1,78 @@
+#!/usr/bin/perl

+

+open(OUTPUT, "> httpd-fsdata.c");

+

+chdir("httpd-fs");

+

+opendir(DIR, ".");

+@files =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);

+closedir(DIR);

+

+foreach $file (@files) {  

+   

+    if(-d $file && $file !~ /^\./) {

+	print "Processing directory $file\n";

+	opendir(DIR, $file);

+	@newfiles =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);

+	closedir(DIR);

+	printf "Adding files @newfiles\n";

+	@files = (@files, map { $_ = "$file/$_" } @newfiles);

+	next;

+    }

+}

+

+foreach $file (@files) {

+    if(-f $file) {

+	

+	print "Adding file $file\n";

+	

+	open(FILE, $file) || die "Could not open file $file\n";

+

+	$file =~ s-^-/-;

+	$fvar = $file;

+	$fvar =~ s-/-_-g;

+	$fvar =~ s-\.-_-g;

+	# for AVR, add PROGMEM here

+	print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");

+	print(OUTPUT "\t/* $file */\n\t");

+	for($j = 0; $j < length($file); $j++) {

+	    printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));

+	}

+	printf(OUTPUT "0,\n");

+	

+	

+	$i = 0;        

+	while(read(FILE, $data, 1)) {

+	    if($i == 0) {

+		print(OUTPUT "\t");

+	    }

+	    printf(OUTPUT "%#02x, ", unpack("C", $data));

+	    $i++;

+	    if($i == 10) {

+		print(OUTPUT "\n");

+		$i = 0;

+	    }

+	}

+	print(OUTPUT "0};\n\n");

+	close(FILE);

+	push(@fvars, $fvar);

+	push(@pfiles, $file);

+    }

+}

+

+for($i = 0; $i < @fvars; $i++) {

+    $file = $pfiles[$i];

+    $fvar = $fvars[$i];

+

+    if($i == 0) {

+        $prevfile = "NULL";

+    } else {

+        $prevfile = "file" . $fvars[$i - 1];

+    }

+    print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");

+    print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");

+    print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");

+}

+

+print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");

+print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/mii.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/mii.h
new file mode 100644
index 00000000..26b27934
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/mii.h
@@ -0,0 +1,43 @@
+/*!

+ * \file    mii.h

+ * \brief   Media Independent Interface (MII) driver

+ * \version $Revision: 1.3 $

+ * \author  Michael Norman

+ * 

+ * \warning This driver assumes that FEC0 is used for all MII management

+ *          communications.  For dual PHYs, etc., insure that FEC0_MDC and

+ *          FEC0_MDIO are connected to the PHY's MDC and MDIO.

+ */

+

+#ifndef _MII_H_

+#define _MII_H_

+

+/*******************************************************************/

+

+int

+mii_write(int, int, uint16);

+

+int

+mii_read(int, int, uint16*);

+

+void

+mii_init(int);

+

+/* MII Speed Settings */

+typedef enum {

+	MII_10BASE_T,	/*!< 10Base-T  operation */

+	MII_100BASE_TX	/*!< 100Base-TX operation */

+} MII_SPEED;

+

+/* MII Duplex Settings */

+typedef enum {

+	MII_HDX,		/*!< half-duplex */

+	MII_FDX			/*!< full-duplex */

+} MII_DUPLEX;

+

+#define MII_TIMEOUT		    0x10000

+#define MII_LINK_TIMEOUT	0x10000

+

+/*******************************************************************/

+

+#endif /* _MII_H_ */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/uIP_Task.c b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/uIP_Task.c
new file mode 100644
index 00000000..94db7917
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/uIP_Task.c
@@ -0,0 +1,230 @@
+/*

+	FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.

+

+	This file is part of the FreeRTOS.org distribution.

+

+	FreeRTOS.org is free software; you can redistribute it and/or modify

+	it under the terms of the GNU General Public License as published by

+	the Free Software Foundation; either version 2 of the License, or

+	(at your option) any later version.

+

+	FreeRTOS.org is distributed in the hope that it will be useful,

+	but WITHOUT ANY WARRANTY; without even the implied warranty of

+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+	GNU General Public License for more details.

+

+	You should have received a copy of the GNU General Public License

+	along with FreeRTOS.org; if not, write to the Free Software

+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

+

+	A special exception to the GPL can be applied should you wish to distribute

+	a combined work that includes FreeRTOS.org, without being obliged to provide

+	the source code for any proprietary components.  See the licensing section

+	of http://www.FreeRTOS.org for full details of how and when the exception

+	can be applied.

+

+	***************************************************************************

+	See http://www.FreeRTOS.org for documentation, latest information, license

+	and contact details.  Please ensure to read the configuration and relevant

+	port sections of the online documentation.

+	***************************************************************************

+*/

+/* Standard includes. */

+#include <string.h>

+

+/* Scheduler includes. */

+#include "FreeRTOS.h"

+#include "task.h"

+#include "semphr.h"

+

+/* uip includes. */

+#include "uip.h"

+#include "uip_arp.h"

+#include "httpd.h"

+#include "timer.h"

+#include "clock-arch.h"

+

+/* Demo includes. */

+#include "FEC.h"

+#include "partest.h"

+

+//struct timer {

+//  clock_time_t start;

+//  clock_time_t interval;

+//};

+

+

+/*-----------------------------------------------------------*/

+

+/* How long to wait before attempting to connect the MAC again. */

+#define uipINIT_WAIT    100

+

+/* Shortcut to the header within the Rx buffer. */

+#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])

+

+/* Standard constant. */

+#define uipTOTAL_FRAME_HEADER_SIZE	54

+

+/*-----------------------------------------------------------*/

+

+/*

+ * Port functions required by the uIP stack.

+ */

+void clock_init( void );

+clock_time_t clock_time( void );

+

+/*-----------------------------------------------------------*/

+

+/* The semaphore used by the ISR to wake the uIP task. */

+extern xSemaphoreHandle xFECSemaphore;

+

+/*-----------------------------------------------------------*/

+

+void clock_init(void)

+{

+	/* This is done when the scheduler starts. */

+}

+/*-----------------------------------------------------------*/

+

+/* Define clock functions here to avoid header file name clash between uIP

+and the Luminary Micro driver library. */

+clock_time_t clock_time( void )

+{

+	return xTaskGetTickCount();

+}

+extern void timer_set(struct timer *t, clock_time_t interval);

+extern int timer_expired(struct timer *t);

+extern void timer_reset(struct timer *t);

+

+

+

+

+void vuIP_Task( void *pvParameters )

+{

+portBASE_TYPE i;

+uip_ipaddr_t xIPAddr;

+struct timer periodic_timer, arp_timer;

+extern void ( vEMAC_ISR )( void );

+

+	/* To prevent compiler warnings. */

+	( void ) pvParameters;

+

+	/* Initialise the uIP stack. */

+	timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );

+	timer_set( &arp_timer, configTICK_RATE_HZ * 10 );

+	uip_init();

+	uip_ipaddr( xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );

+	uip_sethostaddr( xIPAddr );

+	httpd_init();

+

+	vInitFEC();

+

+	for( ;; )

+	{

+		/* Is there received data ready to be processed? */

+		uip_len = usGetFECRxData();

+

+		if( uip_len > 0 )

+		{

+			/* Standard uIP loop taken from the uIP manual. */

+

+			if( xHeader->type == htons( UIP_ETHTYPE_IP ) )

+			{

+				uip_arp_ipin();

+				uip_input();

+

+				/* If the above function invocation resulted in data that

+				should be sent out on the network, the global variable

+				uip_len is set to a value > 0. */

+				if( uip_len > 0 )

+				{

+					uip_arp_out();

+					vSendBufferToFEC();

+				}

+				else

+				{

+					vDiscardRxData();

+				}

+			}

+			else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )

+			{

+				uip_arp_arpin();

+

+				/* If the above function invocation resulted in data that

+				should be sent out on the network, the global variable

+				uip_len is set to a value > 0. */

+				if( uip_len > 0 )

+				{

+					vSendBufferToFEC();

+				}

+				else

+				{

+					vDiscardRxData();

+				}

+			}

+			else

+			{

+				vDiscardRxData();

+			}

+		}

+		else

+		{

+			if( timer_expired( &periodic_timer ) )

+			{

+				timer_reset( &periodic_timer );

+				for( i = 0; i < UIP_CONNS; i++ )

+				{

+					uip_periodic( i );

+

+					/* If the above function invocation resulted in data that

+					should be sent out on the network, the global variable

+					uip_len is set to a value > 0. */

+					if( uip_len > 0 )

+					{

+						uip_arp_out();

+						vSendBufferToFEC();

+					}

+				}

+

+				/* Call the ARP timer function every 10 seconds. */

+				if( timer_expired( &arp_timer ) )

+				{

+					timer_reset( &arp_timer );

+					uip_arp_timer();

+				}

+			}

+			else

+			{

+				/* We did not receive a packet, and there was no periodic

+				processing to perform.  Block for a fixed period.  If a packet

+				is received during this period we will be woken by the ISR

+				giving us the Semaphore. */

+				xSemaphoreTake( xFECSemaphore, configTICK_RATE_HZ / 2 );

+			}

+		}

+	}

+}

+/*-----------------------------------------------------------*/

+

+void vApplicationProcessFormInput( portCHAR *pcInputString )

+{

+char *c;

+

+	/* Process the form input sent by the IO page of the served HTML. */

+

+	c = strstr( pcInputString, "?" );

+

+    if( c )

+    {

+		/* Turn LED's on or off in accordance with the check box status. */

+		if( strstr( c, "LED0=1" ) != NULL )

+		{

+			vParTestSetLED( 0, 1 );

+		}

+		else

+		{

+			vParTestSetLED( 0, 0 );

+		}

+    }

+}

+

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/uip-conf.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/uip-conf.h
new file mode 100644
index 00000000..f7706156
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/uip-conf.h
@@ -0,0 +1,162 @@
+/**

+ * \addtogroup uipopt

+ * @{

+ */

+

+/**

+ * \name Project-specific configuration options

+ * @{

+ *

+ * uIP has a number of configuration options that can be overridden

+ * for each project. These are kept in a project-specific uip-conf.h

+ * file and all configuration names have the prefix UIP_CONF.

+ */

+

+/*

+ * Copyright (c) 2006, Swedish Institute of Computer Science.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. Neither the name of the Institute nor the names of its contributors

+ *    may be used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND

+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE

+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

+ * SUCH DAMAGE.

+ *

+ * This file is part of the uIP TCP/IP stack

+ *

+ * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $

+ */

+

+/**

+ * \file

+ *         An example uIP configuration file

+ * \author

+ *         Adam Dunkels <adam@sics.se>

+ */

+

+#ifndef __UIP_CONF_H__

+#define __UIP_CONF_H__

+

+#include <stdint.h>

+

+/**

+ * 8 bit datatype

+ *

+ * This typedef defines the 8-bit type used throughout uIP.

+ *

+ * \hideinitializer

+ */

+typedef uint8_t u8_t;

+

+/**

+ * 16 bit datatype

+ *

+ * This typedef defines the 16-bit type used throughout uIP.

+ *

+ * \hideinitializer

+ */

+typedef uint16_t u16_t;

+

+/**

+ * Statistics datatype

+ *

+ * This typedef defines the dataype used for keeping statistics in

+ * uIP.

+ *

+ * \hideinitializer

+ */

+typedef unsigned short uip_stats_t;

+

+/**

+ * Maximum number of TCP connections.

+ *

+ * \hideinitializer

+ */

+#define UIP_CONF_MAX_CONNECTIONS 40

+

+/**

+ * Maximum number of listening TCP ports.

+ *

+ * \hideinitializer

+ */

+#define UIP_CONF_MAX_LISTENPORTS 40

+

+/**

+ * uIP buffer size.

+ *

+ * \hideinitializer

+ */

+#define UIP_CONF_BUFFER_SIZE     1500

+

+/**

+ * CPU byte order.

+ *

+ * \hideinitializer

+ */

+#define UIP_CONF_BYTE_ORDER      UIP_BIG_ENDIAN

+

+/**

+ * Logging on or off

+ *

+ * \hideinitializer

+ */

+#define UIP_CONF_LOGGING         0

+

+/**

+ * UDP support on or off

+ *

+ * \hideinitializer

+ */

+#define UIP_CONF_UDP             0

+

+/**

+ * UDP checksums on or off

+ *

+ * \hideinitializer

+ */

+#define UIP_CONF_UDP_CHECKSUMS   1

+

+/**

+ * uIP statistics on or off

+ *

+ * \hideinitializer

+ */

+#define UIP_CONF_STATISTICS      1

+

+/* Here we include the header file for the application(s) we use in

+   our project. */

+/*#include "smtp.h"*/

+/*#include "hello-world.h"*/

+/*#include "telnetd.h"*/

+#include "webserver.h"

+/*#include "dhcpc.h"*/

+/*#include "resolv.h"*/

+/*#include "webclient.h"*/

+

+#define UIP_CONF_EXTERNAL_BUFFER

+

+

+#define FRAME_MULTIPLE			1

+

+#endif /* __UIP_CONF_H__ */

+

+/** @} */

+/** @} */

diff --git a/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/webserver.h b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/webserver.h
new file mode 100644
index 00000000..1acb290b
--- /dev/null
+++ b/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/webserver/webserver.h
@@ -0,0 +1,49 @@
+/*

+ * Copyright (c) 2002, Adam Dunkels.

+ * All rights reserved.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above

+ *    copyright notice, this list of conditions and the following

+ *    disclaimer in the documentation and/or other materials provided

+ *    with the distribution.

+ * 3. The name of the author may not be used to endorse or promote

+ *    products derived from this software without specific prior

+ *    written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS

+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY

+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE

+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,

+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING

+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+ *

+ * This file is part of the uIP TCP/IP stack

+ *

+ * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $

+ *

+ */

+#ifndef __WEBSERVER_H__

+#define __WEBSERVER_H__

+

+#include "httpd.h"

+

+typedef struct httpd_state uip_tcp_appstate_t;

+/* UIP_APPCALL: the name of the application function. This function

+   must return void and take no arguments (i.e., C type "void

+   appfunc(void)"). */

+#ifndef UIP_APPCALL

+#define UIP_APPCALL     httpd_appcall

+#endif

+

+

+#endif /* __WEBSERVER_H__ */