summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2010-03-19 00:50:47 +0000
committerChris Lattner <sabre@nondot.org>2010-03-19 00:50:47 +0000
commit01dcecc214918b29cf3712420457fef309eeaad6 (patch)
tree4e2fa0fafa7da60f410f1af8585ce59564ef8a8a
parenta28bc686fa4f2375237aeab58530126462ae9b41 (diff)
downloadllvm-01dcecc214918b29cf3712420457fef309eeaad6.tar.gz
llvm-01dcecc214918b29cf3712420457fef309eeaad6.tar.bz2
llvm-01dcecc214918b29cf3712420457fef309eeaad6.tar.xz
revert 98912
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98914 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--utils/TableGen/AsmWriterEmitter.cpp6
-rw-r--r--utils/TableGen/CodeGenTarget.cpp30
-rw-r--r--utils/TableGen/CodeGenTarget.h18
-rw-r--r--utils/TableGen/InstrEnumEmitter.cpp4
-rw-r--r--utils/TableGen/InstrInfoEmitter.cpp4
5 files changed, 31 insertions, 31 deletions
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index ab1e239a95..9378343cec 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -254,10 +254,10 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
E = Target.inst_end(); I != E; ++I)
- if (!(*I)->AsmString.empty() &&
- (*I)->TheDef->getName() != "PHI")
+ if (!I->second.AsmString.empty() &&
+ I->second.TheDef->getName() != "PHI")
Instructions.push_back(
- AsmWriterInst(**I,
+ AsmWriterInst(I->second,
AsmWriter->getValueAsInt("Variant"),
AsmWriter->getValueAsInt("FirstOperandColumn"),
AsmWriter->getValueAsInt("OperandSpacing")));
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 0dbc70cf90..36a9d1ef92 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -123,7 +123,7 @@ std::string CodeGenTarget::getInstNamespace() const {
std::string InstNS;
for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
- InstNS = (*i)->Namespace;
+ InstNS = i->second.Namespace;
// Make sure not to pick up "TargetInstrInfo" by accidentally getting
// the namespace off the PHI instruction or something.
@@ -300,7 +300,7 @@ GetInstByName(const char *Name,
/// getInstructionsByEnumValue - Return all of the instructions defined by the
/// target, ordered by their enum value.
-void CodeGenTarget::ComputeInstrsByEnum() const {
+void CodeGenTarget::ComputeInstrsByEnum() {
const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
const CodeGenInstruction *PHI = GetInstByName("PHI", Insts);
const CodeGenInstruction *INLINEASM = GetInstByName("INLINEASM", Insts);
@@ -333,19 +333,19 @@ void CodeGenTarget::ComputeInstrsByEnum() const {
InstrsByEnum.push_back(COPY_TO_REGCLASS);
InstrsByEnum.push_back(DBG_VALUE);
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
- if (*II != PHI &&
- *II != INLINEASM &&
- *II != DBG_LABEL &&
- *II != EH_LABEL &&
- *II != GC_LABEL &&
- *II != KILL &&
- *II != EXTRACT_SUBREG &&
- *II != INSERT_SUBREG &&
- *II != IMPLICIT_DEF &&
- *II != SUBREG_TO_REG &&
- *II != COPY_TO_REGCLASS &&
- *II != DBG_VALUE)
- InstrsByEnum.push_back(*II);
+ if (&II->second != PHI &&
+ &II->second != INLINEASM &&
+ &II->second != DBG_LABEL &&
+ &II->second != EH_LABEL &&
+ &II->second != GC_LABEL &&
+ &II->second != KILL &&
+ &II->second != EXTRACT_SUBREG &&
+ &II->second != INSERT_SUBREG &&
+ &II->second != IMPLICIT_DEF &&
+ &II->second != SUBREG_TO_REG &&
+ &II->second != COPY_TO_REGCLASS &&
+ &II->second != DBG_VALUE)
+ InstrsByEnum.push_back(&II->second);
}
diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h
index a0e631e109..ac6574d69a 100644
--- a/utils/TableGen/CodeGenTarget.h
+++ b/utils/TableGen/CodeGenTarget.h
@@ -71,7 +71,7 @@ class CodeGenTarget {
void ReadInstructions() const;
void ReadLegalValueTypes() const;
- mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
+ std::vector<const CodeGenInstruction*> InstrsByEnum;
public:
CodeGenTarget();
@@ -205,25 +205,25 @@ public:
CodeGenInstruction &getInstruction(const Record *InstRec) const;
+ typedef std::map<std::string,
+ CodeGenInstruction>::const_iterator inst_iterator;
+ inst_iterator inst_begin() const { return getInstructions().begin(); }
+ inst_iterator inst_end() const { return Instructions.end(); }
+
/// getInstructionsByEnumValue - Return all of the instructions defined by the
/// target, ordered by their enum value.
- const std::vector<const CodeGenInstruction*> &
- getInstructionsByEnumValue() const {
+ const std::vector<const CodeGenInstruction*> &getInstructionsByEnumValue() {
if (InstrsByEnum.empty()) ComputeInstrsByEnum();
return InstrsByEnum;
}
- typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
- inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
- inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
-
-
+
/// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
///
bool isLittleEndianEncoding() const;
private:
- void ComputeInstrsByEnum() const;
+ void ComputeInstrsByEnum();
};
/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
diff --git a/utils/TableGen/InstrEnumEmitter.cpp b/utils/TableGen/InstrEnumEmitter.cpp
index 06c95f27b6..4162107bce 100644
--- a/utils/TableGen/InstrEnumEmitter.cpp
+++ b/utils/TableGen/InstrEnumEmitter.cpp
@@ -29,8 +29,8 @@ void InstrEnumEmitter::run(raw_ostream &OS) {
std::string Namespace;
for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
E = Target.inst_end(); II != E; ++II) {
- if ((*II)->Namespace != "TargetOpcode") {
- Namespace = (*II)->Namespace;
+ if (II->second.Namespace != "TargetOpcode") {
+ Namespace = II->second.Namespace;
break;
}
}
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 72c4e73ca1..83602bb65c 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -149,7 +149,7 @@ void InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS,
const CodeGenTarget &Target = CDP.getTargetInfo();
for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
E = Target.inst_end(); II != E; ++II) {
- std::vector<std::string> OperandInfo = GetOperandInfo(**II);
+ std::vector<std::string> OperandInfo = GetOperandInfo(II->second);
unsigned &N = OperandInfoIDs[OperandInfo];
if (N != 0) continue;
@@ -214,7 +214,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
// Emit all of the instruction's implicit uses and defs.
for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
E = Target.inst_end(); II != E; ++II) {
- Record *Inst = (*II)->TheDef;
+ Record *Inst = II->second.TheDef;
std::vector<Record*> Uses = Inst->getValueAsListOfDefs("Uses");
if (!Uses.empty()) {
unsigned &IL = EmittedLists[Uses];